Differential Crystal Growth Rates Patents (Class 148/DIG29)
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Patent number: 5066605Abstract: A process for producing monolithically integrated multifunction circuit arrangements. A substrate having an integrated circuit formed therein is provided, and further multilayer semiconductor components and the corresponding electrical leads are arranged on top of one another on the substrate surface. The multilayer semiconductor components and the electrical leads are produced from an epitaxially grown semiconductor layer sequence.Type: GrantFiled: April 21, 1989Date of Patent: November 19, 1991Assignee: Licentia Patent Verwaltungs-GmbHInventors: Erich Kasper, Maximilian Kuisl, Ulf Konig, Johann F. Luy
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Patent number: 5061644Abstract: A method of forming a self-aligned contact to a transistor component located on a semiconductor substrate comprising forming a transistor component opening in a masking layer overlying a semiconductor substrate and using epitaxial lateral overgrowth to form a self-aligned contact, the epitaxial overgrowth beginning in the masking layer opening at an upper surface of the semiconductor substrate and extending normal to and laterally over the masking layer surface.Type: GrantFiled: September 20, 1990Date of Patent: October 29, 1991Assignee: Honeywell Inc.Inventors: Jerry Yue, Michael S. T. Liu
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Patent number: 5026655Abstract: For improvement in a transit time of electrons, there is disclosed a heterojunction field effect transistor fabricated on a semi-insulating GaAs substrate, comprising a first layer overlying the semi-insulating substrate and formed of a high-purity GaAs, a second layer overlying the first layer and formed of an n-type AlGaAs which is smaller in electron affinity than the high-purity GaAs, a source region penetrating from the first layer into the second layer so as to be in contact with the active channel layer formed in the first layer and formed of an gallium-rich AlGaAs, a drain region, and a gate electrode formed on the second layer, an energy gap takes place between the source region and the first layer due to a lower edge of the conduction band thereof higher in energy level than that of the high-purity GaAs, thereby accelerating electrons supplied from the source region to the active channel layer.Type: GrantFiled: September 21, 1989Date of Patent: June 25, 1991Assignee: NEC CorporationInventor: Keiichi Ohata
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Patent number: 4918028Abstract: A process for forming deposited film, which comprises:(a) the step of preparing a substrate having crystal nuclei or regions where crystal nuclei are selectively formed scatteringly on the surface for forming deposited film in a film forming space for formation of deposited film;(b) the step of forming deposited film on the above substrate by introducing an activated species (A) formed by decomposition of a compound (SX) containing silicon and a halogen and an activated species (B) formed from a chemical substance for film formation (B) which is chemically mutually reactive on said activated species (A) separately from each other into said film-forming space to effect chemical reaction therebetween;(c) the step of introducing a gaseous substance (E) having etching action on the deposited film to be formed or a gaseous substance (E.sub.Type: GrantFiled: October 21, 1988Date of Patent: April 17, 1990Assignee: Canon Kabushiki KaishaInventor: Shigeru Shirai
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Patent number: 4865659Abstract: A heteroepitaxial growth method comprising growing a semiconductor single-crystal film on a semiconductor single-crystal substrate with a lattice constant different from that of the semiconductor single-crystal film by chemical vapor deposition, the epitaxial orientation of the semiconductor single-crystal film being inclined at a certain angle with respect to the semiconductor single-crystal substrate.Type: GrantFiled: November 24, 1987Date of Patent: September 12, 1989Assignee: Sharp Kabushiki KaishaInventors: Mitsuhiro Shigeta, Akira Suzuki, Katsuki Furukawa, Yoshihisa Fujii, Akitsugu Hatano, Atsuko Uemoto, Kenji Nakanishi
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Patent number: 4859626Abstract: A method of forming thin epitaxial layers by subjecting a substrate to a high temperature prebake followed by a medium temperature capping seal and a low temperature deposition is disclosed. In a preferred embodiment the epitaxial layer is formed by low pressure chemical vapor deposition of dichlorosilane. The method has been demonstrated to alleviate the increase in autodoping and epitaxial defects normally associated with lowering the deposition temperature.Type: GrantFiled: June 3, 1988Date of Patent: August 22, 1989Assignee: Texas Instruments IncorporatedInventor: Rick L. Wise
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Patent number: 4843031Abstract: Disclosed is a method of fabricating a compound semiconductor device which is capable of forming a multi-wavelength semiconductor laser structure, double cavity type semiconductor laser structure, stripe type semiconductor laser structure transverse junction stripe type semiconductor laser structure, or semiconductor grating by a single step of epitaxial growth while illuminating a desired part of substrate surface selectively with light at the time of epitaxial growth.Type: GrantFiled: March 15, 1988Date of Patent: June 27, 1989Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yuzaburo Ban, Hiraaki Tsujii, Youichi Sasai, Mototsugu Ogura, Hiroyuki Serizawa
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Patent number: 4826784Abstract: A method of OMCVD heteroepitaxy of III/V (GaAs) material on a patterned Si substrate is described wherein heteroepitaxy deposition occurs only on the exposed Si surfaces and nowhere else.Type: GrantFiled: November 13, 1987Date of Patent: May 2, 1989Assignee: Kopin CorporationInventors: Jack P. Salerno, Jhang W. Lee, Richard E. McCullough
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Patent number: 4824795Abstract: A method of forming single crystal islands (30) by epitaxial growth from a monocrystalline substrate (10). A <100> or other suitable low index surface is preferentially etched to void an inverted pyramid section (16) with <111> or other suitable low index sidewalls (18). The <100> bottom (17) of the pyramid section is covered with insulation (20) and island refill material (24) is grown epitaxially from the sidewalls (18). The islands (30) are laterally isolated (25, 28) from the sidewalls (13) and the structure is finished to provide a substrate on which to form various IC devices.Type: GrantFiled: February 5, 1987Date of Patent: April 25, 1989Assignee: Siliconix incorporatedInventor: Richard A. Blanchard
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Patent number: 4818722Abstract: A method for generating a strip laser in a buried hetero-structure composed of layers, wherein a raised strip is etched out of the layer structure and the strip is laterally etched with an erosion melt. The lateral edges of the laser active layer are protected by leaving them covered with a portion of the layer dissolved out by the erosion melt. The deposits thus remaining are used to initiate the generation of an epitaxial layer which extends laterally from the laser-active layer.Type: GrantFiled: May 26, 1987Date of Patent: April 4, 1989Assignee: Siemens AktiengesellschaftInventor: Jochen Heinen
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Patent number: 4797374Abstract: A method of producing a heterostructure device comprises defining in a substrate 5 of group III-V semiconductor material a structure, such as a mesa 9, having first and second faces oriented substantially parallel to the (100) and (111)A crystallographic planes. The mesa 9 is exposed to group III-V chemical reagents thereby to deposit group III-V materials on the first and/or second faces in dependence upon the group V constituent in the chemical reagents.Type: GrantFiled: May 20, 1987Date of Patent: January 10, 1989Assignee: Plessey Overseas LimitedInventors: Michael D. Scott, Alan H. Moore
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Patent number: 4758531Abstract: A method for forming epitaxial grown silicon structure having substantially defect free outer surfaces and resulting structure is provided. A silicon substrate is provided, on which an epitaxial silicon crystal is grown. The outer surface layer of the silicon epitaxially grown silicon crystal will contain defective material which is removed by oxidation of the outer layer to silicon dioxide. This removes the defect containing outer layer, creating a new outer layer which is substantially defect free.Type: GrantFiled: October 23, 1987Date of Patent: July 19, 1988Assignee: International Business Machines CorporationInventors: Klaus D. Beyer, Louis L. Hsu, Dominic J. Schepis, Victor J. Silvestri