Abstract: Either a chemical amplification positive electron beam resist film or a chemical amplification negative electron beam resist film is used selectively according to an IC fabricating process when forming a minute IC pattern by using, as a mask, a resist pattern formed by irradiating the chemical amplification electron beam resist film formed on a semiconductor wafer with an electron beam, to form the minute IC pattern quickly in a high accuracy and to carry out an electron beam direct writing at a high throughput. The chemical amplification electron beam resist film is coated with a conductive polymer film before irradiating the same with the electron beam to prevent the charging-up of the chemical amplification electron beam resist film and to stabilize the chemical amplification electron beam resist film during a electron beam writing process.

Abstract: A scanning probe microscope is used to pattern a layer of resist, and the pattern is transferred to a substrate. First, an underlayer formed of, for example, polyimide and a top layer formed of, for example, amorphous silicon are deposited on the substrate. A pattern is formed on the top layer using the tip of the cantilever in a scanning probe microscope. The pattern may consist of an oxide formed by an electric field at the cantilever tip. The top layer is then etched using the pattern as a mask and using an etchant that is selective against the underlayer. The underlayer is then etched using an etchant that is selective against the top layer and substrate. The substrate is etched with an etchant that removes the top layer but is selective against the underlayer. Finally, the underlayer is removed.

Abstract: The invention is a method of growing intrinsic, substantially undoped single crystal gallium nitride with a donor concentration of 7.times.10.sup.17 cm.sup.-3 or less. The method comprises introducing a source of nitrogen into a reaction chamber containing a growth surface while introducing a source of gallium into the same reaction chamber and while directing nitrogen atoms and gallium atoms to a growth surface upon which gallium nitride will grow.

Abstract: In a method for forming a pattern, by selectively irradiating a charged particle beam onto a substrate in an atmosphere containing a raw material gas, a resist pattern comprising a material which is produced on the substrate from the raw material gas is formed, wherein a pressure of the raw material gas is set to 10.sup.-7 to 10.sup.-5 Torr, an accelerating voltage of the charged particle beam is set to 0.5 to 6 kV, and a beam current of the charged particle beam is set to 10.sup.-13 to 10.sup.-7 A. Thus, a resist pattern of an ultrafine width can be stably formed in a relatively short time.

Abstract: A read only memory device comprises a first electrode, and a second electrode arranged overlapping with the first electrode so as to be geometrically in connection at the intersection. At least one of the first and second electrodes is formed of a ceramics system high temperature superconductor. A prescribed electrode out of said electrodes which is formed of the high temperature superconductor has a high resistance region for insulating the first and second electrodes from each other at the intersection corresponding to a prescribed stored data.In the manufacturing method, the first and second electrodes are formed and, thereafter, a high resistance region is formed by irradiating focused ion beam.

Abstract: Flatness of atomic-accuracy is achieved in an MBE epitaxial growth process by imparting kinetic energy to atoms absorbed on a substrate by means of irradiation by ion-beam for surface bombardment. Ion-beam surface bombardment may also be used for evaluation. The molecular-beam for epitaxial growth and the ion bombardment for surface energization and surface evaluation may all be operated in a pulse mode and synchronized so that evaluation and growth are conducted alternately while growth and energization are conducted simultaneously.

Abstract: A method of etching a semiconductor device having multi-layered wiring by an ion beam is disclosed which method comprises the steps of: extracting a high-intensity ion beam from a high-density ion source; focusing the extracted ion beam; causing the focused ion beam to perform a scanning operation by a voltage applied to a deflection electrode; forming a first hole in the semiconductor device by the focused ion beam to a depth capable of reaching an insulating film formed between upper and lower wiring conductors so that the first hole has a curved bottom corresponding to the undulation of the upper wiring conductor, and the upper wiring conductor is absent at the bottom of the first hole; and scanning a portion of the bottom of the first hole with the focused ion beam to form a second hole in the insulating film to a depth capable of reaching the lower wiring conductor, thereby preventing the shorting between the upper and lower wiring conductors.

Abstract: Amorphous Co:Si (1:2 ratio) films (12) are electron gun-evaporated on clean Si(111) substrates (10), such as in a molecular beam epitaxy system. These layers are then crystallized selectively with a focused electron beam (14) to form very small crystalline CoSi.sub.2 regions (12') in an amorphous matrix. Finally, the amorphous regions are etched away selectively using plasma or chemical techniques.

Abstract: A method of fabricating high density multi-chip interconnects whereby one or more polymer layers thereon are cured at approximately room temperature utilizing high energy electron bombardment. The polymer layers, typically in the range of five to twenty microns in thickness, cured in accordance with the present invention, have very low ambiant temperature interlayer stresses, resulting in higher reliability and/or a wider operating temperature range for the finished high density multi-chip interconnect. In addition, curing times are grossly reduced, thereby making the manufacturing processing much more orderly and rapid. Interlayer adhesion of polymer layers cured in accordance with the present invention may be enhanced by the baking of the same at an elevated temperature below the glass transition temperture for the polymer. Various methods and parameters are disclosed.

Abstract: An ion beam (113) focused into a diameter of at most 0.1 .mu.m bombards substantially perpendicularly to the superlattice layers of a one-dimensional superlattice structure and is scanned rectilinearly in a direction of the superlattice layers so as to form at least two parallel grooves (108, 109, 110, 111) or at least two parallel impurity-implanted parts (2109) as potential barrier layers, whereby a device of two-dimensional superlattice structure can be manufactured. At least two parallel grooves (114, 115, 116, 117) or impurity-implanted parts are further formed orthogonally to the potential barrier layers of the two-dimensional superlattice structure, whereby a device of three-dimensional superlattice structure can be manufactured. In addition, deposition parts (2403, 2404, 2405) may well be provided by further depositing an insulator into the grooves (108, 109, 110, 111, 114, 115, 116, 117) which are formed by the scanning of the ion beam.

Abstract: The process consists of depositing at least one layer of a doped material on a heated substrate placed in an enclosure, subjecting the substrate surface to the action of a molecular flux of the material, to the action of a doping particle beam and to the action of an electron beam.

Abstract: A carriage for fine movement includes a stationary stage, a movable stage slidably provided thereon, a moving mechanism, coupled to the stationary and movable stages, for moving the movable stage relative to the stationary stage, wherein at least one of the stationary stage, movable stage and moving mechanism is of a fine ceramic material to prevent distortion and variation with time to enhance the abrasion resistance.

Abstract: As a process for fabricating uniform patterns fine enough to produce a quantum size effect, the use of electron halography is proposed. Disclosed examples employing a process are methods of manufacturing a semiconductors laser whose threshold current is approximately 1 mA, and a permeable transistor and bistable device whose response rates are 100 GHz.

Abstract: A process of providing semi-insulating thin film resistors with closer tolerance values by furnance-annealing the film to increase is resistance to less than the final intended value, and then focused heat source-annealing the film to within a close tolerance of the final intended value.

Abstract: In the manufacture of semi-custom integrated circuits silicon wafers with P and N or N and P structures are used, and interconnections to establish a specific application must be created. Unlike currently known technologies, electrically conductive film with standardized openings made according to a pre-arranged raster must be deposited on the silicon wafer. Subsequently the conductive film, will be removed from between the openings directly or indirectly by means of electromagnetic radiation in order to produce the required circuit configuration. A laser beam is particularly appropriate for this since it can be positioned and controlled, and can be used directly for the exposure of a photosensitive film. The creation of insular conductive film is then achieved through a photo- etch technique. By use of this process, an expensive customer specific photo mask can be avoided.

Abstract: A semiconductor device and a method of manufacturing the same are disclosed wherein a semi-insulating film having a high trap density is formed on a semiconductor substrate so as to prevent charges from remaining in the semi-insulating film and to prevent a change in carrier density at the substrate surface upon irradiation thereof with radiation. The lifetime of minority carriers can be easily controlled without decreasing the junction breakdown voltages.

Abstract: A process for producing a semiconductor device by which the minority carrier lifetime can be selectively changed in a semiconductor device. A radiation beam is irradiated onto the surface of a semiconductor substrate to shorten the minority carrier lifetime. Then ions are selectively implanted into a region in which the minority carrier lifetime is to be recovered. Finally, the resultant structure is annealed.