Abstract: A nitrogen-group III compound semiconductor satisfying the formula Al.sub.x Ga.sub.y In.sub.1-x-y N, inclusive of x=0, y=0 and x=y=0, and a method for producing the same comprising the steps of forming a zinc oxide (ZnO) intermediate layer on a sapphire substrate, forming a nitrogen-group III semiconductor layer satisfying the formula Al.sub.x Ga.sub.y In.sub.1-x-y N, inclusive of x=0, y=0 and x=y=0 on the intermediate ZnO layer, and separating the intermediate ZnO layer by wet etching with an etching liquid only for the ZnO layer.

Abstract: A process for producing a semiconductor emitting device of group III nitride semiconductor having a crystal layer (Al.sub.x Ga.sub.1-x).sub.1-y In.sub.y N (0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1) includes; a step of forming at least one pn-junction or pin-junction and a crystal layer (Al.sub.x Ga.sub.1-x).sub.1-y In.sub.y N (0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1) to which a group II element is added; and a step of forming electrodes on the crystal layer. The process further includes an electric-field-assisted annealing treatment in which the pn-junction or pin-junction is heated to the predetermined temperature range while forming and maintaining an electric field across the pn-junction or pin-junction for at least partial time period of the predetermined temperature range via the electrodes.

Abstract: Heteroepitaxy of lattice-mismatched semiconductor materials such as GaAs on silicon is accomplished by first growing GaAs (104) on silicon (102), then growing a lattice matched cap of Al.sub.z Ga.sub.1-z,As (106), next annealing out defects with the Al.sub.z Ga.sub.1-z As cap (106) limiting desorption of gallium, lastly growing further GaAs (110) directly on the cap. The lattice matched cap is also used as an implant anneal cap.

Abstract: A method of forming a native oxide from an aluminum-bearing Group III-V semiconductor material is provided. The method entails exposing the aluminum-bearing Group III-V semiconductor material to a water-containing environment and a temperature of at least about 375 C to convert at least a portion of said aluminum-bearing material to a native oxide characterized in that the thickness of said native oxide is substantially the same as or less than the thickness of that portion of said aluminum-bearing Group III-V semiconductor material thus converted. The native oxide thus formed has particular utility in electrical and optoelectrical devices, such as lasers.

Abstract: Post-growth annealing of GaInSb/InAs superlattices at about 400.degree. to 650.degree. C. in an antimony flux followed by cooling results in enhanced optical properties as determined by photoluminescence and in reduced background doping levels as determined by Hall measurements. Accordingly, the annealing procedure represents an advantage over previous fabrication techniques for Ga.sub.1-x In.sub.x Sb/InAs superlattices.

Abstract: The present invention encompasses a method for providing the same ohmic material contact (120, 122, 124) to N-type and P-type regions (70, 80) of a III-V semiconductor device. Specifically, an N-type region (70) extending through a semiconductor structure is formed. Additionally, a P-type region (80) extending through the substrate is formed. The P-type region (80) may be heavily doped with P-type impurities (81). A first ohmic region (117) is formed, contacting the N-type region (70). The first ohmic region may comprise an ohmic material including metal and an N-type dopant. A second ohmic region (119) is formed, contacting the P-type region (80, 81). The second ohmic region comprises the same ohmic material as the first ohmic region. One ohmic material that may be used is nickel-germanium-tungsten.

Abstract: Heteroepitaxy of lattice-mismatched semiconductor materials such as GaAs on silicon is accomplished by first growing GaAs (104) on silicon (102), then growing a lattice matched cap of Al.sub.x Ga.sub.1-x As (106), next annealing out defects with the Al.sub.x Ga.sub.1-x As cap (106) limiting desorption of gallium, lastly growing further GaAs (110) directly on the cap. The lattice matched cap is also used as an implant anneal cap.

Abstract: Disclosed are a gallium nitride type semiconductor device that has a single crystal of (Ga.sub.1-x Al.sub.x).sub.1-y In.sub.y N, which suppresses the occurrence of crystal defects and thus has very high crystallization and considerably excellent flatness, and a method of fabricating the same. The gallium nitride type semiconductor device comprises a silicon substrate, an intermediate layer consisting of a compound containing at least aluminum and nitrogen and formed on the silicon substrate, and a crystal layer of (Ga.sub.1-x Al.sub.x).sub.1-y In.sub.y N (0.ltoreq.x.gtoreq.1, 0.ltoreq.y.ltoreq.1, excluding the case of x=1 and y=0). According to the method of fabricating a gallium nitride base semiconductor device, a silicon single crystal substrate is kept at a temperature of 400.degree. to 1300.degree. C.

Abstract: Chemical vapor deposition process for producing indium-containing semiconductor materials, particularly III/V indium-containing semiconductor materials, using triisopropylindium as the source of indium. In the process a flow of triisopropylindium and a flow of a group V source or precursor, e.g. AsH.sub.3, are directed into a reactor in contact with a heated substrate. The triisopropylindium and group V precursor are at least partially decomposed, depositing by chemical vapor deposition an indium-containing III/V semiconductor material on the substrate. The result is lower pyrolysis temperatures and less carbon impurity incorporation into the indium-containing semiconductor material than when commercially available indium sources are used.

Abstract: An epitaxial growth method of a single crystal of III-V compound semiconductor on the surface of a semiconductor substrate by supplying a molecular beam of a group III source material and a molecular beam of a group V source material onto the surface of the substrate in a chamber held in vacuum. With this method, the molecular beams comprises a molecular beam of a first group III source material composed of an organic metal compound of a group III element not having a halogen, a molecular beam of a second group III source material having a halogen chemically bonded to atoms of the group III element, and a molecular beam of a group V source material making a compound semiconductor with the group III element of the first group III material. By setting a substrate temperature at, for example, about 500.degree. C. a single crystal of III-V compound semiconductor can be satisfactorily selectively grown.

Abstract: Heteroepitaxial semiconductor structures of, for example, GaAs on InP or Si. The epitaxially grown GaAs is in the form of individual spaced-apart islands having maximum dimensions in the plane of the surface of the substrate of no greater than 10 micrometers. In islands of this size stress in the plane of the epitaxially grown layers due to mismatch of the coefficients of thermal expansion of the substrate and epitaxially grown materials is insignificant.

Abstract: A semi-insulating InP single crystal, semiconductor device with a substrate of crystal and processes of producing the same are disclosed. Crystal is derived from an undoped InP single crystal intermediate. The intermediate has a concentration of all native Fe, Co and Cr of 0.05 ppmw. The crystal has a resistivity of 1.times.10.sup.6 .OMEGA..multidot.cm or more and a mobility of above 3,000 cm.sup.2 /V.multidot.s both at 300K. A process of producing the crystal includes a step of heat-treating the intermediate under 6 kg/cm.sup.2 of phosphorus vapor pressure. The produced semiconductor device is a MIS device operating in essentially the same high-speed manner as a HEMT.

Abstract: Disclosed is a method of selective chemical vapor deposition for selectively forming thin films of a semiconductor, dielectric or metal on a semiconductor by providing a mask of SiO.sub.2 having a plurality of openings in various forms on the substrate, wherein a trimethyl gallium (TMG) gas as a Group III material, 10% hydrogen-based arsine (AsH.sub.3) gas as a Group V material, and 500 ppm hydrogen-based disilane (Si.sub.2 H.sub.6) gas as an n-type impurity material are alternately supplied onto the substrate, and each supply amount of the material gases is controlled at a value to obtain a film growth rate for forming the corresponding monoatomic layer or monomolecular layer to each material at each opening. Also disclosed is an apparatus for performing the above-disclosed method of chemical vapor deposition, wherein four reaction chambers are included, and the material gases are supplied to the respective reaction chambers in accordance with the following gas supply sequences: Chamber 1: TMG+H.sub.2 /H.

Abstract: A passivation technique which significantly reduces degradation in reverse breakdown voltage characteristics usually introduced by passivation of active regions of field effect transistors is described. The technique uses a surface treatment in a plasma to introduce into the surface an electro-negative species to maintain negative surface potential of the surface subsequent to encapsulation by the passivation material.

Abstract: An inventive process for producing a semiconductor device has the steps of: putting a compound semiconductor substrate, an element of the substrate elements having a higher vapor pressure in a quartz ampoule, evacuating the ampoule, introducing oxygen gas into the ampoule and then sealing the ampoule; heating the ampoule to produce an oxide layer on the surface of the compound semiconductor substrate; and forming an electrode metal layer on the oxide layer to produce a MOS diode with a low interface trap density or a Schottky diode with a high barrier height and small ideal factor. Thus, the process produces a Schottky diode of a good forward current/voltage characteristic, low reverse current and superior rectification performance and a MESFET of a low dispersion at threshold voltage.

Abstract: It is desirable to implement complementary field effect transistors in group III/group V compound semiconductors, especially on InP substrates. Outstanding n-channel performance has been demonstrated in InGaAs channel devices on InP substrates. Preliminary experiments indicate that GaAsSb channel devices will result in optimal p-heterostructure FETs (HFETs). This disclosure teaches a technique to fabricate both n- and p-channel devices on the same substrate, allowing the demonstration of (C-HFET) technology. The HFET structure contains a channel region and the barrier region. The channel region consists of two distinctive parts: the p-channel and the n-channel areas. The p-channel area consists of GaAsSb, lattice matched to the InP substrate. In n-channel FETs, and ohmic contacts are formed by first doping the contact areas with Si by ion implantation, annealing the structure and then depositing and annealing the ohmic metal.

Abstract: Method for making an integrated guide/detector structure made of a semiconductive material.

Abstract: A P-type compound semiconductor layer doped with carbon is formed on a semi-insulating substrate by placing the substrate in a reactor, and carrying out vapor-phase epitaxy by feeding and thermally decomposing vapors of an organic metal compound including a methyl radical, arsine, and an alkyl compound of arsenic substantially simultaneously into the reactor so that a C-doped P-type compound semiconductor is deposited on the substrate.

Abstract: Selective epitaxy for indium phosphide in metalorganic chemical vapor deposition is possible by using a specific technique. In particular, a halogenated organic material is introduced with the InP precursors. This halogen-containing material should decompose to release halogen at approximately the same temperature that the metalorganic indium precursor decomposes. Through this process the manufacture of InP-based lasers is significantly enhanced and allows the use of reactive ion etching to form structures upon which InP regrowth is desired.

Abstract: A method of producing a GaAs single crystal substrate comprises the steps of conducting a first-stage annealing by vacuum-sealing a GaAs single crystal wafer and arsenic in a heat-resistant vessel and heating the wafer to a temperature of 1050.degree. to 1150.degree. C. while exposing it to arsenic vapor pressure, cooling the wafer to room temperature at a cooling rate of 1.degree.-25.degree. C./min., removing the wafer from the vessel, etching the wafer and placing it in another vessel, conducting a second-stage annealing by heating the wafer to a temperature of 910.degree. to 1050.degree. C. in a non-oxidizing atmosphere, cooling the wafer to room temperature at a cooling rate of 1.degree.-25.degree. C./min., removing it from the vessel, etching the wafer, conducting a third-stage annealing by vacuum-sealing the wafer and arsenic in the heat-resistant vessel and heating the wafer to a temperature of 520.degree.-730.degree. C. while exposing it to arsenic vapor, and cooling the wafer at least down to 400.

Abstract: The present invention addresses the use of metalorganic amines as metallic donor source compounds in reactive deposition applications. More specifically, the present invention addresses the use of the amino-substituted metallic donor source compounds M(NR.sub.2).sub.3-x H.sub.x, where R is organic, alkyl or fluoroalkyl, and x is less than or equal to 2, and M=As, Sb or P, in processes requiring deposition of the corresponding element. These uses include a number of different processes; the metalorganic vapor phase epitaxy of compound semiconductor material such as GaAs, InP, AlGaAs, etc.; doping of SiO.sub.2 or borosilicate based glasses to enhance the reflow properties of the glass; in-situ n-type doping of silicon epitaxial material; sourcing of arsenic or phosphorus for ion implantation; chemical beam epitaxy (or MOMBE); and diffusion doping into electronic materials such as silicon dioxide, silicon and polycrystalline silcon.

Abstract: A magnetoresistive sensor that includes a thin film of nominally undoped monocrystalline indium arsenide. An indium arsenide film is described that appears to have a naturally occurring accumulation layer adjacent its outer surface. With film thicknesses below 5 micrometers, preferably below 3 micrometers, the presence of the accumulation layer can have a very noticeable effect. A method for making the sensor is also described. The unexpected improvement provides a significant apparent increase in mobility and conductivity of the indium arsenide, and an actual increase in magnetic sensitivity and temperature insensitivity.

Abstract: A compound semiconductor material includes Ga.sub.x Al.sub.1-x N (wherein 0.ltoreq.x.ltoreq.1) containing B and P and having a zinc blend type crystal structure. A compound semiconductor element includes Ga.sub.x Al.sub.1-x N (wherein 0.ltoreq.x.ltoreq.1) layer having a zinc blend type crystal structure. A method of manufacturing a compound semiconductor element includes the step of sequentially forming a BP layer and a Ga.sub.x Al.sub.1-x N (wherein 0.ltoreq.x.ltoreq.1) layer on a substrate so as to form a heterojunction by using a metal organic chemical vapor deposition apparatus having a plurality of reaction regions, and moving the substrate between the plurality of reaction regions.

Abstract: A vapor-phase epitaxial growth method for producing a Groups III-V compound semiconductor containing arsenic by vapor-phase epitaxial growth using arsenic trihydride as an arsenic source is disclosed, wherein said arsenic trihydride has a volatile impurity concentration of not more than 1.5 molppb on a germanium tetrahydride conversion. The resulting epitaxial crystal has a low residual carrier concentration and is applicable to a field effect transistor.

Abstract: A method for passivating mirrors in the process of fabricating semiconductor laser diodes is disclosed. Key steps of the method are: (1) providing a contamination-free mirror facet, followed by (2) an in-situ application of a continuous, insulating (or low conductive) passivation layer. This layer is formed with material that acts as a diffusion barrier for impurities capable of reacting with the semiconductor but which does not itself react with the mirror surface.The contamination-free mirror surface is obtained by cleaving in a contamination-free environment, or by cleaving in air, followed by mirror etching, and subsequent mirror surface cleaning. The passivation layer consists of Si, Ge or Sb.

Abstract: A method for producing compound semiconductor single crystal substrates which comprises the following steps, wafers of a compound semiconductor single crystal grown by the LEC method are installed in an evacuated and sealed quartz ampoule and subjected to a first annealing step at the predetermined temperature for the predetermined period, then the wafers are gradually cooled down to room temperature at the predetermined cooling speed, the cooled wafers are then subjected to etching, the etched wafers are subjected to a second annealing step at the predetermined temperature for the predetermined period in a non-oxidizing atmosphere, and finally, the wafers are gradually cooled down to room temperature.

Abstract: A method, and devices produced therewith, for the epitaxial growth of sub-micron semiconductor structures with at least one crystal plane-dependently grown, buried active layer (24) consisting of a III-V compound. The active layer (24) and adjacent embedding layers (23, 25) form a heterostructure produced in a one-step growth process not requiring removal of the sample from the growth chamber in between layer depositions. The layers of the structure are grown on a semiconductor substrate (21) having a structured surface exposing regions of different crystal orientation providing growth and no-growth-planes for the selective growth process. The method allows the production of multiple, closely spaced active layers and of layers consisting of adjoining sections having different physical properties.

Abstract: High resistivity In-based compound Group III-V epitaxial layers are used to prevent substantial current flow through a region of a semiconductor device, such as a CSBH, DCPBH, EMBH or CMBH laser, a LED, a photodiode, a HBT, or a FET. Also disclosed is a hydride VPE process for making the high resistivity material doped with Fe. The Fe is supplied by a volatile halogenated Fe compound, and the extend of pyrolysis of the hydride is limited to allow transport of sufficient dopant to the growth area.

Abstract: A process for the manufacture of a transistor device of the type having active regions e.g. an emitter (17) and a base (11) each contacted by isolated extended conductive regions (37, 33) respectively. At start of process a mesa structure is defined in layered III-V material (3, 5, 11 and 13). The sidewall of the mesa is covered by a conformal coating (27) of insulating material; and, lattice matched material (33) grown on the exposed adjacent material (25) to form a first extended contact. This then is covered by a further layer (35) of insulating material (35). The second extended contact (37) is then grown over the mesa active region material (13). This contact material (37) is isolated from the first contact material (33) by the remanent insulating material (27, 35). This process is applicable to the GaAs/GaAlAs III-V material system as also other material systems. Transistor devices produced by this process may be either bipolar or field-effect type.

Abstract: An improved method for forming a functional deposited film by introducing a raw material gas into a substantially enclosed reaction chamber containing a substrate onto which the functional deposited film is to be deposited and coupling microwave energy from a source of microwave energy thereinto to thereby form a glow discharge plasma causing decomposition of the raw material gas whereby forming the functional deposited film on the substrate, the improvement comprising supplying microwave of a power equivalent to 1.1 times or more over that of microwave with which the deposition rate for the decomposed products from the raw material gas being deposited onto the substrate to be saturated to the raw material gas in the reaction chamber and regulating the inner pressure of the reaction chamber to a vacuum of 10 m Torr or less.

Abstract: This invention relates to ultra-thin semiconductor films which can be in the submicron range formed from semiconductor materials such as silicon, germanium and gallium arsenide. The films are formed by creating a thin slightly damaged surface on the polished reverse side of a film (e.g., a wafer) of the semiconductor by low dose ion implantation and then etching the semiconductor material on the front side of the film to remove the semiconductor material down to the ion implanted damaged layer. While the implanted ions can be chosen from functionally desirable ions which upon annealing remain in the film to alter the original electrical characteristics, the implanted ions can also be chosen so that upon annealing, the resultant ultra-thin semiconductor film has the same electrical characteristics as the original semiconductor material.The ion implantation changes the etching characteristics of the ion implanted layer.

Abstract: A method of selective epitaxial growth includes a step of selectively forming an insulator film on a predetermined region of a semiconductor substrate and a step of evaporating a starting material containing a Group III element in vacuum in the presence of a Group V element to grow epitaxially a III-V compound semiconductor selectively on the semiconductor substrate under the condition where the partial pressure of the Group III element just above the semiconductor substrate is greater than the equilibrium vapor pressure of the Group III element contained in the III-V compound semiconductor existing on the semiconductor substrate and is smaller than the equilibrium vapor pressure of the Group III element contained in the III-V compound semiconductor existing on the insulator film.When InAs is grown epitaxially and selectively on a GaAs substrate, the GaAs substrate is kept at 500.degree. to 650.degree. C.

Abstract: This invention relates to ultra-thin semiconductor films which can be in the submicron range formed from semiconductor materials such as silicon, germanium and gallium aresenide. The films are formed by creating a thin slightly damaged surface on the polished reverse side of a film (e.g., a wafer) of the semiconductor by low dose ion implantation and then etching the semiconductor material on the front side of the film to remove the semiconductor material down to the ion implanted damaged layer. While the implanted ions can be chosen from functionally desirable ions which upon annealing remain in the film to alter the original electrical characteristics, the implanted ions can also be chosen so that upon annealing, the resultant ultra-thin semiconductor film has the same electrical characteristics as the original semiconductor material.The ion implantation changes the etching characteristics of the ion implanted layer.

Abstract: A material for a light emitting element most suited for a light emitting diode or laser diode which emits visible light of 550 to 650 nm band wavelength. The material provides an at least two-layered structure composed of a GaAs substrate and a Sn doped InGaP layer developed on the substrate without forming a gradient layer therebetween. The mixed crystal composition of the Sn doped InGaP layer as expressed by the molar fraction of GaP is 0.50 to 0.75.According to the method for developing mixed crystals of InGaP, GaP and InP are dissolved in Sn to make a solution. The solution is allowed to come in contact with a GaAs substrate so that InGaP crystals are developed directly on the GaAs substrate without a gradient layer for coordinating the lattice constant formed on the GaAs substrate.

Abstract: A method of passivating Group III-V or II-VI semiconductor compound surfaces. The method includes selecting a passivating material having a lattice constant substantially mismatched to the lattice constant of the semiconductor compound. The passivating material is then grown as an ultrathin layer of passivating material on the surface of the Group III-V or II-VI semiconductor compound. The passivating material is grown to a thickness sufficient to maintain a coherent interface between the ultrathin passivating material and the semiconductor compound. In addition, a device formed from such method is also disclosed.

Abstract: Disclosed is a novel method to use arsine plus an alkylarsenic co-reagent to grow GaAs by OMCVD that not only allows one to take advantage of the lower toxicity and ease of decomposition of the alkylarsenic compounds, but also reduces the carbon contamination normally found in epilayers grown exclusively from these alkylarsines, and decreases the amount of arsine needed for growth of reasonably good quality GaAs epilayers.

Abstract: Submicron structure fabrication is accomplished by providing vapor chemical erosion of a compound crystal by suppressing the more volatile elements so that the less volatile element is provided with an anti-agglomeration and erosion rate limiting capability which can be followed by subsequent regrowth in the same environment. The erosion is sensitive to crystallographic orientation.

Abstract: A process for the formation of a functional deposited film containing atoms belonging to the group III and V of the peridoical table as the main constituent atoms by introducing, into a film forming space for forming a deposited film on a substrate disposed therein, a group III compound (1) and a group IV compound (2) as the film-forming raw material and, if required, a compound (3) containing an element capable of controlling valence electrons for the deposited film as the constituent element each in a gaseous state, or in a state where at least one of such compounds is previously activated in an activation space disposed separately from the film forming space, while forming hydrogen atoms in excited state which cause chemical reaction with at least one of the compounds (1), (2) and (3) in the gaseous state or in the activated state in an activation space different from the film forming space and introducing them into the film-forming space, thereby forming the functional deposited film on the substrate, whe

Abstract: A GaAs containing nucleation layer is deposited upon Si, Ge/Si, or other single crystal substrate from triethyl gallium (TEG). Deposition from TEG allows a lower deposition temperature which provides a low level of substrate contamination and improved surface morphology.

Abstract: The present invention addresses the use of at least partially fluorinated organometallic compounds in reactive deposition applications. More specifically, the present invention addresses the use of the fluoroorganometallic compounds M(CF.sub.3).sub.3, M(CF.sub.2 CF.sub.3).sub.3, or any M(C.sub.n F.sub.(2n+1)).sub.3-y H.sub.y compound where (y.ltoreq.2), M(CH.sub.2 CF.sub.3).sub.3 or any fluoroalkyl organometallics of the general formula M(C.sub.n H.sub.[(2n+1)-x] F.sub.x).sub.3-y H.sub.y, where y.ltoreq.2; x has a value 1.ltoreq.x.ltoreq.2n+1; and M=As, P, or Sb, in processes requiring deposition of the corresponding element. These uses include a number of different processes; the organometallic vapor phase epitaxy of compound semiconductor materials such as GaAs, InP, AlGaAs, InSb, etc.; doping of SiO.sub.

Abstract: An electrode structure of an electrode of a refractory metal or a silicide thereof on a layer of In.sub.x Ga.sub.1-x As (0<x<1) on a substrate of a III-V compound semiconductor is ohmic and is stable even at a high temperature, for example, 900.degree. C. This high temperature stable ohmic electrode structure allows ion implantation into the substrate with the electrode as a mask followed by annealing to form a doped region in alignment with the edge of the electrode.

Abstract: Disclosed is a vapor phase growth method of compound semiconductor in which source gases are introduced into an epitaxial growth reactor at fixed feed rates, the substrate surface is irradiated with light, and the light irradiation is turned on and off, or the intensity of light irradiation is increased or decreased, so that an epitaxial layer structure changes in the composition, and the carrier concentration and conductivity type abruptly or continuously change in the growth film in the direction of the thickness.

Abstract: An intermetallic compound semiconductor thin film comprises a single crystalline deposition thin film made of a III-V group intermetallic compound having a stoichiometry composition ratio of 1:1. When forming the III-V group semiconductor thin film by an evaporation method, a substrate temperature is initially maintained at a high level while the evaporation source temperature is gradually raised, and when the intermetallic composition of the III-V group begins to deposit on the substrate, the substrate temperature is lowered while the evaporation source temperature is maintained at the same level as existed at the time when the intermetallic compound is deposited, and the deposition time is controlled.

Abstract: A method for reducing the defect and dislocation density in III-V material layers deposited on dissimilar substrates is disclosed. The method involves ion implantation of dopant materials to create amorphous regions within the layers followed by an annealing step during which the amorphous regions are recrystallized to form substantially monocrystalline regions. The wafers produced by the process are particularly well suited for optoelectronic devices.

Abstract: A method of producing n-type III-V compound semiconductor comprises growing a plurality of monolayers of III-V compound semiconductor molecules on a III-V compound substrate; growing a single layer of group VI element on the III-V monolayers so as to occupy the lattice points for group V element by means of Atomic Layer Epitaxy process; decreasing the number of group VI element by exposing the single layer to the gas of group V element; and growing a plurality of monolayers of III-V compound semiconductor molecules on the group VI element-doped layer by means of the Atomic Layer Epitaxy process.

Abstract: An n-type III-V compound semiconductor comprises a plurality of monolayers of III-V compound semiconductor molecules having a layer-by-layer structure of group III element and group V element laminated alternately, and a group VI element-doped monolayer. The group VI element-doped monolayer is inserted into the III-V compound semiconductor molecules by occupying lattice points which were occupied by the group V element. The layers of the semiconductor are grown by Atomic Layer Epitaxy process.

Abstract: A method of manufacturing a semiconductor device is described in which gaseous material is supplied into a reaction chamber containing a substrate to cause a first epitaxial layer of a first material to grow on the substrate and switching means are then operated to alter within a predetermined period the supply of gaseous material into the reaction chamber to cause a second eitaxial layer of a second material to grow on the first layer. During the predetermined period of radiant heat source is activated to radiantly heat the surface of the first layer so as to smooth the first layer on an atomic level before growth of the second layer is commenced. The radiant heat source may be a laser capable of directing one or more laser pulses at the surface to be radiantly heated.

Abstract: A method for producing wafers having deposited layers of III-V materials on Si or Ge/Si substrates is disclosed. The method involves the use of multiple in situ and ex situ annealing steps and the formation of a thermal strain layer to produce wafers having a decreased incidence of defects and a balanced thermal strain. The wafers produced thereby are also disclosed.

Abstract: Group III-V multi-alloy semiconductors, such as ternary, quaternary, and pentanary semiconductors, grown on a binary group III-V compound semiconductor substrate, are used as an active layer in opto-devices, high electron mobility transistors, etc. A method of growing multilayers, lattice-matched to the binary substrate and having specific energy band gaps, includes a molecular beam epitaxy (MBE) process. The present invention includes growing a quaternary or pentanary semiconductor layer using a minimum number of effusion cells and eliminating readjustment of molecular beam intensities from one layer to another layer during a series of epitaxial growth steps. As an example of quaternary growth, four effusion cells are utilized and two combinations of three effusion cells are alternately operated, one including an Al effusion cell and the other including a Ga effusion cell. Each of the three effusion cells is capable of growing a ternary semiconductor lattice-matched to the substrate.

Abstract: Semi-insulating epitaxial layers of Group III-V based semiconductor compounds are produced by a MOCVD process through the use of organic titanium-based compounds. Resistivities greater than 1.times.10.sup.7 ohm/cm have been achieved.