Abstract: A multi-chamber system for providing a process of a high degree of cleanliness in fabricating semiconductor devices such as semiconductor integrated circuits. The system comprises a plurality of vacuum apparatus (e.g., a film formation apparatus, an etching apparatus, a thermal processing apparatus, and a preliminary chamber) for fabrication of semiconductor devices. At least one of these vacuum apparatuses is a laser.

Abstract: To improve the characteristics of oxides and other insulators formed by conventional techniques, particularly to improve its density, relative dielectric constant, resistance to acid, resistance to reduction and other characteristics, and to provide solid state devices or socharacteristics, the surfaces of the silicon oxide insulator, or the like, is irradiated with electrically neutral particles.

Abstract: According to the present invention, in the ion implantation step in manufacturing a semiconductor device, a resist of a resist pattern formed on a portion of a semiconductor wafer is removed from the outer peripheral portion of the semiconductor wafer, and ion implantation is performed through the resist pattern.Since the resist is removed from the outer peripheral portion, a contact portion between a semiconductor wafer fixing portion of an ion implantation unit and the semiconductor wafer is conductive. Therefore, charges generated by the ion implantation escape from the wafer fixing portion, and the semiconductor wafer is not charged, thereby preventing electrostatic breakdown.

Abstract: A method of making a dielectric isolation integrated circuit structure in which dielectric material grooves formed by ion implantation extend down into the structure and intersect a PN junction or other active region at intersection lines such that each intersection line is within microns both laterally from the center of the groove and vertically from the bottom of the groove and the grooves continuously curve at least at the intersection lines at a radius of curvature less than 1 cm.

Abstract: A semiconductor substrate and process for making are disclosed. The substrate is suitable for use in manufacturing large scale integrated circuits. The process comprises the steps of heating a semiconductor substrate at a temperature not lower than 1100.degree. C., implanting electrically inert impurities into the major surface of the substrate, heating the substrate at a temperature ranging from 600.degree. to 900.degree. C. and providing a single crystal semiconductor layer.

Abstract: A heterojunction bipolar transistor having an n- type epitaxial indium phosphide collector layer grown on a semi-insulating indium phosphide substrate with an n+ buried layer, a p- type indium phosphide base and an epitaxial, n- type boron phosphide wide gap emitter. The p- type base region is formed by ion implantation of magnesium ions into the collector layer. The transistor is applicable to millimeter wave applications due to the high electron mobility in the indium phosphide base. The wide gaps of both the boron phosphide (2.2 eV) and indium phosphide (1.34 eV) permit operation up to 350.degree. C. The transistor is easily processed using metal organic-chemical vapor deposition (MO-CVD) and standard microelectronic techniques.

Abstract: A method for annealing semiconductor samples, especially following ion-implantation of semiconductor samples is disclosed. A furnace on a set of rails is passed over the semiconductor sample which is supported on a stationary wire basket made of low thermal mass, fine tungsten wire. The furnace temperature may be about 5.degree. above the desired anneal temperature of the semiconductor sample such that the sample temperature rises to within a few degrees of the furnace temperature within seconds. Utilizing the moveable furnace insures uniform heating without elaborate temperature control or expensive beam generating equipment.The apparatus and process of the present invention are utilized for rapid annealing of ion-implanted indium phosphide semiconductors within 10 to 30 seconds and at temperatures of approximately 700.degree. C., thereby eliminating undesired and damaging movement of impurities within the ion-implanted InP.