With Particular Material Patents (Class 174/256)
-
Publication number: 20120175156Abstract: A printed circuit board includes a substrate, a plurality of metal wires, and a solder mask layer. The substrate includes a first area and a second area. The second area surrounds and does not overlap the first area. The metal wires are disposed on the first area of the substrate. One end of one of two adjacent metal wires faces one end of the other one of the two adjacent metal wires. The solder mask layer is formed on the second area of the substrate. In the present invention, a short circuit or an open circuit between the two adjacent metal wires is directly formed during processes of manufacturing the printed circuit board, whereby a jumper is not required so as to reduce a layout area, and cost of a manual post-welding treatment can be reduced.Type: ApplicationFiled: April 15, 2011Publication date: July 12, 2012Applicant: CHUNGHWA PICTURE TUBES, LTD.Inventor: CHANG-XIN HUANG
-
Patent number: 8216503Abstract: A method for manufacturing a printed circuit board, in which an oxidant capable of polymerizing conductive polymers is selectively marked on a board using imprinting, and the monomer of a conductive polymer is filled in the selected pattern and polymerized, to provide a conductive polymer wiring pattern. With the method for manufacturing a printed circuit board, a printed circuit board can be given finer wiring widths to allow a highly integrated, highly efficient printed circuit board. Thus, a printed circuit board (PCB) or a flexible printed circuit boards (FPCB) can be manufactured that is applicable to industrial, clerical, and domestic electric electronic products, by forming conductive polymer wiring using imprinting.Type: GrantFiled: June 28, 2007Date of Patent: July 10, 2012Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Jae-Choon Cho, Myeong-Ho Hong, Senug-Hyun Ra, Hyuk-Soo Lee, Jeong-Bok Kwak, Jung-Woo Lee, Choon-Keun Lee, Sang-Moon Lee
-
Patent number: 8217274Abstract: A wiring member comprising a substrate, a copper wiring layer having an electrical resistivity of not larger than 4×10?6 ?cm in directly or indirectly contact with the substrate, an aluminum diffusion layer, contiguous to the copper wiring layer, having an aluminum concentration gradient descending towards the inside, and an aluminum oxide layer contiguous to and covering the aluminum diffusion layer, wherein a ratio of a thickness of the copper wiring layer to a thickness of the aluminum diffusion layer is 1.5 to 5. The disclosure is also concerned with a method of manufacturing the wiring member and an electronic device.Type: GrantFiled: June 3, 2010Date of Patent: July 10, 2012Assignee: Hitachi, Ltd.Inventors: Hiroki Yamamoto, Takashi Naito, Takuya Aoyagi, Yuuichi Sawai, Takahiko Kato
-
Patent number: 8217271Abstract: A multilayered wiring board is composed of n wiring layers and (n?1) resin base material layers, which are alternately laminated. The (n?1) resin base material layers include fiber bundles impregnated with resin. The n wiring layers include wiring patterns and resin. When half of the wiring layers in the thickness direction of the multilayered wiring board differ in the copper remaining ratio from the other half, the multilayered wiring board might be warped during heating. The crossing point density of fiber bundles in each resin base material layer is adjusted so as to cancel the warpage caused by the difference in the copper remaining ratio between the wiring layers.Type: GrantFiled: November 10, 2009Date of Patent: July 10, 2012Assignee: Panasonic CorporationInventor: Toru Okazaki
-
Patent number: 8212150Abstract: An EMI noise reduction board is disclosed. The electromagnetic interference (EMI) noise reduction board having an electromagnetic bandgap structure for shielding a noise includes: a first area having a ground layer and a power layer; a second area placed in a side portion of the first area having an electromagnetic bandgap structure therein. The electromagnetic bandgap structure includes: a plurality of first conductive plates and a plurality of second conductive plates placed on a same planar surface along the side portion of the first area; and a stitching via configured to electrically connect the first conductive plate to the second conductive plate through a planar surface that is different from the first conductive plate and the second conductive plate.Type: GrantFiled: December 17, 2009Date of Patent: July 3, 2012Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Han Kim, Mi-Ja Han, Dae-Hyun Park, Hyo-Jic Jung, Kang-Wook Bong
-
Publication number: 20120162945Abstract: An electronic functional label and a special production process for such a label, which can be equipped with electronic components in very simple, fast, and effective manner, without a soldering process that is connected with high temperatures. For this purpose, a carrier substrate preferably having printed electronic structures is equipped with electronic components by means of an electrically conductive adhesive. The use of special electronic components (sensors and optical/acoustic actors) that interact with their surroundings proves to be particularly advantageous in this connection. High-quality labels, in particular, having surprising interactions can be produced in a simple and cost-advantageous manner.Type: ApplicationFiled: December 20, 2011Publication date: June 28, 2012Applicant: SCHREINER GROUP GMBH & CO. KGInventor: Helmut Schreiner
-
Patent number: 8189343Abstract: Embodiments are generally direct to a method and apparatus to provide power to a backplane. In one embodiment, a method is implemented in a backplane to receive power through an upper zone of the backplane. The power is provided by a rear transition power entry module (RT-PEM) operatively coupled to an interface in the upper zone. The power provided by the RT-PEM is routed to interfaces in a lower zone of the backplane. Each lower zone interface distributes at least a portion of the power to a component operatively coupled to the backplane.Type: GrantFiled: December 28, 2004Date of Patent: May 29, 2012Assignee: Intel CorporationInventors: Wen Wei, Ron W. Smith, Jagadeesh Radhakrishnan
-
Patent number: 8188372Abstract: A flex-rigid printed wiring board is provided which can retain flexibility of a flexible portion while increasing durability of the flexible portion against folding, and can ensure conduction in a rigid portion, and a method of manufacturing the printed wiring board. The flex-rigid printed wiring board includes a conductor layer provided on at least one face of a base film, one region of the wiring board containing the base film being a rigid region, an another region containing the base film being a flexible region. The average thickness “tf” of the conductor layer on the base film formed in the flexible region and the average thickness “tR” of the conductor layer on the base film formed in the rigid region satisfy the relationship of tf<tR.Type: GrantFiled: September 21, 2006Date of Patent: May 29, 2012Assignees: Daisho Denshi Co., Ltd., Tohoku UniversityInventors: Akihiro Sato, Masahiro Sasaki, Tadahiro Ohmi, Akihiro Morimoto
-
Patent number: 8183463Abstract: The present invention provides a plating film 50 including a nickel plating layer containing phosphorus and a gold plating layer formed on the nickel plating layer, wherein the nickel plating layer has a phosphorus content of 11 to 16 mass %, and wherein (3×?×100)/X is 10 or less, where X and ? are the average value and standard deviation of the phosphorus content in a surface of the nickel plating layer on the gold plating layer side, respectively; and a module substrate 100 having the plating film 50.Type: GrantFiled: August 26, 2010Date of Patent: May 22, 2012Assignee: TDK CorporationInventors: Atsushi Sato, Hisayuki Abe, Takashi Ota, Miyuki Yanagida, Masumi Kameda
-
Patent number: 8174840Abstract: A multi-functional composite substrate structure is provided. The first substrate with high dielectric constant and the second substrate with low dielectric constant and low loss tangent are interlaced above the third substrate. One or more permeance blocks may be formed above each substrate, so that one or more inductors may be fabricated thereon. One or more capacitors may be fabricated on the first substrate. Also, one or more signal transmission traces of the system impedance are formed on the second substrate of the outside layer. Therefore, the inductance of the inductor(s) is effectively enhanced. Moreover, the area of built-in components is reduced. Furthermore, it has shorter delay time, smaller dielectric loss, and better return loss for the transmission of high speed and high frequency signal.Type: GrantFiled: October 29, 2008Date of Patent: May 8, 2012Assignee: Industrial Technology Research InstituteInventors: Uei-Ming Jow, Chang-Sheng Chen, Chin-Sun Shyu, Min-Lin Lee, Shinn-Juh Lay, Ying-Jiunn Lai
-
Patent number: 8173040Abstract: Disclosed is a composition for forming a board including a benzoxazine-based compound and a liquid crystal polymer or oligomer, and a board fabricated using the same. A board comprising the composition including the benzoxazine-based compound and the liquid crystal compound, and a prepreg comprising the cured composition, are also disclosed.Type: GrantFiled: January 11, 2010Date of Patent: May 8, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Kwang-Hee Kim, Seong-Woo Choi, Myung-Sup Jung, Chung-Kun Cho, Jae-Jun Lee, Kalinina Fedosya
-
Patent number: 8173905Abstract: A wiring structure has a silicon layer, a backing layer provided on the silicon layer, the backing layer comprising a copper alloy containing a nickel, and a copper layer provided on the backing layer, and a diffusion barrier layer having an electrical conductivity, the diffusion barrier layer being provided at a region including an interface between the silicon layer and the backing layer, in which a nickel in the diffusion barrier layer is enriched compared with the backing layer.Type: GrantFiled: February 2, 2009Date of Patent: May 8, 2012Assignee: Hitachi Cable, Ltd.Inventors: Noriyuki Tatsumi, Tatsuya Tonogi
-
Patent number: 8164006Abstract: According to an embodiment of the present invention, an electromagnetic bandgap structure can include: at least three conductive plates; a first stitching via, configured to electrically connect any one of the conductive plates to another conductive plate; and a second stitching via, configured to electrically connect the one conductive plate to yet another conductive plate. In the electromagnetic bandgap structure of the present invention, the first stitching via can electrically connect the one conductive plate to another conductive plate by allowing a part of the first stitching via to be connected through a planar surface above the one conductive plate, and the second stitching via can electrically connect the one conductive plate to yet another conductive plate by allowing a part of the second stitching via to be connected through a planar surface below the one conductive plate.Type: GrantFiled: September 29, 2008Date of Patent: April 24, 2012Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Han Kim, Mi-Ja Han, Hyo-Jic Jung
-
Patent number: 8153908Abstract: The circuit board is capable of tightly bonding a cable layer on a base member even if thermal expansion coefficients of the base member and the cable layer are significantly different. The circuit board comprises: the base member; and the cable layer being laminated on the base member with anchor patterns, which are electrically conductive layers formed on a surface of the base member.Type: GrantFiled: July 15, 2008Date of Patent: April 10, 2012Assignee: Fujitsu LimitedInventors: Kenji Iida, Tomoyuki Abe, Yasutomo Maehara, Shin Hirano, Takashi Nakagawa, Hideaki Yoshimura, Seigo Yamawaki, Norikazu Ozaki
-
Publication number: 20120080217Abstract: A touch screen panel according to an embodiment includes a substrate; an electrode forming part including a plurality of first electrode serials arranged in parallel in a first direction and a plurality of second electrode serials arranged in parallel in a second direction to cross the first direction, and each of the first electrode serials including a plurality of first electrode patterns, each of the second electrode serials including a plurality of second electrode patterns; and a routing wire forming part formed on the substrate outside the electrode forming part, and including a plurality of first routing wires connected to the plurality of first electrode serials, respectively and a plurality of second routing wires connected to the plurality of second electrode serials, respectively.Type: ApplicationFiled: September 23, 2011Publication date: April 5, 2012Inventors: Dongsup KIM, Sohaeng Cho
-
Patent number: 8148641Abstract: An anisotropic conductive material prevents conduction resistance from varying among bumps or among linear terminals when connecting an IC chip or a flexible wire to a wiring board via the anisotropic conductive material. The anisotropic conductive material is formed by dispersing conductive particles in an insulating binder. The minimum melt viscosity [?0] thereof is in a range of from 1×102 to 1×106 mPa·sec, and satisfies the following equation (1): 1<[?1]/[?0]?3??(1) where in the equation (1), [?0] represents the minimum melt viscosity of the anisotropic conductive material, and [?1] represents a melt viscosity at a temperature T1 which is 30° C. lower than a temperature T0 at which the minimum melt viscosity is exhibited.Type: GrantFiled: April 15, 2008Date of Patent: April 3, 2012Assignees: Sony Corporation, Sony Chemical & Information Device CorporationInventors: Yoshito Tanaka, Jun Yamamoto
-
Patent number: 8147633Abstract: There are provided a method of manufacturing a ceramic sintered body. A method of manufacturing a ceramic sintered body according to one aspect of the invention may include: preparing at least one ceramic sheet having first ceramic particles and glass particles; preparing at least one constraining sheet having second ceramic particles having a smaller particle size than the glass particles and the first ceramic particles; forming a ceramic laminate by alternating the ceramic sheet and the constraining sheet while the ceramic sheet and the constraining sheet are in contact with each other; and sintering the ceramic laminate so that components, which do not react with the first ceramic particles, from the glass particle are moved into the constraining sheet to sinter the constraining sheet when the ceramic sheet is sintered.Type: GrantFiled: July 1, 2011Date of Patent: April 3, 2012Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Soo Hyun Lyoo, Yong Seok Choi
-
Publication number: 20120075038Abstract: In a wiring substrate, a wiring layer includes a pair of differential transmission lines. A conductive layer is provided on one side of the wiring layer. The conductive layer is grounded. An insulating layer is provided between the wiring layer and the conductive layer. The conductive layer includes a region, formed by an electrically continuous conductor, within a filter region. At least part of the conductor is turned around in the region. Seen from a stacking direction, the pair of differential transmission lines intersects with at least two strip portions disposed counter to each other because of the turning-around of the electrically continuous conductor.Type: ApplicationFiled: September 30, 2009Publication date: March 29, 2012Inventor: Yasuhiro Kaizaki
-
Patent number: 8143529Abstract: Plural thermoplastic resin films, each having a circuit pattern formed thereon, are laminated. Via-holes filled with conductor paste are formed in the thermoplastic films to electrically connect neighboring layers. The laminated body is pressed under heat between a pair of hot press plates to thereby form an integral body of multi-layer circuit board. To apply a uniform pressure to the laminated body in the pressing process, a projected portion formed on a pressure-adjusting sheet is pushed against a portion of the laminated body where the number of laminated circuit patterns is smaller than other portions. In this manner, the plural thermoplastic films are uniformly bonded together, and the paste in the via-holes is sufficiently converted into an alloy. Thus, reliability of the laminated multi-layer circuit board is enhanced.Type: GrantFiled: July 31, 2007Date of Patent: March 27, 2012Assignee: Denso CorporationInventors: Toshikazu Harada, Kouji Kondo
-
Patent number: 8142905Abstract: Provided is a copper foil for a printed circuit board comprising a layer including nickel, zinc, a compound of nickel and that of zinc (hereinafter referred to a “nickel zinc layer”) on a roughened surface of a copper foil, and a chromate film layer on the nickel zinc layer, wherein the zinc add-on weight per unit area of the nickel zinc layer is 180 ?g/dm2 or more and 3500 ?g/dm2 or less, and the nickel weight ratio in the nickel zinc layer {nickel add-on weight/(nickel add-on weight+zinc add-on weight)} is 0.38 or more and 0.7 or less. This surface treatment technology of a copper foil is able to effectively prevent the circuit corrosion phenomenon in cases of laminating a copper foil on a resin base material and using a sulfuric acid hydrogen peroxide etching solution to perform soft etching to the circuit.Type: GrantFiled: May 29, 2009Date of Patent: March 27, 2012Assignee: JX Nippon Mining & Metals CorporationInventors: Terumasa Moriyama, Kengo Kaminaga
-
Patent number: 8143530Abstract: A substrate and method for making same for use in electronic packages having a core layer of copper-invar-copper (CIC) with a layer of polytetrafluoroethylene (PTFE) placed upon both sides of the CIC. A layer of etched copper foil is placed on the outer surface of each PTFE layer. A layer of liquid crystal polymer (LCP) is placed on both layers of etched copper foil. An external layer of etched copper foil is placed on the external surface of the LCP layers.Type: GrantFiled: September 17, 2010Date of Patent: March 27, 2012Assignee: Endicott Interconnect Technologies, Inc.Inventors: Rabindra N. Das, Michael Rowlands
-
Patent number: 8138422Abstract: A Printed Circuit Board (PCB) and a method for manufacturing the same are provided. A circuit pattern is formed by printing conductive ink/paste on a substrate, and sintering a layer of the conductive ink or curing a layer of the conductive paste by applying heat. A primary plating layer is formed through electroless plating or electrolytic plating of a high-melting point metal on the circuit pattern. A secondary plating layer is formed through electroless plating or electrolytic plating of a precious metal on the primary plating layer to improve wetting with solder.Type: GrantFiled: July 30, 2009Date of Patent: March 20, 2012Assignee: Samsung Electronics Co., LtdInventors: Se-Ho Park, Ki-Hyun Kim, Seok-Myong Kang, Young-Min Lee
-
Patent number: 8134082Abstract: A solid printed circuit board is manufactured by bonding upper and lower printed circuit boards having different shapes and provided with wirings formed on surfaces thereof. A bonding layer is made of insulating material containing thermosetting resin and inorganic filler dispersed therein, and has a via-conductor made of conductive paste filling a through-hole perforated in a predetermined position of the bonding layer. This circuit board provides a packaging configuration achieving small size and thickness and three-dimensional mounting suitable for semiconductors of high performance and multiple-pin structure.Type: GrantFiled: May 28, 2008Date of Patent: March 13, 2012Assignee: Panasonic CorporationInventors: Tadashi Nakamura, Fumio Echigo, Takayuki Kita, Kota Fukasawa, Shogo Hirai
-
Patent number: 8134080Abstract: A wired circuit board that can provide an enhanced adhesion of a metal supporting board at a marginal portion of an opening formed in the metal supporting board with a simple structure to prevent stripping of the metal supporting board. In a suspension board with circuit, in order to reduce a transmission loss of a conductive pattern, a metal foil embedded in an insulating base layer is formed in a pattern comprising a first metal foil portion and a second metal foil portion surrounding the first metal foil portion spaced apart therefrom, and an opening is formed in the metal supporting board so that a marginal portion of the opening is located in a space between the first metal foil portion and the second metal foil portion.Type: GrantFiled: June 30, 2006Date of Patent: March 13, 2012Assignee: Nitto Denko CorporationInventors: Jun Ishii, Yasuhito Ohwaki, Yasuhito Funada
-
Patent number: 8134081Abstract: A three-dimensional circuit board is formed by comprising a board, a first wiring-electrode group provided on a plurality of steps above the board, and a second wiring-electrode connected to the first wiring-electrode group at least in an altitude direction, in which at least a connecting portion between the first wiring-electrode group and the second wiring-electrode is integrated in a continuously identical shape.Type: GrantFiled: January 12, 2007Date of Patent: March 13, 2012Assignee: Panasonic CorporationInventors: Daisuke Sakurai, Yoshihiko Yagi
-
Patent number: 8134077Abstract: Disclosed is a heat dissipating circuit board, which includes a metal core including an insulating layer formed on the surface thereof, a circuit layer formed on the insulating layer and including a seed layer and a first circuit pattern, and a heat dissipating frame layer bonded onto the circuit layer using solder and having a second circuit pattern, and in which the heat dissipating frame layer is bonded onto the circuit layer not by a plating process but by using solder, thus reducing the cost and time of the plating process and relieving stress applied to the heat dissipating circuit board due to the plating process. A method of manufacturing the heat dissipating circuit board is also provided.Type: GrantFiled: November 7, 2009Date of Patent: March 13, 2012Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Hye Sook Shin, Seog Moon Choi, Shan Gao, Chang Hyun Lim, Tae Hyun Kim, Young Ki Lee
-
Patent number: 8129623Abstract: The invention relates to a resin film having a high adhesiveness to other materials, an adhesive sheet, a circuit board and an electronic apparatus in which an adhesive layer and the resin film are firmly adhered. A resin film (1) includes a plurality of projected portions (10) each having a filler (9) in an apex portion (10a) and a resin material. The projected portions (10) are formed on at least one surface of a sheet portion (16).Type: GrantFiled: January 29, 2007Date of Patent: March 6, 2012Assignee: Kyocera CorporationInventors: Tadashi Nagasawa, Masaharu Shirai, Kenji Kume, Yutaka Tsukada
-
Patent number: 8119924Abstract: Stress concentration at the connecting portion of the electronic component and the curved board and the area around the connecting portion is suppressed. In a flexible wiring board, insulation layers (11, 13) and wiring layers (12, 15) are piled up alternately and wiring layers (12, 15) are via-connected each other. The board comprises reinforced area (10a) reinforced against external stress, bending area (10c) bending easier than the reinforced area (10a) by external stress, and a stress relaxation area (10b) provided in area between the reinforced area (10a) and the bending area (10c), bending easier than the reinforced area (10a) but not easier than the bending area (10c) by the external stress, and relaxing the stress carried from the bending area (10c) to the reinforced area (10a).Type: GrantFiled: March 30, 2007Date of Patent: February 21, 2012Assignee: NEC CorporationInventors: Katsumi Abe, Kenichiro Fujii, Atsumasa Sawada
-
Patent number: 8119922Abstract: Two panel-sized fully populated printed wiring board assemblies formed together, with an anisotropic epoxy that provides electrical connection for RF signals and DC supplies without the need for wirebonds, mechanical interconnects or solder balls.Type: GrantFiled: September 30, 2008Date of Patent: February 21, 2012Assignee: The Boeing CompanyInventor: Robert T. Worl
-
Patent number: 8112881Abstract: A process for manufacturing a multilayer wiring board including the steps of forming an insulating layer on a base provided with a bump for interlayer connection, bonding a copper foil onto the insulating layer by a thermocompression bonding by sandwiching the copper foil between stainless steel plates, and patterning the copper foil, in which a metal foil is interposed at least between each of the stainless plates and the copper foil at the time of the thermocompression bonding. At this time, a mold release layer is formed on a surface of the metal foil to be imposed. Thus, such a multilayer wiring board can be manufactured that prevents sticking of a product after molding (cementing of the copper foil) and excels in dimensional stability without occurrence of wrinkling and ruggedness.Type: GrantFiled: September 29, 2005Date of Patent: February 14, 2012Assignees: Tessera Interconnect Materials, Inc., Sony Chemical & Information Device CorporationInventors: Kazuhiro Shimizu, Masanobu Yagi, Kenichiro Hanamura, Mitsuyuki Takayasu, Kiyoe Nagai, Tomoo Iijima
-
Publication number: 20120031655Abstract: A process for fabricating a multi-layer circuit assembly is provided. The process includes (a) providing a substrate at least one area of which comprises a plurality of vias area(s) having a via density of 500 to 10,000 holes/square inch (75 to 1550 holes/square centimeter); (b) applying a dielectric coating onto all exposed surfaces of the substrate to form a conformal coating thereon; (c) removing the dielectric coating in a predetermined pattern to expose sections of the substrate; (d) applying a layer of metal to all surfaces to form metallized vias through and/or to the electrically conductive core; (e) applying a resist to the metal layer to form a photosensitive layer thereon; (f) imaging resist in predetermined locations; (g) developing resist to uncover selected areas of the metal layer; and (h) etching uncovered areas of metal to form an electrical circuit pattern connected by the metallized vias.Type: ApplicationFiled: October 18, 2011Publication date: February 9, 2012Applicant: PPG INDUSTRIES OHIO, INC.Inventors: Kevin C. Olson, Alan G. Wang
-
Patent number: 8106310Abstract: A multi-layer printed circuit board having interlayer resin insulating layers on both sides of a core substrate, respectively, through holes provided to penetrate the core substrate and filled with resin filler, the interlayer resin insulating layers and conductor circuits provided. The resin filler contains an epoxy resin, a curing agent and 10 to 50% of inorganic particles.Type: GrantFiled: September 15, 2009Date of Patent: January 31, 2012Assignee: Ibiden Co., Ltd.Inventors: Yogo Kawasaki, Hiroaki Satake, Yutaka Iwata, Tetsuya Tanabe
-
Patent number: 8097335Abstract: Prepregs, laminates, printed wiring board structures and processes for constructing materials and printed wiring boards that enable the construction of printed wiring boards with improved thermal properties. In one embodiment, the prepregs include substrates impregnated with electrically and thermally conductive resins. In other embodiments, the prepregs have substrate materials that include carbon. In other embodiments, the prepregs include substrates impregnated with thermally conductive resins. In other embodiments, the printed wiring board structures include electrically and thermally conductive laminates that can act as ground and/or power planes.Type: GrantFiled: February 18, 2010Date of Patent: January 17, 2012Assignee: Stablcor Technology, Inc.Inventors: Kalu K. Vasoya, Bharat M. Mangrolia, William E. Davis, Richard A. Bohner
-
Patent number: 8097946Abstract: A device mounting board includes an insulating layer formed of an insulating resin, a glass cloth covering the surface of the insulating layer, and an electrode provided in a through hole extending through the glass cloth. The angle of contact with solder of the glass cloth is larger than that of the resin. Thus, solder bumps are formed on the electrode 14 of the device mounting board 10 with high precision.Type: GrantFiled: October 31, 2008Date of Patent: January 17, 2012Assignee: Sanyo Electric Co., Ltd.Inventors: Kouichi Saitou, Mayumi Nakasato, Ryosuke Usui
-
Patent number: 8091222Abstract: An adapter apparatus and methods for using in providing such adapter apparatus include providing a substrate having a plurality of openings defined therethrough. A plurality of conductive elements are mounted within corresponding openings thereof using a curable material.Type: GrantFiled: June 3, 2010Date of Patent: January 10, 2012Assignee: Ironwood Electronics, Inc.Inventors: Mickiel P. Fedde, Kenneth I. Krawza
-
Patent number: 8094459Abstract: A microelectronic substrate, a method of forming the same, and a system including the same. The microelectronic substrate comprises: a conductive layer; a spacer layer disposed onto the conductive dielectric layer; a dielectric build-up layer disposed onto the spacer layer, the spacer layer being made of a material that has a lower shrinkage than a material of the embedding dielectric-build-up layer during curing, and a higher viscosity than a material of the embedding dielectric build-up layer in its pre-cure form and during curing; and active or passive microelectronic components embedded within the dielectric build-up layer.Type: GrantFiled: October 4, 2010Date of Patent: January 10, 2012Assignee: Intel CorporationInventors: Islam Salama, Huankiat Seh
-
Publication number: 20120000697Abstract: Disclosed herein is a printed circuit board, including: a substrate having a cavity formed therein; an anodic oxide layer formed by anodizing the substrate; and a circuit layer formed in the cavity. The printed circuit board is advantageous in that, since a circuit layer is formed in a cavity of a substrate, a circuit layer having a thickness necessary for realizing a high-power semiconductor package can be easily formed, and the difficulty of supplying and demanding the raw material of a thick film plating resist can be overcome. Further, the printed circuit board is advantageous in that electrical shorts occurring at the time of forming a thick circuit layer and electrical shorts generated by the compounds remaining after etching can be prevented, thus improving the electrical reliability and stability of a circuit layer.Type: ApplicationFiled: November 24, 2010Publication date: January 5, 2012Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Jung Eun Kang, Seog Moon Choi, Sung Keun Park, Chang Hyun Lim, Kwang Soo Kim
-
Patent number: 8089003Abstract: A printed circuit board substrate includes an insulation matrix and a waterproof layer. The insulation matrix includes a first surface and a second surface at an opposite side thereof to the first surface. The waterproof layer is formed in the insulation matrix and is arranged between the first surface and the second surface for blocking water from passing therethrough in a thicknesswise direction of the insulation matrix.Type: GrantFiled: March 28, 2008Date of Patent: January 3, 2012Assignee: Zhen Ding Technology Co., Ltd.Inventors: Wen-Chin Lee, Cheng-Hsien Lin
-
Patent number: 8089138Abstract: A surface-hydrophobicized film is provided which is in contact with an insulating film, and has a higher hydrophobicity than the insulating film at the time of the contact, and which is in contact, on an opposite side of the surface-hydrophobicized film, with wiring, and contains at least one atom selected from the group consisting of sulfur atoms, phosphorus atoms and nitrogen atoms. Semiconductor devices with wiring layers having a low leakage current, a high EM resistance and a high TDDB resistance can be manufactured by using the film.Type: GrantFiled: August 21, 2009Date of Patent: January 3, 2012Assignee: Fujitsu LimitedInventors: Tadahiro Imada, Yoshihiro Nakata
-
Publication number: 20110315434Abstract: The object of the present invention is to provide an aluminum hydroxide powder for filling in resin, which is excellent fillability in resin. Provided is an aluminum hydroxide powder forfilling in resin, being characterized in that it comprises a gibbsite crystal structure.Type: ApplicationFiled: February 12, 2010Publication date: December 29, 2011Applicant: SUMITOMO CHEMICAL COMPANY, LIMITEDInventor: Yusuke Kawamura
-
Patent number: 8084692Abstract: An apparatus having reduced noise coupling includes a core layer having an upper and lower surface, the upper and lower surface each including a copper sheet layer, a pre-preg layer having an upper surface and a lower surface, the upper surface of the pre-preg layer coupled to the lower surface of the core layer, a core insulating layer having an upper surface and a lower surface, the upper surface of the core insulating layer coupled to the lower surface of the pre-preg layer, a return current reference layer disposed on the lower surface of the core insulator layer and high-speed signal traces disposed on the upper surface of the core insulating layer, each of the high speed signal traces disposed on a pedestal defined by a section of the pre-preg layer and the core insulating layer, each pedestal being separated by an air gap disposed between adjacent pedestals.Type: GrantFiled: October 25, 2007Date of Patent: December 27, 2011Assignee: International Business Machines CorporationInventors: Moises Cases, Bradley D. Herrman, Kent B. Howieson, Erdem Matoglu, Bhyrav M. Mutnury, Pravin S. Patel, Nam H. Pham, Caleb J. Wesley
-
Publication number: 20110308843Abstract: Provided is a transparent thin plate including a transparent substrate in a sheet form, a mesh layer formed on a surface of the transparent substrate and made of an opaque material having a structure wherein an outline of meshes is made of bands that are very thin and have a substantially equal width, and having a light transmittance of 50% or more, and a colored layer that is arranged in a state that the layer is laminated in a partial area of the mesh layer and on the surface of the mesh layer, and has a color different from that of the opaque material constituting the mesh layer.Type: ApplicationFiled: April 9, 2008Publication date: December 22, 2011Inventors: Shuzo Okumura, Ryomei Omote, Takao Hashimoto, Yuki Matsui
-
Patent number: 8080737Abstract: Provided are a ceramic substrate, a method of manufacturing the same, and an electrical device using the same. A ceramic substrate includes a first laminated body, a second laminated body and an adhesive part. The first laminated body includes a predetermined electrode formed therein. The second laminated body is laminated on and electrically connected to the first laminated body. Also, the adhesive part is intervened between the first laminated body and the second laminated body to adhere the first and second laminated bodies through interfacial reaction.Type: GrantFiled: December 23, 2008Date of Patent: December 20, 2011Assignee: Samsung Electro-Mechanics Co., Ltd.Inventor: Seung Gyo Jeong
-
Patent number: 8071271Abstract: Disclosed is a method for producing a conductive film, which includes a silver metal forming step for forming a silver metal portion by exposing and developing a photosensitive material which has a silver salt-containing layer containing a silver salt on a supporting body, and a smoothing step for smoothing the silver metal portion. The smoothing step is performed by calender roll at a line pressure of not less than 1960 N/cm (200 kgf/cm). Consequently, the surface resistance of the film after development can be reduced in production of a conductive film which is effective for shielding electromagnetic waves.Type: GrantFiled: March 28, 2008Date of Patent: December 6, 2011Assignee: Fujifilm CorporationInventors: Akira Ichiki, Makoto Kusuoka
-
Patent number: 8071887Abstract: A printed circuit board includes a substrate having a surface, a circuit layer having a plurality of electrical traces formed on the surface, and an electrically conductive metal layer formed on the circuit layer. The circuit layer is comprised of a composite of carbon nano-tubes and metallic nano-particles.Type: GrantFiled: October 17, 2008Date of Patent: December 6, 2011Assignees: FuKui Precision Component (Shenzhen) Co., Ltd., Zhen Ding Technology Co., Ltd.Inventors: Shing-Tza Liou, Yao-Wen Bai, Cheng-Hsien Lin
-
Patent number: 8061025Abstract: A method of manufacturing a heat radiation substrate having a metal core, including injection-molding mixed powder of carbon nanotubes and metal in a die to fabricate a metal core having through holes; molding the entire metal core including the through holes with an insulating resin to fabricate a metal core substrate; processing the insulating resin provided in the through holes to form connection holes; and forming a circuit pattern on the metal core substrate in which the connection holes are formed.Type: GrantFiled: December 14, 2010Date of Patent: November 22, 2011Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Seung Hyun Cho, Byoung Youl Min, Soon Jin Cho, Jin Won Choi
-
Publication number: 20110278049Abstract: The present invention relates to a photosensitive resin composition which is developable with an alkaline aqueous solution and does not need a high temperature for curing and the like, and has all the properties suitable for use in a cover film of a printed circuit board or a laminated body for a semiconductor, and a dry film comprising the same. The photosensitive resin composition comprises (A) a polyamic acid comprising a polymer of at least one diamine compound and at least one acid dianhydride; (B) a photopolymerizable compound having at least one polymerizable ethylenic unsaturated bond in its molecule; and (C) a photoinitiator.Type: ApplicationFiled: July 26, 2011Publication date: November 17, 2011Applicant: LG CHEM, LTD.Inventors: Hee-Jung KIM, You-Jin KYUNG, Kwang-Joo LEE
-
Patent number: 8058559Abstract: A flexible printed circuit board includes: a base film that has electrical insulation property; a conductive pattern that is formed on the base film and including a pair of differential signal lines and a ground line; an insulating layer that is formed on the conductive pattern; a conductive layer that is formed on the insulating layer; and a connecting portion that electrically connects the ground line and the conductive layer through a penetration hole formed on the insulating layer.Type: GrantFiled: May 2, 2008Date of Patent: November 15, 2011Assignee: Kabushiki Kaisha ToshibaInventors: Kiyomi Muro, Akihiko Happoya
-
Patent number: 8058563Abstract: An interposer includes an inorganic insulating layer, a first wiring formed in or on a surface of the inorganic insulating layer, an organic insulating layer formed over the inorganic insulating layer and on the first wiring, a second wiring formed on the organic insulating layer, and a conductor portion connecting the first wiring and the second wiring.Type: GrantFiled: December 29, 2008Date of Patent: November 15, 2011Assignee: Ibiden Co., Ltd.Inventors: Hajime Sakamoto, Toshiki Furutani, Hiroshi Segawa
-
Patent number: 8058562Abstract: A wiring substrate is provided. The wiring substrate includes: a core layer in which a gap is formed; and a lamination layer which includes an insulating layer and a wiring layer and which is formed on at least one surface of the core layer. The lamination layer has a thermal expansion coefficient different from that of the core layer. A plurality of mounting regions on which an electronic component is to be mounted are provided on the lamination layer to be spaced from each other. The gap in the core layer is filled with an insulating member having the same material as the insulating layer and surrounds each of the plurality of mounting regions or each of mounting region groups including one or more of the mounting regions.Type: GrantFiled: December 18, 2008Date of Patent: November 15, 2011Assignee: Shinko Electric Industries Co., Ltd.Inventor: Toshiyuki Kuramochi