With Electrical Device Patents (Class 174/260)
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Patent number: 10477683Abstract: A printed circuit board includes: a core member including a through-hole; a sub-circuit board disposed in the through-hole; a first insulating layer disposed on opposing surfaces of the core member and opposing surfaces of the sub-circuit board; and an insulating material disposed between an inner wall of the through-hole and the sub-circuit board.Type: GrantFiled: January 6, 2017Date of Patent: November 12, 2019Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Yong-Ho Baek, Jung-Hyun Cho, Seung-Yeop Kook
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Patent number: 10475736Abstract: Aspects of the embodiments are directed to an IC chip that includes a substrate comprising a first metal layer, a second metal layer, and a ground plane residing on the first metal layer. The second metal layer can include a first signal trace, the first signal trace electrically coupled to a first signal pad residing in the first metal layer by a first signal via. The second metal layer can include a second signal trace, the second signal trace electrically coupled to a second signal pad residing in the first metal layer by a second signal via. The substrate can also include a ground trace residing in the second metal layer between the first signal trace and the second signal trace, the ground trace electrically coupled to the ground plane by a ground via. The vias coupled to the traces can include self-aligned or zero-misaligned vias.Type: GrantFiled: September 28, 2017Date of Patent: November 12, 2019Assignee: Intel CorporationInventors: Aleksandar Aleksov, Arnab Sarkar, Arghya Sain, Kristof Darmawikarta, Henning Braunisch, Prashant D. Parmar, Sujit Sharan, Johanna M. Swan, Feras Eid
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Patent number: 10475748Abstract: A fan-out semiconductor package includes: a frame including insulating layers, wiring layers, and connection via layers, and having a recess portion having a stopper layer; a semiconductor chip having connection pads and disposed in the recess portion so that an inactive surface is connected to the stopper layer; a first encapsulant covering at least portions of the semiconductor chip and filling at least portions of the recess portion; an electronic component disposed on the other surface of the frame opposing one surface of the frame in which the semiconductor chip is disposed; a second encapsulant covering at least portions of the electronic component; and a connection member disposed on the frame and an active surface of the semiconductor chip and including a redistribution layer, wherein the connection pads and the electronic component are electrically connected to each other through the wiring layers and the redistribution layer.Type: GrantFiled: May 16, 2018Date of Patent: November 12, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jeong Ho Lee, Myung Sam Kang, Young Gwan Ko, Shang Hoon Seo, Jin Su Kim
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Patent number: 10470297Abstract: A printed circuit board according to an embodiment of the present invention, which is configured to be disposed on an inner surface of an airtight case having an opening so as to hermetically cover the opening, includes a shielding layer containing a liquid crystal polymer as a main component at least in a region covering the opening. An electronic component according to another embodiment of the present invention includes an airtight case having an opening and a printed circuit board disposed on an inner surface of the airtight case so as to hermetically cover the opening, wherein the printed circuit board includes a shielding layer containing a liquid crystal polymer as a main component at least in a region covering the opening.Type: GrantFiled: October 3, 2016Date of Patent: November 5, 2019Assignee: SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.Inventors: Aya Takasaki, Yoshihito Yamaguchi
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Patent number: 10466428Abstract: An optical waveguide device includes an optical-electrical hybrid substrate and a lens component mounted on the optical-electrical hybrid substrate. The optical-electrical hybrid substrate includes a wiring substrate and an optical waveguide on the wiring substrate. An optical path changer is arranged on an end of the optical waveguide. The optical waveguide includes an opening configured to expose a connection pad of the wiring substrate. The lens component includes a component body including a conductive member receptacle at a position corresponding to the opening of the optical waveguide. The lens component includes a conductive member partially accommodated in the conductive member receptacle and configured to connect the lens component to the connection pad.Type: GrantFiled: November 9, 2018Date of Patent: November 5, 2019Assignee: Shinko Electric Industries Co., LTD.Inventor: Kenji Yanagisawa
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Patent number: 10470308Abstract: A circuit board assembly comprising a printed circuit main board and a printed circuit sub-board, to avoid layout constraints, can support components on either board. The printed circuit main board includes first signal layer, and first and second through holes in the first signal layer. A first wire electrically couples a first electronic component and the first through hole. A second signal layer with third and fourth through holes is found on the printed circuit sub-board. The third through hole is electrically coupled to the first through hole, and the fourth through hole is electrically coupled to the second through hole.Type: GrantFiled: November 9, 2018Date of Patent: November 5, 2019Assignees: HONGFUJIN PRECISION INDUSTRY (WUHAN) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Hou-Yuan Chou, Ming-Fang Chen, Yi-Chih Wu
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Patent number: 10461447Abstract: A socket comprises a housing made of an insulating board and a plurality of contacts arranged on a first surface of the housing. The housing has a plurality of passageways. Each passageway extends through the housing and has an inner wall surface plated with a conductive material. The housing also has a conductive pad formed on a second surface of the housing so as to correspond to one of the passageways. The conductive pad is electrically continuous with the conductive material of the inner wall surface of the passageway and extends from the passageway. The housing also has a solder ball attached to the conductive pad. Each of the contacts corresponds to one of the plurality of passageways and is electrically connected to both the conductive material of the inner wall surface of the passageway and a contact pad of an electronic component.Type: GrantFiled: March 29, 2018Date of Patent: October 29, 2019Assignee: Tyco Electronics Japan G.K.Inventor: Hidenori Taguchi
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Patent number: 10453805Abstract: A chip stack having a protection structure for semiconductor device package, which comprises a first chip and a second chip stacked with each other, wherein said first chip has a first surface, said second chip has a second surface, said first surface and said second surface are two surfaces facing to each other, wherein at least one metal pillar is formed on at least one of said first surface and said second surface and connected with the other, at least one protection ring is formed on at least one of said first surface and said second surface and having a first gap with the other, and at least one electrical device is formed on at least one of said first surface and said second surface, wherein said at least one electrical device is located inside at least one of said at least one protection ring.Type: GrantFiled: May 5, 2016Date of Patent: October 22, 2019Assignee: WIN SEMICONDUCTORS CORP.Inventors: Pei-Chun Liao, Po-Wei Ting, Chih-Feng Chiang, Yu-Kai Wu, Yu-Fan Chang, Re-Ching Lin, Shu-Hsiao Tsai, Cheng-Kuo Lin
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Patent number: 10453786Abstract: An electronics package is disclosed herein that includes a glass substrate having an exterior portion surrounding an interior portion thereof, wherein the interior portion has a first thickness and the exterior portion has a second thickness larger than the first thickness. An adhesive layer is formed on a lower surface of the interior portion of the glass substrate. A semiconductor device having an upper surface is coupled to the adhesive layer, the semiconductor device having at least one contact pad disposed on the upper surface thereof. A first metallization layer is coupled to an upper surface of the glass substrate and extends through a first via formed through the first thickness of the glass substrate to couple with the at least one contact pad of the semiconductor device.Type: GrantFiled: January 19, 2016Date of Patent: October 22, 2019Assignee: General Electric CompanyInventors: Arun Virupaksha Gowda, Paul Alan McConnelee, Nancy Cecelia Stoffel, Risto Ilkka Tuominen
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Patent number: 10446322Abstract: A composite electronic component includes: a composite including a capacitor body including a plurality of dielectric layers and a plurality of internal electrodes alternately disposed with respective dielectric layers interposed therebetween, external electrodes extending from third and fourth surfaces of the capacitor body to portions of the first, second, fifth, and sixth surfaces, respectively, a discharge layer disposed between the external electrodes on the second surface of the capacitor body, and a protective layer disposed on the discharge layer; and conductive resin layers overlapping the third and fourth surfaces and portions of the first, second, fifth, and sixth surfaces, respectively. Widths of portions of the external electrodes formed on the first surface of the capacitor body are greater than widths of portions of the first and second conductive resin layers overlapping the first surface of the capacitor body.Type: GrantFiled: January 25, 2018Date of Patent: October 15, 2019Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventor: Ho Yoon Kim
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Patent number: 10446526Abstract: A face-to-face semiconductor assembly is characterized by a semiconductor device positioned in a dielectric recess of a core base and surrounded by an array of metal posts. The recess in the core provides lateral displacement control between the device and the metal posts, and the minimal height of the metal posts needed for the vertical connection between both opposite sides of the core base can be reduced by the amount equal to the depth of the recess. Further, the semiconductor device is face-to-face electrically coupled to another semiconductor device through a buildup circuitry therebetween.Type: GrantFiled: September 6, 2018Date of Patent: October 15, 2019Assignee: BRIDGE SEMICONDUCTOR CORP.Inventors: Charles W. C. Lin, Chia-Chung Wang
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Patent number: 10448499Abstract: In one example, a flexible circuit board includes a signal line disposed between a first ground and a second ground; a dielectric disposed between the first ground and the signal line and between the second ground and the signal line; and via holes formed by filling a plurality of holes, which are formed in a vertical direction such that the first ground and the second ground are electrically connected, with conductors, wherein the signal line is laterally bent so as to be spaced apart from positions where the via holes are formed.Type: GrantFiled: December 19, 2018Date of Patent: October 15, 2019Assignee: GigaLane Co., Ltd.Inventors: Sang Pil Kim, Byung Hoon Jo, Da Yeon Lee, Byung Yeol Kim, Hee seok Jung
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Patent number: 10442350Abstract: A light assembly for a vehicle comprises: a light source that emits light; a reflector that reflects the light emitted by the light source to a reflected focal point; and an optical device through which the light emitted by the light source transmits, the optical device having an optical focal point; wherein the optical focal point and the reflected focal point are approximately the same focal point. The light leaving the optical device is directed toward a target illuminance area that allows a driver or passenger of the vehicle to read. The light source is an LED. The optical device is a lens. The reflector is an elliptical reflector. The light assembly further comprises a printed circuit board and the LED is mounted on the printed circuit board.Type: GrantFiled: May 31, 2017Date of Patent: October 15, 2019Assignee: Ford Global Technologies, LLCInventors: Linsheng Chen, Steven J. Antilla
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Patent number: 10446932Abstract: The disclosure relates to a flexible printed circuit board of longitudinal shape comprising at least one conductive track extending over the length of the flexible printed circuit, the flexible printed circuit board comprising at least one folding area shaped so as to allow said flexible printed circuit board to pass from an unfolded state to a folded state in which the conductive track forms at least one antenna loop.Type: GrantFiled: June 16, 2016Date of Patent: October 15, 2019Assignee: INGENICO GROUPInventors: Jerome Andre, Vincent Hernandez
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Patent number: 10440849Abstract: Examples herein disclose an apparatus. The apparatus includes a first socket nested in a second socket. The first socket includes a cavity, disposed in the first socket, to accept a chipset. The first socket includes an electrical contact, disposed in the cavity, to couple the chipset to a board. The chipset detects when a modular infrastructure is coupled to the second socket.Type: GrantFiled: June 19, 2015Date of Patent: October 8, 2019Assignee: Hewlett Packard Enterprise Development LPInventors: Kevin B. Leigh, George D. Megason, John Norton
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Patent number: 10424538Abstract: An anisotropic conductive film that is capable of suppressing the occurrence of short circuit during anisotropic conductive connection of electrical components having decreased pitch, and suppressing a decrease in conduction reliability during storage under a high temperature and high humidity environment has a structure in which a conductive particle-containing layer containing conductive particles that are arranged in a single layer in a layered binder resin composition is layered on at least a first insulating resin composition layer. The lowest melt viscosity of the binder resin composition is equal to or higher than that of a first insulating resin composition. A second insulating resin composition layer is further layered on a surface of the conductive particle-containing layer on a side opposite to the first insulating resin composition layer. The lowest melt viscosity of the binder resin composition is higher than those of the first and second insulating resin compositions.Type: GrantFiled: September 18, 2014Date of Patent: September 24, 2019Assignee: DEXERIALS CORPORATIONInventor: Seiichiro Shinohara
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Patent number: 10416399Abstract: Disclosed is an easily fixed optical fiber connector, including a connecting member, an optical component and an optical fiber. The connecting member is provided with an hole, an optical fiber core of the optical fiber passes through the hole; an end surface of the optical fiber core is flush with an end surface of the connecting member; the optical component is provided with an slot, an end of the connecting member is inserted into the slot; the connecting member is fixedly connected to the optical component; a bottom edge of the optical component is provided with a plurality of notches; the bottom of each of the notches is formed with an inclined surface; the inclined surface extends from a side to the bottom of the optical component; a recess is formed at the bottom of the optical component; and a circuit board is disposed below the optical component.Type: GrantFiled: August 23, 2018Date of Patent: September 17, 2019Assignee: DONGGUAN LAN GUANG PLASTIC MOULDING CO., LTD.Inventors: Xinde Cai, Jianbo Lan, Xianghua Gu, Wei Zhao
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Patent number: 10406553Abstract: Disclosed herein is a printed circuit board having a structure for preventing coating liquid overflow. In the printed circuit board on which an electronic component is mounted and in which a connection hole for joining the electronic component and another component to each other is formed, a land region to which lead may be applied is formed adjacent to the connection hole.Type: GrantFiled: January 12, 2018Date of Patent: September 10, 2019Assignee: ALPS ALPINE CO., LTD.Inventors: Younggil Choi, Boseok Seok
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Patent number: 10412832Abstract: According to one embodiment, the display device includes a first substrate, a second substrate and a connecting material. The first substrate includes a first basement and a first conductive layer. The second substrate includes a second basement including a first surface, a second surface and a first hole located in the non-display area, and a second conductive layer provided on the second surface. The connecting material electrically connects the first conductive layer and the second conductive layer to each other via the first hole. The connecting material covers at least partially a portion of an opening edge belonging to the second region but does not cover a portion belonging to the first region.Type: GrantFiled: January 22, 2018Date of Patent: September 10, 2019Assignee: JAPAN DISPLAY INC.Inventors: Yoshikatsu Imazeki, Yoichi Kamijo, Shuichi Osawa, Yoshihiro Watanabe
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Patent number: 10409096Abstract: A display device includes a bendable substrate having a first side and a second side, a display region above the first side of the substrate, a terminal portion above the first side of the substrate, a first protection film overlapping the display region on the second side of the substrate, a second protection film overlapping the terminal portion on the second side of the substrate, a magnet sheet in contact with the first protection film, and a metal sheet in contact with the second protection film, by bending the substrate in between the display region and the terminal portion, the magnet sheet and the metal sheet face each other, and the magnet sheet and the metal sheet adhere to each other to hold the substrate in a bent state.Type: GrantFiled: December 18, 2017Date of Patent: September 10, 2019Assignee: Japan Display Inc.Inventor: Kazuhiro Odaka
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Patent number: 10410999Abstract: A semiconductor package having an internal heat distribution layer and methods of forming the semiconductor package are provided. The semiconductor package can include a first semiconductor device, a second semiconductor device, and an external heat distribution layer. The first semiconductor device can comprise a first semiconductor die and an external surface comprising a top surface, a bottom surface, and a side surface joining the bottom surface to the tope surface. The second semiconductor device can comprise a second semiconductor die and can be stacked on the top surface of the first semiconductor device. The external heat distribution layer can cover an external surface of the second semiconductor device and the side surface of the first semiconductor device. The external heat distribution layer further contacts an internal heat distribution layer on a top surface of the first semiconductor die.Type: GrantFiled: December 19, 2017Date of Patent: September 10, 2019Assignee: AMKOR TECHNOLOGY, INC.Inventors: Bora Baloglu, Ron Huemoeller, Curtis Zwenger
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Patent number: 10409403Abstract: Embodiments of the present disclosure provide a touch screen and a device. The touch screen includes a bezel region and a touch region, wherein the touch screen includes an annular wire provided on the bezel region. The wire further includes at least one pair of opposing discharge terminals. The device includes the touch screen, and further includes a conductive foam configured to connect the wire and a housing of the device. According to the embodiments of the present disclosure, the ESD resistance of the touch screen and the device including the touch screen is enhanced, the service life of the touch screen and the device including the touch screen is extended, the stability of the touch screen and the device including the touch screen is improved, and customers will have a better user experience without any other additional risk.Type: GrantFiled: May 6, 2016Date of Patent: September 10, 2019Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., ltd.Inventors: Lingyan Wu, Lei Zhang, Taofeng Xie, Guangchao Wei, Yang Liu
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Patent number: 10410960Abstract: The application discloses a parallel seam welding leadless ceramic package, including a ceramic, a sealing ring and a metal cover plate; a back surface of the ceramic is provided with a back grounding metal pattern, and the back grounding metal pattern is provided with several outwardly protruding grounding terminals, a RF signal transmission pad is disposed between every two adjacent grounding terminals, the front grounding metal pattern and the back grounding metal pattern are interconnected by the internal and/or external metallized interconnection holes, the front grounding line and the back grounding metal pattern is interconnected by the internal or external metallized interconnection holes, and the RF signal transmission lines are interconnected to the RF signal transmission pad by a separated external and/or external metallized interconnection hole.Type: GrantFiled: August 28, 2017Date of Patent: September 10, 2019Assignee: THE 13TH RESEARCH INSTITUTE OF CHINA ELECTRONICS TECHNOLOGY GROUP CORPORATIONInventors: Zhizhuang Qiao, Linjie Liu, Xin F. Zheng
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Patent number: 10403441Abstract: A composite electronic component includes a multilayer capacitor including a capacitor body, which includes first and second internal electrodes facing each other and a plurality of dielectric layers each interposed therebetween and first and second external electrodes disposed on opposing ends of the capacitor body, a high-rigidity chip including a substrate disposed on a lower side of the multilayer capacitor and first and second discharge electrodes disposed on the substrate and spaced apart from each other, the first and second discharge electrodes being connected to the first and second external electrodes, respectively, and extending to an upper or lower surface of the substrate, and an sealing part covering the first and second discharge electrodes and including a space portion, which is provided between the first and second discharge portions.Type: GrantFiled: May 8, 2018Date of Patent: September 3, 2019Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Ho Yoon Kim, Kyung Hwa Yu, Man Su Byun, Dae Heon Jeong, Min Kyoung Cheon, Soo Hwan Son
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Patent number: 10403592Abstract: Semiconductor packages and methods for forming a semiconductor package are disclosed. The method includes providing a package substrate having first and second major surfaces. The package substrate includes a base substrate having a mold material and a plurality of interconnect structures including via contacts extending through the first to the second major surface of the package substrate. A die having conductive contacts on its first or second surface is provided. The conductive contacts of the die are electrically coupled to the interconnect structures. A cap is formed over the package substrate to encapsulate the die.Type: GrantFiled: October 6, 2017Date of Patent: September 3, 2019Assignee: UNITED TEST AND ASSEMBLY CENTER LTD.Inventors: Yongbo Yang, Antonio Jr. Bambalan Dimaano, Chun Hong Wo
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Patent number: 10405429Abstract: A transformer integrated type printed circuit board includes: a transformer including a core, a primary winding wire, and a secondary winding wire; and a printed circuit board including a surface layer and an internal layer in which wiring patterns are respectively formed, and having a plurality of insertion portions into which a plurality of leg portions of the core are respectively inserted. The primary winding wire is disposed in the surface layer of the printed circuit board so as to be wound between the leg portions, and the secondary winding wire is disposed in the internal layer of the printed circuit board so as to be wound between the leg portions. The primary winding wire is small in number of windings, is large in width, and is large in thickness, in comparison with the secondary winding wire.Type: GrantFiled: May 23, 2018Date of Patent: September 3, 2019Assignee: OMRON CorporationInventors: Masanori Ando, Takashi Yamaguchi
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Patent number: 10402032Abstract: An input apparatus includes a sensor film having a first curved surface and a second curved surface, the first curved surface being light-transmissive and provided in a detection area in which a sensor is formed, the second curved surface being provided in a non-detection area other than the detection area and having a radius of curvature smaller than a radius of curvature of the first curved surface; a resin layer provided on the sensor film and formed of a material containing a light-transmissive resin; and an extension-suppression layer provided in the detection area in the sensor film, the extension-suppression layer suppressing an extension amount of the detection area in the sensor film to be smaller than an extension amount of the non-detection area in the sensor film.Type: GrantFiled: March 28, 2018Date of Patent: September 3, 2019Assignee: Alps Alpine Co., Ltd.Inventor: Junji Hashida
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Patent number: 10395830Abstract: A multi-layer ceramic electronic component includes: a ceramic body including first and second main surfaces oriented in a first axial direction, first and second end surfaces oriented in a second axial direction orthogonal to the first axial direction, a first internal electrode drawn to the first end surface, and a second internal electrode facing the first internal electrode and being drawn to the second end surface, the ceramic body being formed to be long in a third axial direction orthogonal to the first and second axial directions, a dimension of the ceramic body in the first axial direction being 80 ?m or less; a first external electrode covering the first end surface and extending from the first end surface to the first and second main surfaces; and a second external electrode covering the second end surface and extending from the second end surface to the first and second main surfaces.Type: GrantFiled: January 26, 2018Date of Patent: August 27, 2019Assignee: TAIYO YUDEN CO., LTD.Inventors: Masataka Watabe, Yasutomo Suga
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Patent number: 10398040Abstract: A power adapter package comprises a power conversion module, an input board assembly comprising terminals for receiving power from an input source and delivering power to the input of the power conversion module, an output board assembly for receiving power from the output of the power conversion module and delivering power to a load via output terminations, a signal isolator comprising a bridge board spanning a distance between the input board and the output board, a case comprising top and bottom covers, and end cap assemblies for supporting and insulating input and output terminations. The bridge board may comprise a multilayer substrate comprising galvanically isolated and magnetically coupled transformer windings. The input and output boards may be soldered to contacts formed along a peripheral edge of the power conversion module.Type: GrantFiled: May 4, 2018Date of Patent: August 27, 2019Assignee: VLT, Inc.Inventor: Patrizio Vinciarelli
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Patent number: 10383228Abstract: An electronic component device includes a first coreless wiring substrate, an electronic component mounted on the first coreless wiring substrate, a second coreless wiring substrate disposed above the first coreless wiring substrate and the electronic component such that the second coreless wiring substrate is spaced from the first coreless wiring substrate and the electronic component, a connection terminal that connects the first coreless wiring substrate and the second coreless wiring substrate, and a sealing resin filled between the first and second coreless wiring substrates. Each of the first and second coreless wiring substrates include an insulating layer, a wiring layer, and a reinforcing layer embedded in the insulating layer and provided in a region overlaying the electronic component.Type: GrantFiled: August 29, 2018Date of Patent: August 13, 2019Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventor: Masahiro Kyozuka
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Patent number: 10373762Abstract: A multilayer ceramic capacitor includes a ceramic body including an active portion including dielectric layers and internal electrodes that are alternately stacked and a margin portion disposed on outer surfaces of the active portion; and external electrodes disposed on outer surfaces of the ceramic body. The margin portion includes an inner half adjacent to the active portion and an outer half adjacent to the edge of the ceramic body, and a porosity of the inner half is greater than a porosity of the outer half.Type: GrantFiled: November 29, 2017Date of Patent: August 6, 2019Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Min Hee Hong, Chul Seung Lee, Won Seh Lee, Doo Young Kim, Chang Hoon Kim, Jae Yeol Choi, Hyeun Tea Yoon
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Patent number: 10374104Abstract: A waterproof electronic packaging structure includes a carrier plate, a chip, an encapsulating member and a waterproof member. The carrier plate includes a substrate, and a leadframe partly embedded in the substrate and including a chip bonding portion exposed from the substrate. The chip is mounted to the substrate and is electrically connected to the chip bonding portion. The encapsulating member is formed on the carrier plate, and encapsulates the chip and the chip bonding portion. The waterproof member is formed on the encapsulating member, and covers an outer surface of the encapsulating member and an interface between the encapsulating member and the substrate. A method for making a waterproof electronic packaging structure is also disclosed.Type: GrantFiled: June 27, 2017Date of Patent: August 6, 2019Assignee: TONG HSING ELECTRONICS INDUSTRIES, LTD.Inventors: Shao-Pin Ru, Zzu-Chi Chiu
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Patent number: 10373935Abstract: A semiconductor package includes: a first semiconductor chip in which a through-electrode is provided; a second semiconductor chip connected to a top surface of the first semiconductor chip; a first connection bump attached to a bottom surface of the first semiconductor chip and including a first pillar structure and a first solder layer; and a second connection bump located between the first semiconductor chip and the second semiconductor chip, configured to electrically connect the first semiconductor chip and the second semiconductor chip, and including a second pillar structure and a second solder layer.Type: GrantFiled: August 28, 2018Date of Patent: August 6, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Sun-kyoung Seo, Cha-jea Jo, Soo-hyun Ha
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Patent number: 10368436Abstract: A conductor pad and a flexible circuit including a conductor pad are provided. The conductor pad includes a first contact region, a second contact region, and a body portion configured to establish a conductive path between the first contact region and the second contact region. The body portion includes a perimeter edge having at least a first convex segment and a second convex with a first non-convex segment disposed between the first convex segment and the second convex segment. A method of constructing a flexible circuit to facilitate roll-to-roll manufacturing of the flexible circuit is also provided.Type: GrantFiled: March 15, 2017Date of Patent: July 30, 2019Assignee: OSRAM SYLVANIA Inc.Inventors: Sridharan Venk, Earl Alfred Picard, Jr., Qi Dai, Richard Garner
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Patent number: 10362669Abstract: According to one embodiment, an electronic device includes housing, a circuit board in the housing, a semiconductor package, and a support plate on a second surface of the circuit board. The support plate is arranged at a position corresponding to a corner of the first area and includes a main portion, a first projecting portion in contact with the main portion at a first side of the main portion, and a second projecting portion in contact with the main portion at a second side of the main portion. The first projecting portion and the second projecting portion are arranged such that an imaginary line connecting a corner of the first projecting portion and a corner of the second projecting portion is outside the main portion.Type: GrantFiled: November 28, 2017Date of Patent: July 23, 2019Assignee: Toshiba Client Solutions CO., LTD.Inventors: Shinya Hayashiyama, Akihisa Shimizu
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Patent number: 10356911Abstract: An electronic device module includes: a board including at least one mounting electrode and at least one external connection electrode and having a protective insulation layer which is provided on an outer surface thereof; at least one electronic device mounted on the mounting electrodes; a molded part sealing the electronic device; and at least one connective conductor of which one end is bonded to the external connection electrode of the board and which penetrates through the molded part to be disposed in the molded part, wherein the protective insulation layer is disposed to be spaced apart from the connective conductor.Type: GrantFiled: June 5, 2015Date of Patent: July 16, 2019Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Do Jae Yoo, Jae Hyun Lim, Jong In Ryu, Kyu Hwan Oh, Ki Ju Lee
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Patent number: 10356909Abstract: An embedded circuit board includes a flexible printed circuit board, a component, a conductive material, two adhesive layers, and two substrates. The flexible printed circuit board defines at least one cavity passing through the flexible printed circuit board. The flexible printed circuit board includes a base layer, a first conductive circuit layer formed on at least one surface of the base layer, and a protective layer formed on both sides of the base layer. The base layer and the first conductive circuit layer protrude into the cavity. The component is received within the cavity and abuts against the first conductive circuit layer protruding into the cavity. The conductive material is applied in a gap between the component and the first conductive circuit layer. The two substrates are adhered to the flexible printed circuit board by the two adhesive layers.Type: GrantFiled: September 29, 2018Date of Patent: July 16, 2019Assignees: Avary Holding (Shenzhen) Co., Limited., HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd.Inventors: Ning Hou, Biao Li, Hao-Wen Zhong, Ming-Hui Wang
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Patent number: 10356903Abstract: System-in-package structures and methods of assembly are described. In an embodiment, a system-in-package includes opposing circuit boards, each including mounted components overlapping the mounted components of the opposing circuit board. A gap between the opposing circuit boards may be filled with a molding material, that additionally encapsulates the overlapping mounted components. In some embodiments, the opposing circuit boards are stacked on one another using one or more interposers that may provide mechanical or electrical connection.Type: GrantFiled: March 28, 2018Date of Patent: July 16, 2019Assignee: Apple Inc.Inventors: Yanfeng Chen, Shankar Pennathur, Mandar Painaik, Lan Hoang, Meng Chi Lee
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Patent number: 10345704Abstract: The present invention relates to a photosensitive element comprising a support film, and a photosensitive layer on the support film, wherein a haze of the support film is 0.01 to 1.0% and a total light transmittance thereof is 90% or more, and the photosensitive layer contains a binder polymer, a photopolymerizable compound having an ethylenically unsaturated bond, and a photopolymerization initiator.Type: GrantFiled: February 10, 2015Date of Patent: July 9, 2019Assignee: HITACHI CHEMICAL COMPANY, LTD.Inventor: Masao Kubota
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Patent number: 10349568Abstract: According to certain aspects, a circuit board panel includes a first module circuit board and a second module circuit board arranged to define a space that runs between a first portion of the periphery of the first module circuit board and a portion of the periphery of the second module circuit board; and a plurality of shield components each extending across the space and including a first conductive portion mounted along the first portion of the periphery of the first module circuit board, a second conductive portion mounted along the portion of the periphery of the second module circuit board, and a non-conductive portion extending between the first conductive portion and the second conductive portion, the first and second conductive portions of each of the plurality of shield components configured to provide electromagnetic shielding for at least one electronic component mounted on the first and second module circuit boards, respectively.Type: GrantFiled: September 12, 2014Date of Patent: July 9, 2019Assignee: Skyworks Solutions, Inc.Inventors: Philip H. Thompson, Larry D. Pottebaum
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Patent number: 10340209Abstract: A die package having mixed impedance leads where a first lead has a first metal core, and a dielectric layer surrounding the first metal core, and a second lead has a second metal core, and a second dielectric layer surrounding the second metal core, with the dielectric thicknesses differing from each other. A method of making a die package having leads with different impedances formed by connecting the die package to the die substrate connection pads via a first wirebond having a first metal core, depositing a dielectric layer on the wirebond metal core, metalizing the dielectric layer, connecting the die package to the die substrate connection pads via a second wirebond having a second metal core, depositing a dielectric layer on the second wirebond second metal core, and metalizing the dielectric layer on the second metal core, such that the first wirebond has a different impedance than the second wire bond.Type: GrantFiled: July 2, 2014Date of Patent: July 2, 2019Assignee: Rosenberger Hochfrequenztechnik GmbH & Co. KGInventors: Sean S. Cahill, Eric A. Sanjuan
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Patent number: 10340682Abstract: An electronic-device having an intermediate connection layer interposed between a wiring substrate and an electronic component. The intermediate connection layer has a laminated structure including a rigid substrate and a flexible substrate. A first conductor part is formed on one principal surface of the flexible substrate, and second and third conductor parts are formed on both principal surfaces of the rigid substrate, respectively. The rigid substrate includes an opening, and the first conductor part of the flexible substrate includes a narrowed fuse part at a position opposite the opening. Windows are formed near the fuse part. The flexible substrate and the rigid substrate are electrically connected with each other via solder.Type: GrantFiled: October 5, 2017Date of Patent: July 2, 2019Assignee: MURATA MANUFACTURING CO., LTD.Inventor: Hiroki Sakamoto
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Patent number: 10342137Abstract: A fingerprint module includes a cover plate, a fingerprint chip, an intermediate board, and a circuit board. The cover plate defines an assembling region. The fingerprint chip is fixed in the assembling region and has a plurality of pads. The intermediate board is bonded to a surface of the fingerprint chip opposite to the cover plate to press the fingerprint chip to increase a bonding force between the fingerprint chip and the cover plate, so that there is a firm bonding between the fingerprint chip and the cover plate. The fingerprint chip is electrically connected to the intermediate board via the pads. The circuit board is electrically connected to the fingerprint chip via the intermediate board. The pads are connected to the circuit board via different wires to ensure effective transmission of electrical signals of the fingerprint chip.Type: GrantFiled: April 16, 2018Date of Patent: July 2, 2019Assignee: Guangdong Oppo Mobile Telecommunications Corp., Ltd.Inventor: Wenzhen Zhang
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Patent number: 10334735Abstract: Embodiments of the invention include LED lighting systems and methods. For example, in some embodiments, an LED lighting system is included. The LED lighting system can include a flexible layered circuit structure that can include a top thermally conductive layer, a middle electrically insulating layer, a bottom thermally conductive layer, and a plurality of light emitting diodes mounted on the top layer. The LED lighting system can further include a housing substrate and a mounting structure. The mounting structure can be configured to suspend the layered circuit structure above the housing substrate with an air gap disposed in between the bottom thermally conductive layer of the flexible layered circuit structure and the housing substrate. The distance between the layered circuit structure and the support layer can be at least about 0.5 mm. Other embodiments are also included herein.Type: GrantFiled: August 22, 2012Date of Patent: June 25, 2019Assignee: Metrospec Technology, L.L.C.Inventors: Henry V. Holec, Wm. Todd Crandell
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Patent number: 10334733Abstract: Provided is a circuit structure in which the occurrence of wiring line breakage due to deformation of a resin molded body is suppressed. A circuit structure (1) includes an electronic component (3) having an electrode (31, 32), a resin molded body (2) in which the electronic component (3) is embedded, and a wiring line (41, 42) connected to the electrode (31, 32). A groove (21) is formed around the electronic component (3) in the resin molded body (2), and the wiring line (41, 42) is provided so as to extend into the groove (21).Type: GrantFiled: March 22, 2016Date of Patent: June 25, 2019Assignee: OMRON CORPORATIONInventor: Wakahiro Kawai
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Patent number: 10334731Abstract: A capacitor component includes a body including a plurality of dielectric layers having a stacked structure and a plurality of first internal electrodes and a plurality of second internal electrodes alternately disposed with dielectric layers disposed therebetween. A first external electrode is on a first surface and a second surface of the body, on the opposing side of the body, and connected to the plurality of first internal electrodes. A second external electrode is on a third surface and a fourth surface of the body, opposing each other, and connected to one or more of the plurality of second internal electrodes.Type: GrantFiled: August 21, 2018Date of Patent: June 25, 2019Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Heung Kil Park, Jong Hwan Park
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Patent number: 10319525Abstract: A multi-layer ceramic capacitor assembly includes a multi-layer ceramic capacitor comprising a laminate, the laminate having dielectric layers and internal electrodes laminated alternately therein, and external electrodes being electrically connected with the internal electrodes and disposed at end portions of the laminate; and an electrode-forming substrate coupled to the multi-layer ceramic capacitor and having through-holes disposed to correspond to the external electrodes.Type: GrantFiled: December 21, 2017Date of Patent: June 11, 2019Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Soon-Ju Lee, Young-Ghyu Ahn, Kyoung-Jin Jun, Sang-Soo Park, So-Yeon Song, Heung-Kil Park
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Patent number: 10312196Abstract: A semiconductor package may include a package substrate to which a first semiconductor chip is attached, an encapsulant covering the first semiconductor chip, and an indicator disposed within the semiconductor package. A side surface of the indicator is exposed at a side surface of the semiconductor package, and a width of a vertical section of the indicator parallel with the exposed side surface of the indicator varies as the vertical section of the indicator becomes farther from the side surface of the semiconductor package.Type: GrantFiled: April 5, 2018Date of Patent: June 4, 2019Assignee: SK hynix Inc.Inventors: Sukwon Lee, Bok Gyu Min
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Patent number: 10312205Abstract: A fan-out semiconductor package includes a semiconductor chip having an active surface, the active surface having a connection pad disposed thereon, and an inactive surface opposing the active surface; an encapsulant encapsulating at least a portion of the semiconductor chip; an insulating layer disposed on the active surface of the semiconductor chip; and a redistribution layer disposed on the insulating layer and electrically connected to the connection pad. The insulating layer includes a low tan delta (Df) dielectric material.Type: GrantFiled: May 26, 2017Date of Patent: June 4, 2019Assignee: Samsung Electro-Mechanics Co., Ltd.Inventor: Youn Gyu Han
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Patent number: 10306777Abstract: A wiring board with dual stiffeners and integrated dual routing circuitries is characterized in that first and second routing circuitries are positioned within and beyond a through opening of a first stiffener, respectively, and an array of vertical connecting channels are disposed on the second routing circuitry and laterally surrounded by a second stiffener. The mechanical robustness of the first and second stiffeners can prevent the wiring board from warping. The vertical connecting channels can offer electrical contacts for next-level connection. The first routing circuitry, positioned within the through opening of the first stiffener, can provide primary fan-out routing, whereas the second routing circuitry not only provides further fan-out wiring structure for the first routing circuitry, but also mechanically binds the first routing circuitry with the first stiffener.Type: GrantFiled: August 25, 2016Date of Patent: May 28, 2019Assignee: BRIDGE SEMICONDUCTOR CORPORATIONInventors: Charles W. C. Lin, Chia-Chung Wang