Abstract: A wiring board including a core insulation layer having a connection conductor formed in a hole of the core layer, and an interlayer insulation layer laminated on one side of the core layer. The conductor of the core layer includes plating filling the hole of the core layer. The interlayer layer has a connection conductor formed in a hole of the interlayer layer. The conductor of the interlayer layer includes plating filling the hole of the interlayer layer. The conductor of the interlayer layer is stacked on the conductor of the core insulation layer. The conductors of the core and interlayer layers have lands formed on the core and interlayer layers and including metal foils and plating on the foils. The foil of the land on the core layer has a thickness which is thicker than a thickness of the foil of the land on the interlayer layer.

Abstract: A solder layer, a substrate for device joining utilizing the same and a method of manufacturing the substrate are provided whereby the device joined remains thermally unaffected, an initial bonding strength in solder joint is enhanced and the device can be soldered reliably. The solder layer formed on a base substrate (2) consists of a plurality of layers (5a) of a solder free from lead, which are different in its phase from one another. They are constituted by a layer of a phase that is completely melted, and a layer of a phase that is not completely melted at a temperature not less than a eutectic temperature of the solder. The solder layer (5) can be applied to a device joining substrate (1) comprising an electrode layer (4) formed on the base substrate (2) and the solder layer (5) formed on the electrode layer.

Abstract: An underfill device and method have been are provided. Advantages of devices and methods shown include dissipation of stresses at an interface between components such as a chip package and an adjacent circuit board. Another advantage includes faster manufacturing time and ease of manufacture using underfill devices and methods shown. An underfill assembly can be pre made with conductive structures included within the underfill assembly. Steps such as flowing epoxy and curing can be eliminated or performed concurrently with other manufacturing steps.

Abstract: The invention offers a board-connecting structure that can provide electrodes with a fine pitch and that can combine the insulating property and the connection reliability. The structure of connecting printed wiring boards 10 and 20 electrically connects a plurality of first electrodes 12 and 13 provided to be adjacent to each other on a first board 11 with a plurality of second electrodes 22 and 23 provided to be adjacent to each other on a second board 21 through an adhesive 30 that contains conductive particles 31 and that has anisotropic conductivity. By heating and pressing the adhesive placed between the mutually facing first electrode 12 and second electrode 22 and between the mutually facing first electrode 13 and second electrode 23, an adhesive layer 30a is formed between the first board 11 and the second board 21 and in the adhesive layer 30a, a cavity portion 33 is formed between the first electrodes 12 and 13 and between the second electrodes 22 and 23.

Abstract: Disclosed herein is a circuit board including: a base substrate including a via for power and a via pad for power connected to the via for power; and an insulating layer formed on the base substrate and including a dummy pattern formed in a region facing the via pad for power.

Abstract: A multi-layer substrate includes a plurality of substrate main bodies, a plurality of layers which are alternately layered with the main bodies, a signal via hole which is connected with a signal line and includes a signal column which passes through at least one substrate main body; and a sub via hole which includes a sub column which surrounds the signal column, and a pair of sub pads which extend from end parts of the sub column to be formed to the layers, the layers which are formed with the sub pads being disposed in the same layer as the layers which are formed with the signal line of the signal via hole, or being disposed outside the layers which are formed with the signal line which is connected with the signal via hole.

Abstract: A printed circuit board and a manufacturing method of the same are disclosed. The method includes: preparing a carrier including a primer resin layer formed thereon; forming a circuit pattern on the primer resin layer; stacking the carrier onto an insulating layer such that the circuit pattern is buried in the insulating layer; removing the carrier; forming a via hole in the insulating layer on which the primer resin layer is stacked; and forming a conductive via in the via hole. The conductive via is formed by forming a plating layer in the via hole and on the primer resin layer and removing a portion of the plating layer formed over the primer resin layer.

Abstract: The printed circuit board comprises two first signal traces, a first grounding layer, two first signal traces, a second grounding layer, two signal conductive pillars and two grounding conductive pillars. The first signal traces are formed on a first surface of a substrate. The first grounding layer is formed on the first surface. The second signal traces are formed on a second surface of the substrate. The second grounding layer is formed on the second surface. The signal conductive pillars are extended to the second surface from the first surface and each signal conductive pillar connects the corresponding first signal trace and second signal trace. The grounding conductive pillars are extended to the second surface from the first surface and each grounding conductive pillar connects the first grounding layer and the second grounding layer. Each grounding conductive pillar and the corresponding signal conductive pillar are disposed in pairs.

Abstract: A substrate includes a storage portion which is defined by a base for mounting a light emitting element and a wall portion standing up on and from the base. A package is structured such that the upper end of the wall portion so formed as to surround the periphery of the storage portion is connected to a cover to thereby seal a light emitting element. A seal structure is composed of an uneven portion formed on the lower surface side surface of the base, a close contact layer formed on the surface of the uneven portion, a power supply layer formed on the close contact layer, and an electrode layer formed on the surface of the power supply layer. The uneven portion includes a first recessed portion formed at a position spaced in the radial direction from the outer periphery of a through electrode or from the inner wall of a through hole, and a second recessed portion formed at a position spaced further outwardly from the first recessed portion.

Abstract: A method and structure are provided for implementing surface mount components with symmetric reference balance. A first reference and an incoming signal are received in a surface mounted device (SMD) package and a second reference and the outgoing signal are output from the SMD package. A capacitor structure is defined within the SMD package between the first reference and the second reference. The capacitor structure includes a balanced impedance structure between the first reference and the second reference. A component connected between the received incoming signal and output signal is generally centrally located within the capacitor structure.

Abstract: The invention relates to a method for producing a non-developable surface printed circuit and to the thus obtained printed circuit. According to the invention, each electrically conductive pattern of a printed circuit includes at least one base, which is arranged on the non-developable surface and obtained by projecting an electrically conductive varnish, and a coating, which is arranged on the base and made of an electrically well conductive material by buffer electrolysis.

Abstract: A wiring board includes a first multilayer wiring board having first conductive layers and having a surface, a second multilayer wiring board having second conductive layers and positioned such that the second multilayer wiring board has a surface facing the surface of the first multilayer wiring board, and an adhesive layer including an adhesive sheet and interposed between the first multilayer wiring board and the second multilayer wiring board such that the adhesive layer is adhering the first multilayer wiring board and the second multilayer wiring board. The first multilayer wiring board has a first pad on the surface of the first multilayer wiring board, the second multilayer wiring board has a second pad on the surface of the second multilayer wiring board, and the first pad and the second pad are positioned such that the first pad and the second pad face each other across the adhesive layer.

Abstract: A wiring board according to an embodiment includes an inorganic insulating layer provided with a via-hole which is a penetrating hole, and a via-conductor which is a penetrating conductor disposed inside the via-hole. The inorganic insulating layer includes first inorganic insulating particles connected to each other and second inorganic insulating particles that are larger in particle size than the first inorganic insulating particles and are connected to each other via the first inorganic insulating particles, and also has, at an inner wall of the via-hole V, a protrusion including at least part of the second inorganic insulating particle. The protrusion is covered with the via-conductor.

Abstract: A printed wiring board includes a first insulation layer, a first conductive pattern formed on a first surface of the first insulation, a second conductive pattern formed on a second surface of the first insulation on the opposite side with respect to the first surface of the first insulation, a first buildup structure formed on the first surface of the first insulation and the first pattern, the first buildup structure including insulation layers and conductive patterns, and a second buildup structure formed on the second surface of the first insulation and the second pattern, the second buildup structure including insulation layers and conductive patterns. The second pattern and the patterns in the second buildup structure form an inductor, and the first and second patterns are positioned such that the distance between the first and second patterns in the thickness direction of the first insulation is set 100 ?m or greater.

Abstract: A composite module is obtained which enables high-density mounting of components without increasing its size. A composite module includes a main substrate which is a multilayer circuit board, a sub-substrate mounted on a lower surface of the main substrate, a sealing layer arranged on the lower surface of the main substrate to cover the sub-substrate, the sealing layer defining a mount surface arranged to be mounted on a mount board, and terminal electrodes disposed on the mount surface. The terminal electrodes include at least one first terminal electrode drawn directly from the main substrate and at least one second terminal electrode drawn directly from the sub-substrate.

Abstract: A circuit substrate includes a resin layer; and an inorganic insulating layer including a groove portion penetrating the inorganic insulating layer in a thickness direction thereof. A part of the resin layer is in the groove portion.

Abstract: A structure and method is disclosed for a routing structure for connecting the transparent conductive oxide (TCO) electrodes of a touch-sensor panel to a touch controller while providing the requisite cross-over routing. Routing is confined to the border area of a single glass panel where there is no need for transparency. By applying the TCO electrodes to the glass surface, first, and then applying the non-conducting artwork layer above them, there is no need to extend the TCO electrodes above the glass surface and, thereby, subject these thin and brittle electrodes to mechanical stress. Instead, vias are positioned in the artwork then filled with conductive plugs. These provide the connectivity between the TCO electrodes and metal traces above them.

Abstract: An electromagnetic bandgap structure and a printed circuit board that can solve a mixed signal problem between an analog circuit and a digital circuit are disclosed. In accordance with an embodiment, an electromagnetic bandgap structure is stacked with a first metal layer, a first dielectric layer, a metal plate, a second dielectric layer and a second metal layer, and an odd number of vias can be serially connected through a metal line between the first metal layer and the metal plate. This electromagnetic bandgap structure can have a small size and a low bandgap frequency.

Abstract: A printed circuit board includes a first to a fifth connector pads, a first to an eighth coupling capacitor pads, a first to a tenth transmission lines, a first via and a second via, a first to a fourth sharing pads, and a voltage converting circuit. The printed circuit board is operable to selectively support different types of connectors.

Abstract: Disclosed herein is a coreless substrate having filled via pads and a method of manufacturing the same. Insulating layers are formed on both sides of a build-up layer, and via-pads are embedded in the insulating layers such that the via-pads are flush with the insulating layers. The via pads are not separated from a substrate, and thus reliability of the pads is increased. Flatness of bumps is increased, and thus bonding of flip chips becomes easy.

Abstract: The present invention relates to a method for filling a through hole of a substrate with a metal. The method includes a step of preparing a bonded substrate including a first substrate having conductivity in at least a surface thereof and a second substrate having a through hole, both substrates being bonded to each other through a nonionic surfactant; a step of exposing, in the bonded surface of the bonded substrate, the conductive surface of the first substrate, which is positioned at the bottom of the through hole, by removing the nonionic surfactant positioned at the bottom of the through hole of the second substrate; and a step of filling the through hole with a metal by applying an electric field to the conductive surface of the first substrate.

Abstract: A method, system and apparatus for coating plated through holes (PTHs) to reduce impedance discontinuity in electronic packages. PTH vias are imbedded in the core of a printed circuit board comprising a core layer, a plurality of buildup layers, a plurality of micro-vias, and a plurality of traces. Traces electrically interconnect each of the micro-vias to PTH vias, forming an electrically conductive path. PTHs are coated with a magnetic metal material, such as nickel, to increase the internal and external conductance of the PTHs, thereby providing decreased impedance discontinuity of the signals in electronic packages.

Abstract: A wired circuit board includes a metal supporting layer, a first insulating layer, a conductive layer, a second insulating layer, and a ground layer. The first opening of the first insulating layer is surrounded by the second opening of the second insulating layer when projected in the thickness direction, and the ground layer fills the first opening via the second opening so as to come in contact with an upper surface of the metal supporting layer. Alternatively, the first opening surrounds the second opening when projected in the thickness direction, the second insulating layer fills a peripheral end portion of the first opening, and the ground layer fills the second opening so as to come in contact with the upper surface of the metal supporting layer.

Abstract: A multilayer insulating substrate with excellent electrical characteristics and a method for manufacturing the multilayer insulating substrate.

Abstract: A printed wiring board includes a substrate having a first surface, a second surface on the opposite side of the first surface and a through-hole extending between the first and second surfaces, a first conductive circuit formed on the first surface of the substrate, a second conductive circuit formed on the second surface of the substrate, and a through-hole conductor filling the through-hole and connecting the first and second conductive circuits. The through-hole has a first opening portion tapering from the first surface toward the second surface and a second opening portion tapering from the second surface toward the first surface. The substrate is made of a resin and a reinforcing material portion in the resin. The reinforcing material portion has a protruding portion protruding into the through-hole at the intersection of the first and second opening portions. The protruding portion encroaches into the through-hole conductor.

Abstract: A via is provided on a printed circuit board with at least one additional depression encompassing the via, such that the via passes through a portion of the depression. Solder can pool in the depression, allowing for a stronger mechanical bond and eliminating many issues with respect to a lack of coplanarity between a lead and the printed circuit board. The depression can be provided with plugged and unplugged vias, and improves the mountings associated with both.

Abstract: Embodiments of the present invention provide a wiring substrate that includes a structure where a plurality of projection electrodes are arranged within an electrode formation region on a substrate main surface. At least one among the plurality of projection electrodes has a larger outer diameter than an outer diameter of a via conductor and is a variant projection electrode which has a roughened upper surface. Embodiments of the present invention also provide methods for manufacturing wiring substrates having one or more of said variant projection electrode.

Abstract: A wiring board includes a resin substrate in which reinforcement members are arranged horizontally, a through electrode filled in a through hole penetrating the substrate in a thickness direction, and wiring layers respectively formed on both surfaces of the substrate and electrically connected to each other via the through electrode. The reinforcement members are arranged such that reinforcement members arranged in a middle region of the substrate in the thickness direction has higher density than reinforcement members arranged in the regions other than the middle region of the substrate.

Abstract: An electrical connector includes a printed circuit board that includes a body that carries a plurality of ground conductors that define respective ground contact pads, and a plurality of signal conductors that define respective signal contact pads. The contact pads are configured to mate with electrical contacts of a complementary electrical connector. The printed circuit board includes a ground coupling assembly that electrically connects at least a pair of the ground conductors.

Abstract: A printed wiring board includes a core insulation layer having via conductors through the core layer, a first structure including an interlayer insulation layer on first surface of the core layer and having via conductors through the interlayer layer in the first structure, and a second structure including an interlayer insulation layer on second surface of the core layer and having via conductors through the interlayer layer in the second structure. The interlayer layers have dielectric constants set to be 4.0 or lower for signal transmission at frequency of 1 GHz, the core layer has thermal expansion coefficient at or below Tg set lower than thermal expansion coefficients of the interlayer layers at or below Tg, the coefficient of the core layer at or below Tg is set to be 75 ppm/° C. or lower, and the conductors in the interlayer layers are stacked on the conductors in the core layer.

Abstract: A printed wiring board includes a core insulation layer including a resin and having a via conductor through the core insulation layer, a first conductive layer formed on the core layer and including a copper foil and a plated film, an interlayer insulation layer formed on the first layer and including a resin, the interlayer layer having a via conductor through the interlayer layer, and a second conductive layer formed on the interlayer layer and including a copper foil and a plated film. The first layer includes a conductive circuit, the core and interlayer layers have dielectric constants of 4.0 or lower for signal transmission at frequency of 1 GHz and thermal expansion coefficient of 85 ppm/° C. or lower at or below Tg, and the foil of the first layer has thickness greater than thickness of the foil of the second layer.

Abstract: A flexible wiring board includes a first flexible base material with a conductor pattern formed thereon, a second flexible base material disposed adjacent to the first flexible base material and an insulating layer covering the first flexible base material and the second flexible base material. The insulating layer exposes at least one portion of the first flexible base material. A conductor pattern is formed on the insulating layer, and a plating layer is provided connecting the conductor pattern of the first flexible base material and the conductor pattern on the insulating layer.

Abstract: A printed circuit board includes first and second transmission lines connected to a first high speed differential signal control chip, third and fourth transmission lines connected to a second high speed differential signal control chip, and fifth and sixth transmission lines connected to a connector pad. To have the first high speed differential signal control chip communicate with the connector pad, the first transmission line is connected to the fifth transmission line through a first connection component, and the second transmission line is connected to the sixth transmission line through a second connection component. To have the second speed differential signal control chip communicate with the connector pad, the third transmission line is connected to the fifth transmission line through the first connection component, and the fourth transmission line is connected to the sixth transmission line through the second connection component.

Abstract: A wiring board includes: a first wiring layer; a first insulating layer formed on the first wiring layer and including a reinforcing material therein, the first insulating layer having a first opening; a contact layer formed on the first insulating layer and having a second opening communicated with the first opening; and a second wiring layer comprising a second via and a second wiring pattern connected to the second via. The second wiring pattern is formed on the contact layer, and the second via is filled in the first and second openings. An adhesion property between the contact layer and the second wiring pattern is higher than that between the first insulating layer and the second wiring pattern, and a thickness of the contact layer is smaller than that of the first insulating layer.

Abstract: A multilayer wiring board includes inner-layer wiring boards each having wirings on both sides thereof; electrically insulating substrates each having through-holes filled with a conductive paste; and wirings formed in the outermost layers. The wiring boards and the electrically insulating substrates are stacked alternately in such a manner that the wirings of the wiring boards are embedded in the electrically insulating substrates at both ends of the conductive paste.

Abstract: A wafer assembly (30) includes a substrate (71), in turn including a wafer (70) or a stack of wafers. The wafer assembly (30) further includes an electrical connection (32) arranged through at least a part of the substrate (71). The electrical connection (32) is made by low-resistance silicon. The electrical connection (32) is positioned in a hole (84) penetrating at least a part of the substrate (71). A surface (78) of the substrate (71) confining the hole (84) is electrically insulating. The electrical connection (32) has at least one protrusion (75), which protrudes transversally to a main extension (83) of the hole (84) and the protrusion (75) protrudes outside a minimum hole diameter (85), as projected in the main extension (83) of the hole (84). Preferably, the protrusion (75) is supported by a support surface (81) of the substrate (71). A manufacturing method is also disclosed.

Abstract: A mezzanine board alignment and mounting device includes a multi-stage pin connected to a main board near a mezzanine board connector disposed on the main board. The multistage pin includes a base adapted to connect to the main board, a point distal to the base adapted to pass through an opening on a mezzanine board, and a support disposed between the base and the point. A diameter of the point widens towards the support. A diameter of the support is wider than a diameter of the opening. When the point is fully inserted through the opening in the mezzanine board, the mezzanine board is aligned properly to connect with the mezzanine board connector on the main board.

Abstract: A printed circuit board (PCB) includes two layers, two signal transmission traces, and a vertical interconnect access (via). The signal transmission traces are respectively arranged on the layers. The signal transmission traces are electrically connected to each other through the via. A centerline of the via with a vertical line of the layers form an acute angle ?, the angle ? is less than cos?1[(Lv2?Lt2)/(Lv2+Lt2)]. Wherein Lt is loss of the two signal transmitting traces in a unit length, and Lv is loss of the via in a unit length.

Abstract: A multilayer printed circuit board has an insulation layer, a first conductor layer provided over a first side of the insulation layer, a second conductor layer provided over a second side of the insulation layer opposite to the first side, and multiple filled vias electrically connecting the first conductor layer and the second conductor layer. The filled vias have upper surfaces, respectively, and each of the upper surfaces is made such that a difference between a lowest point and a highest point of each of the upper surfaces is less than or equal to about 7 ?m.

Abstract: A connection substrate 13 includes a base material 130 formed by stacking a plurality of dielectric layers 130a to 130f and a plurality of through conductors 20 provided penetrating through the dielectric layers 130c to 130f adjacent to each other. A plurality of radiation shielding films 21 a to 23 a formed integrally with each of the plurality of through conductors 20 and separated from each other are provided at two or more interlayer parts in the dielectric layers 130c to 130f. A region PR1 of the radiation shielding film 21a (21b) formed integrally with one through conductor 20 in one interlayer part projected onto a virtual plane normal to a predetermined direction and a region of the radiation shielding film 22b or 22c (22c) formed integrally with another through conductor 20 in another interlayer part projected onto the virtual plane do not overlap each other.

Abstract: Disclosed is an electronic device module including a module substrate having first and second electronic device pair portions. The first electronic device pair portion may include a first and a second contact pad area and a first via area between the first and second contact pad areas. The first electronic device pair portion may also include a first layer and a second layer. The first layer may include a plurality of first lines connecting a plurality of contact pads in the first contact pad area on one side of the module substrate to a plurality of vias. The second layer may include a plurality of second lines connecting a plurality of contact pads in the second contact pad area to a plurality of vias in the via area. The second layer may also include a plurality of third lines connecting the first and second electronic device pair portions.

Abstract: A wiring board includes a core substrate having a structure including an insulating base material and a large number of filamentous conductors densely provided in the insulating base material and piercing the insulating base material in a thickness direction thereof. Pads made of portions of wiring layers are oppositely disposed on both surfaces of the core substrate and electrically connected to opposite ends of a plurality of filamentous conductors in such a manner that the pads share the filamentous conductors. A wiring connection between one surface side and the other surface side of the core substrate is made through the pads. The insulating base material is made of an inorganic dielectric. Pads made of portions of the wiring layers are disposed on both surfaces of the core substrate and electrically connected only to corresponding one end sides of different groups each formed of a plurality of filamentous conductors.

Abstract: The present invention relates to a layered structure assembly (1) for a DC to AC inverter comprising: a first layered structure (10) with first (12) and second (13) conductive layers, a second layered structure (14) with third (16) and fourth (17) conductive layers, and at least one connector (21) providing a low resistance/inductance interconnection between layered structures (10, 14), the connecter (21) comprising a rod (23) inside a sleeve (26).

Abstract: A method of manufacturing a printed circuit board having a flow preventing dam, including: applying a dry film resist on a base substrate having a solder pad, and then primarily exposing the dry film resist to light; secondarily exposing the primarily exposed dry film resist formed on a peripheral area of the base substrate to light, thus forming a flow preventing dam; removing the unexposed dry film resist to expose the solder pad, thus forming an opening; printing the opening with a solder paste, and then forming a solder bump through a reflow process; and removing the primarily exposed dry film resist.

Abstract: A wiring structure includes a first plug extending through a first insulating interlayer on a substrate, a first wiring extending through a second insulating interlayer on the first insulating interlayer and the first wiring is electrically connected to the first plug, a diffusion barrier layer pattern on the first wiring and on the second insulating interlayer, a portion of the second insulating interlayer being free of being covered by the diffusion barrier layer pattern, a second plug extending through the diffusion barrier layer pattern, the second plug is in contact with the first wiring, and a second wiring electrically connected to the second plug.

Abstract: A wiring board adapted for mounting an electronic component has the form of a structure in which a plurality of wiring layers are stacked one on top of another with an insulating layer interposed therebetween and are interconnected through via holes formed in the insulating layers, respectively. A plurality of openings are formed through the structure in a region where a wiring is not formed, extending through the structure in a thickness direction thereof. Further, solder resist layers are formed on the outermost wiring layers, respectively, and exposing pad portions defined in desired locations in the outermost wiring layers.

Abstract: Manufacturing circuits with reference plane voids over vias with a strip segment interconnect permits routing critical signal paths over vias, while increasing via insertion capacitance only slightly. The transmission line reference plane defines voids above (or below) signal-bearing plated-through holes (PTHs) that pass through a rigid substrate core, so that the signals are not degraded by an impedance mismatch that would otherwise be caused by shunt capacitance from the top (or bottom) of the signal-bearing PTHs to the transmission line reference plane. In order to provide increased routing density, signal paths are routed over the voids, but disruption of the signal paths by the voids is prevented by including a conductive strip through the voids that reduces the coupling to the signal-bearing PTHs and maintains the impedance of the signal path conductor.

Abstract: An electronics interconnection system is provided with reduced capacitance between a signal line and the surrounding dielectric material. By using a non-homogenous dielectric, the effective dielectric constant of the material is reduced. This reduction results in less power loss from the signal line to the dielectric material, and therefore reduces the number of buffers needed on the signal line. This increases the speed of the signal, and reduces the power consumed by the interconnection system. The fabrication techniques provided are advantageous because they can be preformed using today's standard IC fabrication techniques.

Abstract: An interconnection component includes a substrate, and an active through-substrate via (TSV) penetrating through the substrate. Active metal connections are formed over the substrate and electrically connected to the active TSV. At least one of a dummy pad and a dummy solder bump are formed at surfaces of the interconnection component. The dummy pad is over the substrate and electrically connected to the active TSV and the active metal connections. The dummy solder bump is under the substrate and electrically connected to the active metal connections. The dummy pad and the dummy solder bump are open ended.

Abstract: A wiring board having a favorable electrical reliability and in which a crack is unlikely to occur at a connection interface of via conductors even though the number of via conductors in series, which constitutes the stacked via, becomes larger than that of a conventional wiring board.