Abstract: A load detector includes a housing having a height direction, and a load sensor provided within the housing. The load detector further includes a base platform, an elastic beam and an elastic member, the base being floatingly supported on the housing by the elastic beam, and the elastic member being provided on the base platform for receiving a load force. With the load force is applied to the elastic member, the elastic beam and the elastic member are simultaneously elastically deformed in the height direction, and the load force is transmitted to the load sensor via the base platform. The base platform is floatingly supported on the housing by the elastic beam, so that a high sensitivity of the load sensor may be enabled and the load sensor may be prevented from damage caused by excessive load.

Abstract: A multichip package and a method for manufacturing the same are provided. A multichip package includes: a plurality of semiconductor chips each mounted on corresponding lead frame pads; lead frames connected to the semiconductor chips by a bonding wire; and fixed frames integrally formed with at least one of the lead frame pads and configured to support the lead frame pads on a package-forming substrate.

Abstract: An electronic component includes a metal member, an inductor, and a encapsulating resin. The metal member has an outer lead, an inner lead provided at a position opposed to the outer lead, and a post connecting the outer lead with the inner lead. The inductor is provided between the outer lead and the inner lead and connected to the outer lead or the inner lead. The encapsulating resin encapsulates the metal member and the inductor.

Abstract: Methods for fabricating microelectronic device assemblies, the method comprising providing mutually spaced stacks of microelectronic devices on a substrate and substantially concurrently encapsulating the stacks of microelectronic devices on the substrate and gang bonding mutually aligned conductive elements of vertically adjacent microelectronic devices. Compression molding apparatus for implementing the methods, and resulting microelectronic device assemblies are also disclosed.

Abstract: A semiconductor package includes a plurality of metal leads and a semiconductor die attached to the plurality of metal leads by an interconnect. A surface of the plurality of metal leads, a metallized surface of the semiconductor die, and/or a surface of the interconnect comprises Cu and has a thermal conductivity in a range of 340 to 400 W/mK and an electrical conductivity in a range of 80 to 110% IACS. One or more of the surfaces which comprise Cu and have a thermal conductivity in the range of 340 to 400 W/mK and an electrical conductivity in the range of 80 to 110% IACS also includes micropores having a diameter in a range of 1 ?m to 10 ?m. A method of manufacturing a metal surface with such micropores also is described.

Abstract: A lead frame is provided, including one or more power terminals and one or more control terminals, wherein at least one of the control terminals is externally terminated with a press-fit contact member, and wherein at least one of the control terminals and at least one power terminals are formed from different materials. With the disclosed lead frame of the invention, lower material cross sections in the power terminals will be provided because of the better electrical conductivity when using pure copper compared to alloys with higher mechanical strengths. Also specific/different plating could be added to the individual needs of the different pin types without using masks in the plating process.

Abstract: A lead frame is provided, including one or more power terminals and one or more control terminals, wherein at least one of the control terminals is externally terminated with a press-fit contact member, and wherein at least one of the control terminals and at least one power terminals are formed from different materials. With the disclosed lead frame of the invention, lower material cross sections in the power terminals will be provided because of the better electrical conductivity when using pure copper compared to alloys with higher mechanical strengths. Also specific/different plating could be added to the individual needs of the different pin types without using masks in the plating process.

Abstract: A semiconductor device has a semiconductor chip mounted on an island of a lead frame and covered by an encapsulating resin. An outer lead extends from the encapsulating resin and is connected within the encapsulating resin to an inner lead connected to an inner lead suspension lead. A plated film is plated on the exposed surfaces of the outer lead that extend from the encapsulating resin to improve solder bonding strength of the semiconductor device onto a substrate.

Abstract: A packaging structure includes a lead frame, a chip, and a packaging material. The lead frame has a pair of opposed first surface and second surface, and has a first recessed region located on the second surface. The chip has a pair of opposed first surface and second surface. The first surface of the chip is fixed on the first recessed region. The packaging material surrounds the lead frame and the chip. The second surface of the chip is exposed from the packaging material, and the first surface of the lead frame is exposed from the packaging material.

Abstract: A semiconductor device uses a lead frame, in which an outer lead is electrically connected to an inner lead suspension lead via an inner lead. An encapsulating resin covers the inner lead and part of the outer lead, and a plated film is formed on an outer lead cut surface so that a solder layer is easily formed on all surfaces of the outer lead extending from the encapsulating resin. The inner lead suspension lead includes a narrowed portion that is smaller in cross-sectional area than other portions of the inner lead suspension lead to suppress impact forces generated when the inner lead suspension lead is cut.

Abstract: The disclosure provides a cross-linkable polymer composition, a core layer for an information carrying card comprising such cross-linked composition, resulting information carrying card, and methods of making the same. A crosslinkable polymer composition comprises a curable base polymer resin in a liquid or paste form, and a particulate thermoplastic filler. The base polymer resin is selected from the group consisting of urethane acrylate, silicone acrylate, epoxy acrylate, urethane, acrylate, silicone and epoxy. The particulate thermoplastic filler may be polyolefin, polyvinyl chloride (PVC), a copolymer of vinyl chloride and at least another monomer, or a polyester such as polyethylene terephthalate (PET), a compound or blend thereof.

Abstract: A method for manufacturing a surface-mount electronic device includes making a first partial cut from a bottom of an assembly that includes a first semiconductor body that is disposed on a first die pad, a second semiconductor body that is disposed on a second die pad, and a plurality of terminal regions that is disposed between the first and second die pads. The first partial cut forms a recess by removing a portion of each of the terminal regions. The recess is defined by a transverse wall, a first sidewall, and a second sidewall. The first and second sidewalls and the transverse wall are coated with an anti-oxidation layer. A second partial cut is made from the top, where the second partial cut removes the transverse wall, separates the first and second semiconductor bodies, and has a width that is greater than a width of the first partial cut.

Abstract: Microelectronic die packages, stacked systems of die packages, and methods of manufacturing them are disclosed herein. In one embodiment, a system of stacked packages includes a first die package having a bottom side, a first dielectric casing, and first metal leads; a second die package having a top side attached to the bottom side of the first package, a dielectric casing with a lateral side, and second metal leads aligned with and projecting towards the first metal leads and including an exterior surface and an interior surface region that generally faces the lateral side; and metal solder connectors coupling individual first leads to individual second leads. In a further embodiment, the individual second leads have an “L” shape and physically contact corresponding individual first leads. In another embodiment, the individual second leads have a “C” shape and include a tiered portion that projects towards the lateral side of the second casing.

Abstract: A connector assembly including a connector body with a spring clip including a first free end for engaging a side wall of an electrical box upon installation. During insertion of the connector body the first free end engages the knock-out hole perimeter and deforms so as to permit further insertion. Once the connector body is fully inserted, the spring clip cooperates with a lug on the connector body to hold the connector assembly onto the electrical box. Clamp mechanisms are provided to securing the connector assembly to a cable end.

Abstract: A packaged semiconductor is disclosed. The packaged semiconductor comprises a conductive integral frame that includes an inner portion and a ring portion encircling the inner portion, a semiconductor die that is mounted to a first surface of the inner portion of the conductive frame, and a casing that supports the conductive frame and covers the semiconductor die. Sections of the conductive frame that connect the inner portion to the ring portion are removed after the casing is applied to the conductive frame.

Abstract: A system having a heat exchanger with a bottom side, a first nonconductive layer coupled to the bottom side of the heat exchanger, a heat shield made of an electrically conductive material and being coupled to the first nonconductive layer, and an electrical connector electrically coupled to the heat shield, the electrical connector being capable of being connected to an electrical ground.

Abstract: A housing module 10 for a circuit board comprises a first chamber 20 for accommodating a main part of the circuit board and a second chamber 22 bordering the first chamber 20 and having a greater depth that the first chamber 20 to enable it to accommodate a connector 16 located along an edge of the circuit board and protruding above the surface of the circuit by an amount exceeding the depth of the first chamber 20. The exterior of the module 10 is shaped to enable two similar modules 10 to be stacked with the first chambers 20 overlying one another and with the second chambers 22 circumferentially staggered around the stack, thereby and acting to maintain the modules of the stack in alignment with one another.