Surrounding Lead Patents (Class 174/540)
  • Patent number: 10833041
    Abstract: A fan-out semiconductor package may include a support member having a through-hole, a semiconductor chip disposed in the through-hole, a component embedded structure disposed adjacent to and spaced apart from the semiconductor chip in the through-hole by a predetermined distance, an encapsulant, and a connection member. The semiconductor chip has an active surface having connection pads disposed thereon and an inactive surface opposing the active surface. The component embedded structure has a plurality of passive components embedded therein. The encapsulant encapsulates at least portions of the support member, the component embedded structure, and the semiconductor chip. The connection member is disposed on the support member, the component embedded structure, and the active surface of the semiconductor chip. The connection member includes redistribution layers and vias electrically connecting the redistribution layers to the plurality of passive components and the connection pads of the semiconductor chip.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: November 10, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jun Oh Hwang, Ki Jung Sung
  • Patent number: 10763204
    Abstract: A semiconductor device includes: a semiconductor element; a support as a metallic member that includes a metallized layer having a first component as an iron group element and a second component as a periodic table group five or group six transition metal element other than chromium provided at an outermost surface of the support, and is arranged such that the outermost surface faces the semiconductor element; a joint material that is arranged between the outermost surface of the support and the semiconductor element, and is joined with the outermost surface to fix the semiconductor element to the support; and a molding resin that is arranged to cover a joint body having the support, the joint material and the semiconductor element.
    Type: Grant
    Filed: February 25, 2019
    Date of Patent: September 1, 2020
    Assignees: DENSO CORPORATION, C. Uyemura & Co., Ltd.
    Inventors: Tomohito Iwashige, Kazuhiko Sugiura, Kazuhiro Miwa, Yuichi Sakuma, Seigo Kurosaka, Yukinori Oda
  • Patent number: 10636735
    Abstract: The invention discloses a package structure made of the combination of a metallic substrate and a lead frame. In one embodiment, a recess is formed in the metallic substrate and a first conductive element having at least one first I/O terminal is bonded in the recess. A lead frame is formed on the metallic substrate and comprises a plurality of electrical connections to connect with said at least one first I/O terminal of the first conductive element. In another embodiment, another conductive element is disposed in the vacancy of the lead frame. The invention also discloses a method for manufacturing a package structure made of the combination of a metallic substrate and a lead frame.
    Type: Grant
    Filed: October 14, 2011
    Date of Patent: April 28, 2020
    Assignee: CYNTEC CO., LTD.
    Inventors: Bau-Ru Lu, Jeng-Jen Li, Kaipeng Chiang
  • Patent number: 10354944
    Abstract: A method for soldering a surface-mount component onto a circuit board. The melting of die-bonding solder material is prevented by using a mounting solder material when soldering a surface-mount component formed using the die-bonding solder material onto a printed circuit board. The surface-mount component, formed using (Sn—Sb)-based solder material having high melting point, the (Sn—Sb)-based solder material containing Cu but not more than a predetermined quantity of Cu constituent and a main ingredient thereof being Sn, is soldered on a board terminal portion of a circuit board using (Sn—Ag—Cu—Bi)-based solder material or (Sn—Ag—Cu—Bi—In)-based solder material as the mounting solder material and with the solder material being applied on the terminal portion. Since solidus temperature of the die-bonding solder material is 243 degrees C. and liquidus temperature of the mounting solder material is about 215 through 220 degrees C.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: July 16, 2019
    Assignee: Senju Metal Industry Co., Ltd.
    Inventors: Minoru Ueshima, Minoru Toyoda
  • Patent number: 9768327
    Abstract: Fabricating a semiconductor device can include forming a metal seed region over a substrate. The method can include forming a mask over a first portion of the metal seed region. The method can also include forming a metal region over the metal seed region and removing the mask. The method can include forming metal contact fingers on the semiconductor device, where the forming includes etching the first portion of the metal seed region with an etchant comprising an acid, an oxidizer and chloride ions.
    Type: Grant
    Filed: June 25, 2015
    Date of Patent: September 19, 2017
    Assignees: SunPower Corporation, Total Marketing Services
    Inventors: Robert Woehl, David Aaron Randolph Barkhouse, Paul Loscutoff
  • Patent number: 9111869
    Abstract: A high temperature, non-cavity package for non-axial electronics is designed using a glass ceramic compound with that is capable of being assembled and operating continuously at temperatures greater that 300-400° C. Metal brazes, such as silver, silver colloid or copper, are used to connect the semiconductor die, lead frame and connectors. The components are also thermally matched such that the packages can be assembled and operating continuously at high temperatures and withstand extreme temperature variations without the bonds failing or the package cracking due to a thermal mismatch.
    Type: Grant
    Filed: July 29, 2011
    Date of Patent: August 18, 2015
    Assignee: Semtech Corporation
    Inventors: Victor Hugo Cruz, David Francis Courtney
  • Patent number: 8787003
    Abstract: According to one embodiment of a capacitor module, the capacitor module includes a substrate having a metallization on a first side of the substrate, a plurality of connectors electrically coupled to the metallization and a plurality of capacitors disposed on the metallization. The plurality of capacitors includes a first set of capacitors electrically connected in parallel between a first set of the connectors and a second set of the connectors. The capacitor module further includes a housing enclosing the plurality of capacitors within the capacitor module.
    Type: Grant
    Filed: October 12, 2011
    Date of Patent: July 22, 2014
    Assignee: Infineon Technologies AG
    Inventors: Daniel Domes, Reinhold Bayerer
  • Patent number: 7653099
    Abstract: A semiconductor laser device according to the present invention includes: a semiconductor laser chip 1 for emitting laser light; a stem 3, 4 for supporting the semiconductor laser chip; a plurality of terminal electrodes, inserted in throughholes provided in the stem 3, 4, for supplying power to the semiconductor laser chip; and a cap 5 having an optical window 6 which transmits laser light and being affixed to the stem 3, 4 so as to cover the semiconductor laser chip 1. Between the stem 3, 4 and the terminal electrodes 7, this device includes insulation glass 8, which does not release silicon fluoride gas when heated to a temperature of no less than 700° C. and no more than 850° C.
    Type: Grant
    Filed: June 2, 2005
    Date of Patent: January 26, 2010
    Assignee: Panasonic Corporation
    Inventors: Yoshiaki Hasegawa, Toshiya Yokogawa, Hiroyoshi Yajima
  • Patent number: 7586187
    Abstract: An interconnect structure with stress buffering ability is disclosed, which comprises: a first surface, connected to a device selected form the group consisting of a substrate and an electronic device; a second surface, connected to a device selected form the group consisting of the substrate and the electronic device; a supporting part, sandwiched between and interconnecting the first and the second surfaces while enabling the areas of the two ends of the supporting part to be small than those of the first and the second surfaces in respective; and a buffer, arranged surrounding the supporting part for absorbing and buffering stresses.
    Type: Grant
    Filed: June 23, 2006
    Date of Patent: September 8, 2009
    Assignee: Industrial Technology Research Institute
    Inventors: Yung-Yu Hsu, Shyi-Ching Liau, Ra-Min Tain, Jr-Yuan Jeng