Abstract: A high-throughput bidirectional data communication channel is formed of a pipelined plurality M of stages, connected to the input/output (I/O) port of each of the pair of devices using the channel, and configured to allow interruptibility of data transmission by either device connected to the channel; either device may be sender or receiver and transmission of data may be interrupted by either device for any number of cycles and resumed without loss or duplication of data at the receiver. The channel uses pipelining to achieve longer distance parallel transmission of N plural data bits, while maintaining the maximum high speed throughput. The channel, and its associated data transfer protocol, supports bidirectional transmission of data between the two sourcing/terminating devices with maximum throughput being achieved by transmitting a word of parallel data during every clock cycle.

Abstract: The invention relates to a bidirectional communication line buffer apparatus in which the communication direction of data of a bidirectional data line and the length of the data are judged. A bidirectional buffer circuit receives the results of such judgement and is made non-conductive on the basis of a data termination indication obtained from the received judgement after data is conducted in the communication direction based on the received judgement. Accordingly, the communication data waveform shaping and the driving capability are improved.

Abstract: The present invention generates a data clock for data processing circuitry by developing an optimum locally generated clock signal which is selected with each received data message. This is achieved by utilizing a local crystal clock which serves as an input to a multiple active parallel tap delay line. A register has the various delay signals input to it and a window generator strobes the inputs to the register so as to process the strobed levels of the various delayed clock signals. This is done to detect a level transition in any of the clock phases. Gating circuitry then chooses an optimum clock phase which has undergone a transition in a desired direction during the time window when the various clock phases were strobed. As a result of the present invention, utilized bandwidth may be increased and data distortion is minimized so that the number of stations connected to a data bus provided with the data clock of the invention may be increased substantially.

Abstract: A circuit arrangement for time regeneration of digital signals comprises a correction circuit and a control circuit containing a low-pass filter. For time regeneration of broadband digital signals coded in a DC-free code in broadband digital signal switching and/or transmission systems, a correction element is inserted into the signal path and includes a digital signal input and a control input. The digital signal experiences an increase running time at its signal edges of the one operational sign in the correction element and simultaneously experiences a reduced running time at its signal edges of the other operational sign based on the measure of each DC component occurring in the digital signal. The control circuit comprises a limiter which receives the digital signal and a low-pass filter connected to the limiter and to the control input of the correction element, the control circuit identifying such a DC component.

Abstract: A digital signal repeater system, including means for controlling the transmitter of the system. The system is substantially immune to fading, interference and noise, and rapidly detects the reception of a digital signal. A first level detector outputs a logical 1 signal to indicate reception of a signal, in response to the level of the IF signal in the receiver. A second level detector indicates when the received signal is digital by filtering the demodulated received signal and generating a logical 1 output when the received signal has a substantial component at a predetermined clock frequency. The two logical output signals are applied to an AND gate and the output is smoothed and compared by a comparator to a reference level. The output of the comparator is used to control the transmitter.

Abstract: A repeater circuit for repeating data on a communication channel, the repeater circuit having two receiver/driver circuits arranged in repeating fashion and having a control circuit for maintaining the receiver/driver circuits in a listening mode, for switching one of the receiver/driver circuits to a transmitting mode when the other of the receiver/driver circuits receives data, and for maintaining the switched receiver/driver circuits switched by an amount of time required for the bus connected to the switched receiver/driver circuit to return to its normal state after the cessation of transmitted data.

Abstract: A solid state switching network includes three FET switches or devices arranged in a substantially "T" (or inverted "T") configuration. The network is controlled so that in an "OFF" or non-conducting state two of the FET switches are "OFF" and one is on. The high "OFF" impedance of the two FETs work against the low "ON" impedance of the third FET to provide an open circuit between the input and output of the switching network. The open circuit has greater isolation than is feasible with conventional circuits. The switching network or module is used in several configurations to couple data terminal equipment (DTE) to a communications highway.

Abstract: A system provides for the validation of users of a trunked radio system. The system includes a controller and at least one microcomputer-controlled repeater module for user identification and validation. Each repeater module includes a tracking filter for removing unwanted noise from the two-tone signal sequentially transmitted by the user's radio as well as a digital signal processor utilizing a novel filter algorithm to quickly and reliably identify and validate user group tones. If identified as a valid user, the repeater module allows the call to pass. If the identity and validity, i.e., a paying customer, of the user are not validated by the repeater module, the repeater is shut down and the user is unable to communicate, and only hears alert tones from his speaker.

Abstract: A telemetry system for sensing remote physical events and for transmitting and boosting a digital data signal representing the sensed events on a transmission line, which comprises a master clock and a plurality of sensing stations for sensing local data. The sensing stations inject local data onto the transmission line as a digital data signal, and a controller/receiver receives the digital data. The master clock initializes the system timing and generates a sync signal. Each sensing station includes a booster subsystem for receiving the local digital data and for injecting the digital data onto the transmission line as a digital data signal. During system start up, each booster subsystem claims a slot, in accordance with an organizational process, for injecting the digital data signal onto the transmission line. The booster subsystem in each sensing station further includes a booster circuit for boosting the digital data signals which are propagating on the transmission line, as well as the sync signal.

Abstract: A telemetry system for sensing remote physical events and for transmitting and boosting a digital data signal representing the sensed events on a transmission line, which comprises a master clock and a plurality of sensing stations for sensing local data. The sensing stations inject local data onto the transmission line as a digital data signal, and a controller/receiver receives the digital data. The master clock initializes the system timing and generates a sync signal. Each sensing station includes a booster subsystem for receiving the local digital data and for injecting the digital data onto the transmission line as a digital data signal. During system start up, each booster subsystem claims a slot, in accordance with an organizational process, for injecting the digital data signal onto the transmission line. The booster subsystem in each sensing station further includes a booster circuit for boosting the digital data signals which are propagating on the transmission line, as well as the sync signal.

Abstract: Described is the regeneration of dial pulses in the signalling system CCITT type B. The dial pulses are regenerated by a combined regeneration process comprising a reduced process with two sampling instants (10 ms, 30 ms) and an inverse process with four (anisochronous) sampling instants (10 ms, 30 ms, 52 ms, 72 ms). The reduced process is started by the stop-start transition at the beginning of the first of a series of dial pulses and the inverse process by the start-stop transition which occurs at the end of the series of dial pulses.

Abstract: A data relay system transmits addresses from a host device sequentially to each of a plurality of data relays and for transmitting data sequentially through each of the plurality of data relays to the host device. Serial addresses are placed on the data bus by the host device and received by a Signal Conditioner in the data relay and passed through an Address Parallelizer and Address Selector. If the address is recognized by the Address Selector, then a Data Group is counted by the Data Group Counter while the Data Group is enabled. The enabling of a selected Data Group will result a selected parallel data being supplied to the Data Group Serializer which present the parallel data for serial transmission to the host device.

Abstract: An electronic relay arrangement that is suitable for use as a repeater in systems for single-current as well as double-current telegraphy comprising an input circuit, an output circuit and a transmission circuit interposed between the input and output circuits. The input circuit comprises a current switching device which responds when a threshold current value of the telegraph line current is exceeded and causes a current, having a predetermined constant value, to flow through the transmission circuit. The electrical isolation between the input and output circuits can be effected by, for example, a light-emitting diode in the transmission circuit and a photo-transistor.

Abstract: In known signal regenerating apparatus a high frequency signal is continuously applied to the secondary side and inductively coupled back to a resonant circuit on the primary side. The resultant oscillations in the resonant circuit are modulated by the incoming communication signals. The so-modulated signals are coupled back to the secondary side where they are demodulated. The demodulated signals are identical to the communication signals except for a DC component. A separate rectifier circuit, similar to the demodulator circuit is therefore provided for rectifying the high frequency signal. The rectified high frequency signal constitutes a DC voltage which, when combined with the demodulated signals, will remove the undesired DC component therefrom.

Abstract: A timing-phase control system provided on the receiving side of a duobinary transmission system is adaptable to high-speed PCM repeater systems using a wide-band transmission medium such as a coaxial cable. The system includes a discriminating and regenerating circuit for recovering the transmitted digital signal by discriminating and regenerating in an appropriate timing phase based on an input equalized duobinary waveform, a phase varying circuit for varying the phase of a timing signal externally supplied to the discriminating and regenerating circuit, and a derivative waveform generating circuit. In one embodiment, the derivative waveform generating circuit is responsive to the output of the discriminating and regenerating circuit, and a multiplier multiplies the output of the derivative waveform generating circuit and the equalized duobinary waveform by each other in a predetermined phase relationship.

Abstract: A roving reference automatic gain control (AGC) arrangement is used in a regenerator of a pulse code modulation (PCM) transmission system. An adjustable gain circuit receives a sequence of data pulses and produces a data-pattern-dependent input signal. A signal channel circuit, responsive to the input signal, produces a data-pattern-dependent detected signal. Regeneration circuitry, responsive to the input signal, produces a regenerated data-pattern-dependent output signal. A reference channel circuit, responsive to the output signal, produces a data-pattern-dependent reference signal. A circuit algebraically combines the detected signal with the reference signal to form a continuously-variable data-pattern-independent gain control signal which is applied to the adjustable gain circuit for controlling the gain thereof.

Abstract: A digital repeater for the regeneration of partial-response signals having improved noise immunity which basically comprises an equalizer followed by a regenerator. A band limiting filter disposed between the equalizer and regenerator transforms the partial-response signal to a modified form having the same or fewer levels and concurrently reduces the total power of the noise interference. A second filter disposed after the regenerator and having an inverse transfer function replicates the partial-response signal at its output so that the repeater appears transparent to the transmission line.

Abstract: In a data-transmission route involving parallel (e.g. 8Mb/s) data-transmission systems each using a separate line pair, a common line pair, linking all terminal and repeater stations, is used for supervisory and control purposes (signals up to say 25 KHz) and each of e.g. 100 repeater stations (provided with a digital regenerator per data-line pair) has a single error-detection and a single interrogate/response signal circuit at the station. Additionally each repeater station has selection means for connecting the output side of any of the regenerators of the station to the error detector which is permanently associated with the interrogate/response circuit. After the identical setting of the selecting means at each repeater station (e.g.

Abstract: A binary to multistate line driver and remote receiver includes a line driver comprising first and second injection logic encoder circuits. The circuits have current injectors and are connected to receive respective first and second binary signals to provide analog outputs at a signal output terminal in response to the input signals. The encoder circuits each have current injectors with substantially similar structural characteristics. The line driver further includes a reference channel circuit connected to a reference terminal to provide a reference to the encoded signals. The reference circuit has a current injector with structural characteristics substantially similar to the encoder circuit current injectors.

Abstract: The invention relates in particular to remote supply with AC of repeaters a transmission line with symmetrical pairs. It provides a remote supply system in which the AC remote supply passes through a loop formed by two pairs of the line and in which each repeater is supplied by the secondary winding of a current transformer whose primary winding is formed by two identical windings inserted in series opposition, one in one of the pairs forming the remote supply loop, the other in the other of these pairs. It applies advantageously to the transmission lines which have a path common to an electric power line as is the case for example with a transmission line along electrified railway lines.

Abstract: In PCM transmission, it is well known to transmit 24 voice-grade channels at a bit rate of 1.544 Megabits per second (Mb/s). The number of channels which may be transmitted in about the same bandwidth is doubled by the use of correlative level coding, such as the modified duobinary technique. Because of the degradation experienced by the modified duobinary signal in passing over cable pairs, periodic regeneration of the signals is required for effective transmission. The present invention is directed to a regenerative repeater which equalizes, amplifies, reshapes, and retimes the received modified duobinary signal so as to provide a regenerated signal which is nearly identical with that originally transmitted.

Abstract: An end-office repeater accepts a high-speed bipolar signal, converts the bipolar signal into a unipolar signal, scrambles the unipolar signal, and encodes the scrambled unipolar signal into a modified duobinary signal for transmission over a cable pair. Before cable loss would severely degrade the duobinary signal, line repeaters and/or inter-office repeaters are installed at predetermined intervals so as to equalize and regenerate the modified duobinary signal. By so doing, the signal is recovered with acceptable phase jitter, which permits recovery of the original high-speed bipolar signal at the distant end of a repeatered span line. The receiving-end office repeater equalizes and regenerates the modified duobinary signal, decodes the signal to obtain a unipolar signal, descrambles the unipolar signal, and converts the unipolar signal into a bipolar signal.Detection of errors in the modified duobinary signal may be obtained without adding redundant digits.

Abstract: An asynchronous, regenerative, digital repeater for use in bipolar digital signalling systems includes an amplifier for receiving and amplifying incoming signals, a first monostable multivibrator for producing regenerated pulses responsively to the output of the amplifier, an output circuit for producing a bipolar pulse train responsively to the output of the multivibrator, and a second multivibrator for inhibiting the first multivibrator for a predetermined interval following the trailing edge of each output pulse to prevent the first multivibrator from responding to the electrical overshoot at the trailing edges of the incoming pulses.

Abstract: A PCM regenerator including an amplitude decision device, a time decision device which includes an input transformer with its secondary connected to a pair of transistors which form a push-pull circuit and wherein the output of directly consecutive pulses always have different polarities and accurately reconstructed pulses are produced.

Abstract: A data communication system for asynchronously transmitting intermittently generated digitally encoded data between a data processor and a plurality of data terminals associated therewith is disclosed wherein the allowable communications line distance between the data processor and the terminals is substantially increased. Asynchronous data from the terminals is intercepted by a novel repeater, retimed in accordance with a newly generated retiming clock to eliminate bit-shift or other errors from the data, and retransmitted to the central processor over an extended length transmission line, with the repeater being substantially transparent to the flow of data. Decoding of an appropriate code by the repeater which is indicative of the receipt of a data character causes the switching from a data derived clock to a retiming clock for reencoding and retransmission of the data.

Abstract: A bidirectional line driver circuit for transmitting logic signals on a highly capacitive, or low impedance transmission line makes use of a tandem connection of switching means for providing a low impedance connection from the output of the driver circuit to either a first power supply voltage or a second power supply voltage to define transmitted logic levels. Coupled to the tandem switching means is a buffered feedback circuit which responds to conduction of the first switching means connected to the first power supply voltage such that nonconduction is produced in the second switching means connected to the second power supply voltage. A buffer transistor is incorporated in the feedback circuit to insure that this response occurs without significant loading of the output terminal thus eliminating the possibility of oscillation and providing for very high speed switching performance.

Abstract: A regulated current pulse is generated for use in transferring digital data from low level voltage devices to those requiring substantially high current such as teletypewriters. By utilizing low voltage components, the current pulse level is continuously controlled, isolated from the low voltage source and applied to the load remotely located.

Abstract: A phase locked loop repeater for reshaping a non-return to zero (NRZ) data stream. A transition detector receives the input data stream from a coaxial cable in a degraded condition in terms of amplitude and phase distortion and produces reference pulses whose positions are very nearly independent of the direction of the transition of the input data. These reference pulses, along with clock pulses from a voltage controlled oscillator (VCO), are applied to a phase comparator and when these signals differ in phase, a voltage is developed for modifying the frequency of the VCO. The clock signals from the VCO are applied to the clock input of a D-type (edge triggered) flip-flop, to which is also applied the incoming data stream. The D-type flip-flop changes state in accordance with the incoming data only at the leading or trailing edge of the clock pulses. As such, the timing and amplitude of the data stream is reconstructed for reapplication and further transmission on said coaxial cable.

Abstract: The present disclosure describes semiconductor devices and circuits for sending and receiving data at high speed between computer modules with excellent noise immunity and low drive power. The semiconductor circuits are arranged to send data single-ended and to receive data differentially. As is required for full duplex operation over a pair of wires, the circuit arrangements are such that a driver in a given driver/receiver module does not influence the incoming data.

Abstract: A line device for transmission lines having coaxial cables for the transmission of signals, in particular digital signals or analog signals, employs an input equalizer in the form of a line section connected in parallel or in series to the transmission path, a first switch or dividing network for dividing the transmission path into a communications transmission path and a long distance current supply path, a regenerator in the communication transmission path, a series circuit connected in the long distance supply path including a first low pass filter, an element for producing a voltage drop for the current supply of the regenerator and a second low pass filter. A second switch or dividing network rejoins the communications and long distance supply paths and an output equalizer in the form of an additional line section is connected in parallel to the transmission path or in series with the transmission path.

Abstract: A repeater for a digital data-transmission system using a disparity-displaying digital code comprises a digital regenerator and error-detecting means therefor and in which supervisory control means incorporated in the repeater is operative upon reception of an interrogate pulse signal over one access path also used as a digital-data path, to cause a response signal to be returned over the access path according to the prevailing state of the error detecting means. The response signal comprises a different number of pulses for each of the two possible output states of the error detecting means.The repeater may be the first of a pair of repeaters of a particular repeater station, both repeaters including at least substantially identical digital regenerators and error-detecting means.