Abstract: A bubble-jet type ink-jet printhead, and a manufacturing method thereof are provided, wherein, the printhead includes a substrate integrally having an ink supply manifold, an ink chamber, and an ink channel, a nozzle plate having a nozzle, a heater consisting of resistive heating elements, and an electrode for applying current to the heater. In particular, the ink chamber is formed in a substantially hemispherical shape on a surface of the substrate, a manifold is formed from its bottom side toward the ink chamber, and the ink channel linking the manifold and the ink chamber is formed at the bottom of the ink chamber. Thus, this simplifies the manufacturing process and facilitates high integration and high volume production. Furthermore, a doughnut-shaped bubble is formed to eject ink in the printhead, thereby preventing a back flow of ink as well as formation of satellite droplets that may degrade image resolution.

Abstract: A method of etching a deep, high aspect ratio opening in a silicon substrate includes etching the substrate with a first plasma formed using a first gaseous mixture including a bromine containing gas, an oxygen containing gas and a first fluorine containing gas. The etching process with the first gaseous mixture produces a sidewall passivating deposit, which builds up near the opening entrance. To reduce this buildup, and to increase the average etching rate, the sidewall passivating deposit is periodically thinned by forming a second plasma using a mixture containing silane and a second fluorine containing gas. The substrate remains in the same plasma reactor chamber during the entire process and the plasma is continuously maintained during the thinning step. Holes of a depth greater than 40 times the width may be produced using repeated cycles of etching and thinning.

Abstract: A method of forming a conductive plug in a contact hole comprising: providing a wafer having a conductive layer comprising silicon adjacent a dielectric layer comprising silicon oxide, and a contact hole disposed in the dielectric layer, the contact hole having surfaces that include sidewalls formed in the dielectric layer and a bottom defined by the conductive layer, a contaminant material being disposed over at least a portion of the conductive layer defining the bottom of the contact hole, the dielectric layer having a surface in which the contact hole terminates in an opening opposing the bottom; depositing a layer of a barrier material on the work object, the layer having a substantially uniform thickness from the surface at the opening of the contact hole to the bottom of the contact hole; and depositing a layer of a protective material barrier around at least opening of the contact hole; etching the material at the bottom of the contact hole to expose the contaminant material while retaining protective

Abstract: A method of forming emitter tips for use in a field emission array is disclosed. The tips are formed by utilizing a polymer residue that forms during the dry etch sharpening step to hold the mask caps in place on the emitter tips. The residue polymer continues to support the mask caps as the tips are over-etched, enabling the tips to be etched past sharp without losing their shape and sharpness. The dry etch utilizes an etchant comprised of fluorine and chlorine gases. The mask caps and residue polymer are easily removed after etching by washing the wafers in a wash of deionized water, or Buffered Oxide Etch.

Abstract: A bubble-jet type ink-jet printhead, a manufacturing method thereof and a method of ejecting ink, wherein, in the printhead, a manifold supplying ink, a hemispherical ink chamber, and an ink channel for connecting the manifold with the ink chamber are integrally formed on the substrate. A nozzle plate on the substrate having a nozzle, and a heater formed in an annular shape and centered around the nozzle are integrated without a complex process such as bonding. Thus, this simplifies the manufacturing process and facilitates high volume production. Furthermore, according to the ink ejection method, a doughnut-shaped bubble is formed to eject ink, thereby preventing a back flow of ink as well as formation of satellite droplets that may degrade image resolution.

Abstract: A method for manufacturing an ink-jet printhead having a hemispherical ink chamber, wherein a nozzle plate is formed on a surface of substrate; a heater is formed on the nozzle plate; a manifold for supplying ink; an electrode is formed on the nozzle plate to be electrically connected to the heater; a nozzle is formed by etching the nozzle plate inside the heater; a groove for forming an ink channel is formed to expose the substrate so that the groove extends from the outside of the heater toward the manifold; an ink chamber is formed to have a diameter greater than the diameter of the heater and be hemispherical by etching the substrate exposed by the nozzle; an ink channel is formed to be in flow communication with the ink chamber and the manifold; and the groove is closed by forming a material layer on the nozzle plate.

Abstract: Methods for fabricating a highly effective, micron-scale micro heat barrier structure and process for manufacturing a micro heat barrier based on semiconductor and/or MEMS fabrication techniques. The micro heat barrier has an array of non-metallic, freestanding microsupports with a height less than 100 microns, attached to a substrate. An infrared reflective membrane (e.g., 1 micron gold) can be supported by the array of microsupports to provide radiation shielding. The micro heat barrier can be evacuated to eliminate gas phase heat conduction and convection. Semi-isotropic, reactive ion plasma etching can be used to create a microspike having a cusp-like shape with a sharp, pointed tip (<0.1 micron), to minimize the tip's contact area. A heat source can be placed directly on the microspikes. The micro heat barrier can have an apparent thermal conductivity in the range of 10−6 to 10−7 W/m-K. Multiple layers of reflective membranes can be used to increase thermal resistance.

Abstract: A method of forming emitter tips for use in a field emission array is disclosed. The tips are formed by utilizing a polymer residue that forms during the dry etch sharpening step to hold the mask caps in place on the emitter tips. The residue polymer continues to support the mask caps as the tips are over-etched, enabling the tips to be etched past sharp without losing their shape and sharpness. The dry etch utilizes an etchant comprised of fluorine and chlorine gases. The mask caps and residue polymer are easily removed after etching by washing the wafers in a wash of deionized water, or Buffered Oxide Etch.

Abstract: A method of removing photoresist material from a semiconductor substrate includes providing a semiconductor substrate having a patterned photoresist mask. A layer comprised of polymer material is formed over the patterned photoresist mask. The layer comprised of polymer material and a portion of the patterned photoresist mask are then removed. The layer comprised of polymer material is preferably formed by introducing a process gas into a plasma environment and is preferably formed with less thickness in a low aspect ratio area relative to a high aspect ratio area.

Abstract: A bubble-jet type ink jet printhead and manufacturing method thereof are provided. In the printhead, a manifold for supplying ink and a concave ink chamber is integrated with a substrate by being recessed from the same surface of the substrate, and a nozzle palate on the substrate in which a nozzle is formed and a round-shaped heater surrounding the nozzle are integrated without a complex process such as bonding. Thus, this simplifies the manufacturing procedure and facilitates high volume production. Furthermore, the round-shaped heater forms a doughnut-shaped bubble to eject ink, thereby preventing a back flow of ink as well as formation of satellite droplets which may degrade image resolution.

Abstract: A method for pitch reduction is disclosed. The method can form a pattern with a pitch ⅓ the original pitch formed by available photolithography technologies by only using one photo mask or one pattern transfer process, self-aligned etching back processes, and conventional deposition processes. By choosing appropriate layers to be deposited and etched, the pattern can be an etching mask or it can be a device structure itself.

Abstract: A method of using resist planarization to prepare for silicidation while protecting silicon nitride spacers in the fabrication of integrated circuits is described. Field oxide areas are formed on a semiconductor substrate surrounding and electrically isolating a logic device area and a memory device area. Polysilicon gate electrodes having silicon nitride sidewall spacers and associated source/drain regions are formed in the device areas. A silicon oxide layer is deposited overlying the gate electrodes and source/drain regions. The silicon oxide layer is covered with a photoresist layer. The photoresist layer is developed until the silicon oxide layer overlying the gate electrodes is exposed and the photoresist layer is below the tops of the gate electrodes. The exposed silicon oxide layer is etched away whereby the tops of the gate electrodes are exposed and wherein the silicon nitride spacers are undamaged by the etching. All of the silicon oxide layer in the logic device area is etched away.

Abstract: The invention relates to a method for trench etching, in particular a method for anisotropic deep trench (DT) etching in an Si substrate by plasma dry etching, such as reactive ion etching (RIE), magnetically enhanced RIE or inductively coupled plasma etching (ICP), and sidewall passivation of the etched trenches in the Si substrate, the Si substrate being provided with an etching mask before the beginning of the etching operation.

Abstract: The present invention provides various methods for eliminating printable alternating phase shift defects from an alternating phase shift mask without the need of using a trim mask. Specifically, unwanted printable defects are removed by employing methods which provide a gradual sloped region in the transparent or semi-transparent substrate which is formed in an area of the substrate opposite to that of the opaque image which is formed thereon.

Abstract: A method for forming ultra-fine width lines on a substrate avoids occurrence of overetch/underetch defects in the many etching steps, as solder layer or copper film etching steps. With the present method the line shape is able to be achieved close to an ideal shape, so that the quality of the lines is high and the integration of the substrate is also high.

Abstract: A process for producing multiple undercut profiles in a single material. A resist pattern is applied over a work piece and a wet etch is performed to produce an undercut in the material. This first wet etch is followed by a polymerizing dry etch which produces a polymer film in the undercut created by the first wet etch. The polymer film prevents further etching of the undercut portion during a second wet etch. Thus, an undercut profile can be obtained having a larger undercut in an underlying portion of the work piece, utilizing only a single resist application step. The work piece may be a multilayer work piece having different layers formed of the same material, or it may be a single layer of material. The process can be used to manufacture a base structure for a conical cathode emitter tip.

Abstract: A method of forming emitter tips for use in a field emission array is disclosed. The tips are formed by utilizing a polymer residue that forms during the dry etch sharpening step to hold the mask caps in place on the emitter tips. The residue polymer continues to support the mask caps as the tips are over-etched, enabling the tips to be etched past sharp without losing their shape and sharpness. The dry etch utilizes an etchant comprised of fluorine and chlorine gases. The mask caps and residue polymer are easily removed after etching by washing the wafers in a wash of deionized water, or Buffered Oxide Etch.

Abstract: The present invention is intended to collectively remove unnecessary resist material and side wall protective film after dry etching by side wall protection process, making it possible to simplify the process for the preparation of semiconductors, etc. The process according to the present invention comprises removing unnecessary resist material (3) left behind after dry etching by side wall protection process with a resist pattern (3) present on a semiconductor substrate (2) as a mask and side wall protective film (4) deposited on the side wall (22) of pattern, said process comprising the steps of applying an pressure-sensitive adhesive sheet (1) to said substrate (2), heating the pressure-sensitive adhesive layer (1) under pressure so that the pressure-sensitive adhesive (11) comes in contact with up to the side wall (4) of pattern, and then collectively peeling said pressure-sensitive adhesive sheet (1), said resist material (3) and said side wall protective film (4) off said substrate.

Abstract: The track width of the upper layer pole of a thin film magnetic head is formed with an enhanced level of precision. A plating underlay film 20 is formed on a sixth non-magnetic layer 16 and then an upper layer pole 14a is formed thereon by means of a frame plating technique. Then, a first resist film 22 is formed on one of the opposite lateral sides of the upper layer pole 14a and an etching operation is conducted on the upper layer pole 14a. Thereafter, the first resist film 22 is removed and a second resist film 23 is formed on the other lateral side and a similar etching operation is conducted on the upper layer pole 14a.

Abstract: A hydrogen-permeable metal membrane with increased hydrogen flux compared to conventional metal membranes is disclosed. Without sacrificing selectivity, the membrane enables a greater throughput of purified hydrogen. A method for preparing the invention includes at least one etching step in which a controlled volume of etchant is used to selectively remove material from the membrane's surface. Methods for repairing holes or other defects in the membrane are also disclosed.

Abstract: Wafer-to-wafer bonding using, e.g., solder metal bonding, glass bonding or polymer (adhesive) bonding is improved by profiling one or both of the wafer surfaces being bonded to define microstructures therein. Profiling means providing other than the conventional planar bonding surface to define cavities therein. The bonding material fills the cavities in the microstructures. For instance, a system of ridges and trenches (e.g. in cross-section vertical, slanted, key-holed shaped, or diamond-shaped) are microstructures that increase the surface area of the wafers to which the bonding material can adhere. Use of the key-hole shaped or diamond-shaped profile having a negative slope at the trench interior substantially increases the bonding force.

Abstract: A method for manufacturing a circuit board having a conductive via comprises the steps of providing a substrate having a first surface and a first conductive layer on at least one region of the first surface, forming an insulating layer on the first conductive layer, forming an opening in the insulating layer, so that the opening extending to the first conductive layer, forming a second conductive layer inside the opening and at least on the insulating layer near the opening, applying a positive photoresist on the second conductive layer, exposing the positive photoresist, developing the exposed positive photoresist, and removing the positive photoresist on the second conductive layer, except a portion of the second conductive layer that is inside the opening, etching the second conductive layer, to expose a surface of the second conductive layer, removing the positive photoresist from inside the opening, and forming a third conductive layer inside the opening.

Abstract: A probe tip configuration, being part of a probe (FIG. 2) for use in a scanning proximity microscope, is disclosed, comprising a cantilever beam (1) and a probe tip. Said tip comprises a first portion of a tip (2) and at least one second portion of a tip (5). Said first portion of a tip is connected to said cantilever beam whereas said second portion of a tip is placed on said first portion of a tip. Cantilever beam, first portion of a tip and second portion(s) of a tip can be composed of different materials and can be isolated each from another which makes an easy adjustement of the maximum penetration depth of the tip possible without limiting the resolution and makes it also possible to detect more than one signal of a sample at the same time using one cantilever beam.

Abstract: A susceptor provided as a base of a liquid crystal substrate in a vacuum chamber of a thin film deposition apparatus is provided. The susceptor includes a susceptor main body and a stepped portion provided on the susceptor main body to support the substrate from the bottom. The stepped portion is formed of a size smaller than the substrate. By the provision of the stepped portion, conduction between a film formed at an end plane of the substrate and a film formed at the portion around the substrate can be avoided.

Abstract: A mask (50′) with linewidth compensation and a method of making same. The mask provides for optimized imaging of isolated patterns (64) and nested patterns (70) present on the same mask. The compensated mask is formed from an uncompensated mask (50) and comprises an upper surface (56) upon which the isolated and nested patterns are formed. The isolated pattern comprises a first segment (76) having first sidewalls (76S). The nested pattern comprises second segments (72) proximate each other and having second sidewalls (72S). A partial conformal layer (86) covers the first segment and has feet (90) outwardly extending a distance d from the first sidewalls along the upper surface. The feet are preferably of a thickness that partially transmits exposure light.

Abstract: A probe tip configuration, being part of a probe (FIG. 2) for use in a scanning proximity microscope, is disclosed, comprising a cantilever beam (1) and a probe tip. Said tip comprises a first portion of a tip (2) and at least one second portion of a tip (5). Said first portion of a tip is connected to said cantilever beam whereas said second portion of a tip is placed on said first portion of a tip. Cantilever beam, first portion of a tip and second portion(s) of a tip can be composed of different materials and can be isolated each from another which makes an easy adjustement of the maximum penetration depth of the tip possible without limiting the resolution and makes it also possible to detect more than one signal of a sample at the same time using one cantilever beam.

Abstract: A technique to prevent peeling of deposits formed on the surface of the inner walls of the thin-film formation apparatus and the members inside the apparatus and to suppress particle production without contamination of the inside of the apparatus. A member for a thin-film formation apparatus having inner walls and a method for manufacturing the member is provided. A plurality of unevenness is provided on at least a portion of the surface of the member and the inner walls on which unnecessary thin films are deposited. The surfaces are subjected to masking, and then, etching processing to form the plurality of unevenness. After the etching processing the masking is removed.

Abstract: A process for producing multiple undercut profiles in a single material. A resist pattern is applied over a work piece and a wet etch is performed to produce an undercut in the material. This first wet etch is followed by a polymerizing dry etch which produces a polymer film in the undercut created by the first wet etch. The polymer film prevents further etching of the undercut portion during a second wet etch. Thus, an undercut profile can be obtained having a larger undercut in an underlying portion of the work piece, utilizing only a single resist application step. The work piece may be a multi-layer work piece having different layers formed of the same material, or it may be a single layer of material.

Abstract: A semiconductor wafer etching method is disclosed that allows etching without use of restricted ozone-destroying solvents such as trichloroethane or fluorocarbons. This method involves forming a protective film of silicon resin or alkali resistant resin on a semiconductor wafer. Then, a surface region of the wafer not covered by the protective film is etched. Finally, the protective film is peeled from the semiconductor wafer without damaging the wafer or employing solvents harmful to the environment.

Abstract: A process for producing multiple undercut profiles in a single material. A resist pattern is applied over a work piece and a wet etch is performed to produce an undercut in the material. This first wet etch is followed by a polymerizing dry etch which produces a polymer film in the undercut created by the first wet etch. The polymer film prevents further etching of the undercut portion during a second wet etch. Thus, an undercut profile can be obtained having a larger undercut in an underlying portion of the work piece, utilizing only a single resist application step. The work piece may be a multi-layer work piece having different layers formed of the same material, or it may be a single layer of material.

Abstract: A method for producing structures having a high aspect ratio includes the following steps: a material of the structure to be produced is provided in the form of a layer, a mask is applied to the layer, the layer is subjected to dry etching using the mask, thereby forming redepositions of the layer material on side walls of the mask and the mask is removed, so that a structure having a high aspect ratio is left behind. The method enables very high (≧1 &mgr;m) and very thin (≦50 nm) structures to be produced in a relatively simple and rapid manner in only very few process steps and with only one mask technique. Structures having such large aspect ratios, particularly when they are composed of a conductive material, cannot be produced, or can be produced only with a high outlay, by using other methods.

Abstract: A method of retaining the integrity of a photoresist pattern is provided where the patterned photoresist is treated prior to etching the principle layer. The pre-etch treatment encompasses a plasma treatment. In some embodiments employing an anti-reflective coating (ARC) layer, an isolation/protective layer is used to isolate the ARC from the photoresist. In some embodiments, the pre-etch treatment, advantageously provides for patterning the isolation/protection layer.

Abstract: A method for forming a chamber or nozzle structure in a substrate. The chamber is formed by first creating a surface feature, such as a pit or trench, on the surface of the substrate. A layer of resist is applied to the sidewall of the surface feature and the substrate is isotropically etched such that the etch works back up the inside of the resist on the surface feature sidewall to form a re-entrant angle between the surface feature sidewall and the top of the chamber wall. This results in a chamber that is wider than the opening between the sidewalls of the surface feature. An anisotropic etch step may be performed before or after the isotropic etch step or steps to control the final shape of the chamber.

Abstract: A hydrogen-permeable metal membrane with increased hydrogen flux compared to conventional metal membranes is disclosed. Without sacrificing selectivity, the membrane enables a greater throughput of purified hydrogen. A method for preparing the invention includes at least one etching step in which a controlled volume of etchant is used to selectively remove material from the membrane's surface. Methods for repairing holes or other defects in the membrane are also disclosed.

Abstract: A method for improving profile control during an etch of a nitride layer disposed above a silicon substrate is disclosed. The nitride layer 106 is disposed below a photoresist mask 108A. The method includes positioning the substrate, including the nitride layer and the photoresist mask, in a plasma processing chamber. There is also included flowing a chlorine-containing etchant source gas into the plasma processing chamber. Further, there is included igniting a plasma out of the chlorine-containing etchant source gas to form a chlorine-based plasma within the plasma processing chamber. Additionally, there is included treating, using a chlorine-based plasma, the photoresist mask in the plasma processing chamber. The treatment of the photoresist is configured to etch at least a portion of the photoresist mask and to deposit passivation polymer on vertical sidewalls of the photoresist mask without etching through the nitride layer.

Abstract: Method for etching an oxide film in a plasma etching system, specifically in a high concentration plasma etching system, is disclosed, in which a mixture of new etching gas chemistry of first, second and third gases is used in forming an oxide film suitable to an integrated circuit with a high device packing density, for improving an etch rate and an etch selectivity of the oxide film to a sub-layer, the mixture gas consisting of CHF.sub.X /C.sub.a HF.sub.b /C.sub.Y F.sub.Z, CHF.sub.X /CH.sub.b F/C.sub.Y F.sub.Z or CHF.sub.X /CH.sub.a F.sub.b /C.sub.Y F.sub.Z.

Abstract: The preferred embodiment of the present invention provides a transistor structure and method for fabricating the same that overcomes the disadvantages of the prior art. In particular, the preferred structure and method results in lower leakage and junction capacitance by using raised source and drains which are partially isolated from the substrate by a dielectric layer. The raised source and drains are preferably fabricated from the same material layer used to form the transistor gate. The preferred method for fabricating the transistor uses hybrid resist to accurately pattern the gate material layer into regions for the gate, the source and the drain. The source and drain regions are then connected to the substrate by growing silicon. The preferred method thus results in an improved transistor structure while not requiring excessive fabrication steps.

Abstract: A single-mask process for fabricating enclosed, micron-scale subsurface cavities in a single crystal silicon substrate includes the steps of patterning the substrate to form vias, etching the cavities through the vias, and sealing the vias. Single cavities of any configuration may be produced, but a preferred embodiment includes closely spaced cavity pairs. The cavities may be separated by a thin membrane, or may be merged to form an enlarged merged cavity having an overhanging bar to which electrical leads may be connected. A three-mask process for fabricating enclosed cavities with electrical contacts and electrical connections is also disclosed.

Abstract: A method for producing a semiconductor device comprises forming a film to be etched, an organic antireflective film and a resist mask on a substrate in this order; and before etching the film to be etched, dry-etching the organic antireflective film into a predetermined configuration by use of the resist mask and an etching gas containing chlorine atom and oxygen atom with maintaining the substrate at such a temperature that allows deposition of a substance produced by reaction of the organic antireflective film with chlorine atom contained in the etching gas.

Abstract: Method for wet etching where proper arrangements of the substrates during the growth of the insulation layer is adopted. An insulation layer is prepared on the surface of a substrate at the area where thin film circuits are positioned. On the surfaces of the substrate where the thin film circuits are not positioned are prepared protective layers. During the wet etching the attack by the etchant may be avoided. The material of the insulation layer and the protection layer may be the same. The material of the protection layer may be the photo-resistant used in the wet etching process. The invention also disclosed circuit components prepared with the wet etching of this invention.

Abstract: A method for producing sublithographic etching masks for creating structured features in semiconductor products having a large scale of integration, includes applying lines that are orthogonal to one another in successive steps with the aid of the spacer technique. Through the use of various etching steps, a grid of extremely small etching masks is obtained, which is formed by the intersection points of the lines. The size of the etching masks is determined by the layer thickness of the spacer layer, and not by the feature or structure size of the photographic technique.

Abstract: A method of forming cavities in a non-conducting layer on a semiconductor device is provided which can be carried out by first providing a pre-processed semi-conducting substrate which has a non-conducting layer and a patterned photoresist layer sequentially deposited and formed on top, and then conformally depositing a polymeric material layer on top of the non-conducting and the photoresist layer, and then etching the polymeric material layer to form polymeric sidewall spacers on the patterned photoresist layer, and then etching cavities in the non-conducting layer to expose the semi-conducting substrate. The polymeric sidewall spacers formed on the sidewalls of the photoresist openings allow the fabrication of cavities such as contact holes or line spacings of reduced dimensions while utilizing a conventional low cost photolithographic method for patterning.

Abstract: A semiconductor wafer etching method is disclosed that allows etching without use of restricted ozone-destroying solvents such as trichloroethane or fluorocarbons. This method involves forming a protective film of silicon resin or alkali resistant resin on a semiconductor wafer. Then, a surface region of the wafer not covered by the protective film is etched. Finally, the protective film is peeled from the semiconductor wafer without damaging the wafer or employing solvents harmful to the environment.

Abstract: A process for forming a dual-damascene interconnect employs a spun-on organic layer above an interlayer dielectric having a set of apertures for vias that forms tapered regions about the apertures without penetrating the apertures; the slope of the tapered regions being transferred in the etching process to form self-aligned tapered vias.

Abstract: A method for forming a contact hole of semiconductor device is disclosed and comprises forming a word line and a first internal insulating film on a semiconductor substrate, forming an insulating film spacer at the side wall of the word line and the first internal insulating film, forming a nitride film as a second internal insulating film at a predetermined thickness on the resultant structure, forming a planarization layer on the second internal insulating film, etching the planarization layer in an atmosphere comprising C.sub.4 F.sub.8 gas, Ar gas and a hydrogen-containing gas in the presence of a contact mask, to create a contact hole through which the second internal insulating film is exposed. The hydrogen-containing gas acts to generate C--H type polymers weaker in bond strength but at a larger amount than C--C type polymers, thereby preventing the etching stop phenomenon as well as the underlying layer damage caused by overetch during the etching process of a contact hole.

Abstract: A refractory metal layer on a silicon oxide layer is exposed to gaseous etchant containing SF.sub.6, Cl.sub.2 and CO so as to be patterned; F radical and Cl radical effectively etch the refractory metal, and a reaction product of CO gas does not allow the dry etching to sidewardly proceed so that the dry etching achieves good anisotropy, a large etching rate and a large selectivity to silicon oxide.

Abstract: Sidewalls of patterned resist are reformed using a reforming agent selected from the group consisting of (a) a carbon trichloride radical, (b) a mixture of silicon ion and oxygen ion, (c) a mixture of carbon ion and carbon monoxide ion, (d) a chlorine radical, (e) aluminum trichloride liquid and (f) dibutyl magnesium liquid, and sidewall reformed portions are thus formed on the sidewalls of pattern resist. The not reformed portion of the patterned resist is removed away, and sidewall reformed portions are left on an object layer. The portion of object layer excluding the portion immediately below sidewall reformed portions is etched away, and fine patterns of object layer are formed as a result.

Abstract: This invention involves a fiber probe device and a method of making it. The probe includes a relatively thick upper cylindrical portion, typically in the form of a solid right circular cylinder, terminating in a tapered portion that terminates in a relatively thin lower cylindrical portion, typically also in the form of a solid right circular cylinder, the lower portion having a width (diameter) in the approximate range of as little as approximately 0.05 .mu.m.

Abstract: A metal layer provided for micromechanical components such as sensors or actuators is surrounded with a protective layer of, for example, TiN for protection against the influence of an etchant that is employed for etching out a cavity in a sacrificial layer of, for example, silicon dioxide. The lower part and the upper part of this protective layer are produced as layers. A supplementary protective layer is conformally deposited into the etching holes produced for etching the cavity out and is anisotropically re-etched, so that the metal layer is also laterally covered by the protective layer.

Abstract: Sidewalls of patterned resist are reformed using a reforming agent selected from the group consisting of (a) a carbon trichloride radical, (b) a mixture of silicon ion and oxygen ion, (c) a mixture of carbon ion and carbon monoxide ion, (d) a chlorine radical, (e) aluminum trichloride liquid and (f) dibutyl magnesium liquid, and sidewall reformed portions are thus formed on the sidewalls of pattern resist. The not reformed portion of the patterned resist is removed away, and sidewall reformed portions are left on an object layer. The portion of object layer excluding the portion immediately below sidewall reformed portions is etched away, and fine patterns of object layer are formed as a result.