Abstract: A micro movable device includes a base substrate, a fixed portion bonded to the base substrate, a movable portion having a fixed end connected to the fixed portion and extending along the base substrate, and a piezoelectric drive provided on the movable portion and the fixed portion on a side opposite to the base substrate. The piezoelectric drive has a laminate structure provided by a first electrode film contacting the movable portion and the fixed portion, a second electrode film and a piezoelectric film between the first and the second electrode films. At least one of the movable portion and the fixed portion is provided with a groove extending along the piezoelectric drive.

Abstract: The described embodiments relate to a slotted substrate for use in a fluid ejecting device. One exemplary embodiment includes a substrate having a thickness between generally opposing first and second surfaces. A slot received in the substrate. The slot has a central region joined with at least one terminal region. The central region extends between the first and second surfaces. The at least one terminal region includes, at least in part, a bowl-shaped portion that has a diameter at the first surface greater than a width of the central region at the first surface.

Abstract: Embodiments of the invention include methods of etching nanodots, to methods of removing nanodots from substrates, and to methods of fabricating integrated circuit devices. In one embodiment, a method of etching nanodots that include a late transition metal includes exposing such nanodots to a gas comprising a phosphorus and halogen-containing compound and an oxidizing agent. After the exposing, the nanodots which are remaining and were exposed are etched (either partially or completely) with an aqueous solution comprising HF.

Abstract: An etching process includes providing a dielectric first film on a substrate and a sacrificial second film on the dielectric first film. A conductive structure such as a container capacitor is formed in a recess in the first and second films. The conductive structure is exposed as to its external surface by an etch process that resists destructive collapse of the conductive structure.

Abstract: A method for fabricating a non-electroplated shield using combination patterning and devices formed thereby are disclosed. The method includes depositing a metal layer, such as CZT, removing substantially 75% of the metal layer during a first phase using at least a first removal process and removing a remaining portion of the metal layer during a second phase using at least a second removal process. The first removal process may include depositing a first patterning layer, removing substantially 75% of the metal layer by ion-mill or similar technology and stripping the first patterning layer away. The second removal process may include depositing a second patterning layer and removing the remaining portion of the metal layer using a wet-etch or other etch process and removing the second patterning layer. The deposited metal layer may have a thickness up to several ?m and the edges of the shield exhibit a unique step pattern that is visible in a cross-section view of the shield.

Abstract: A method for fabricating a quartz nanoresonator which can be integrated on a substrate, along with other electronics is disclosed. In this method a quartz substrate is bonded to a base substrate. The quartz substrate is metallized so that a bias voltage is applied to the resonator, thereby causing the quartz substrate to resonate at resonant frequency greater than 100 MHz. The quartz substrate can then be used to drive other electrical elements with a frequency equal to its resonant frequency. The quartz substrate also contains tuning pads to adjust the resonant frequency of the resonator. Additionally, a method for accurately thinning a quartz substrate of the resonator is provided. The method allows the thickness of the quartz substrate to be monitored while the quartz substrate is simultaneously thinned.

Abstract: A flatness of a substrate is determined to achieve a desired flatness of a mask blank by predicting the variation in flatness resulting from a film stress of a thin film formed on the substrate. The flatness is adjusted by measuring the flatness of the substrate as a measured flatness, selecting a load type with reference to the measured flatness, and polishing the substrate under pressure distribution specified by the load type. A principal surface of the substrate has a flatness greater than 0 ?m and not greater than 0.25 ?m. A polishing apparatus includes a rotatable surface table, a polishing pad formed thereon, abrasive supplying means for supplying an abrasive to the polishing pad, substrate holding means, and substrate pressing means for pressing the substrate. The substrate pressing means has a plurality of pressing members for individually and desirably pressing a plurality of divided regions of the substrate surface.

Abstract: A method is disclosed by means of which contact holes (K1), (K2) and (K3), leading to integrated components can be produced with just one structuring mask, whereby contact holes (K1) and (K3) lead to contact regions (25e, 45e) in the substrate (5) and contact holes (K2) lead to contact regions (35c, 50c) located on layer stacks (35, 50). An auxiliary layer is used for the etching of contact holes (K1), (K2), (K3), which covers a part of the contact holes and thus serves as a selection mask. The auxiliary layer can be structured with a low-resolution lithography in comparison with the mask, such that only one single high-resolution lithography is necessary for the formation of all contact holes (K1), (K2), (K3). The method is particularly suitable for the simultaneous production of contact holes for transistors in the cell field and the logic field of a DRAM.

Abstract: The present invention relates to a method for fabricating a semiconductor device using tungsten as a sacrificial hard mask material. The method includes the steps of: forming a layer on an etch target layer; forming a photoresist pattern on the layer; etching the layer by using the photoresist pattern as an etch mask along with use of a plasma containing CHF3 gas to form a sacrificial hard mask; and etching the etch target layer by using at least the sacrificial hard mask as an etch mask, thereby obtaining a predetermined pattern.

Abstract: An apparatus and method for removing photoresist from a substrate, which includes treating the photoresist with a first reactant to cause swelling, cracking or delamination of the photoresist, treating the photoresist with a second reactant to chemically alter the photoresist, and subsequently removing the chemically altered photoresist with a third reactant. In one example, the first reactant is supercritical carbon dioxide (SCCO2), the second reactant is ozone vapor, and the third reactant is deionized water.

Abstract: A method of etching a hafnium containing layer includes disposing a substrate having the hafnium containing layer in a plasma processing system, wherein a mask layer defining a pattern therein overlies the hafnium containing layer. A process gas including a HBr gas is introduced to the plasma processing system, and a plasma is formed from the process gas in the plasma processing system. The hafnium containing layer is exposed to the plasma in order to treat the hafnium containing layer. The hafnium containing layer is then wet etched using a dilute HF wet etch process.

Abstract: Embodiments of apparatus and methods for performing high throughput non-plasma processing are generally described herein. Other embodiments may be described and claimed.

Abstract: The invention concerns a method which consists in first subjecting the polyimide sheet to ionic bombardment, followed by an irradiation in the visible domain and finally a relatively brief chemical etching. Said method enables a thin polyimide sheet comprising pores, of nanometric to micrometric size, having a substantially cylindrical shape and substantially equal diameters to be obtained.

Abstract: A method for etching an insulation film through a patterned mask, includes the steps of etching the insulation film until just before an underlayer is about to be exposed by applying a plasma, and modifying a quality of a remaining film of the insulation film by applying another plasma which is different from the plasma used in the above etching process. The method further includes the process of removing the modified remaining film of the insulation film with a liquid chemical. The process of removing the modified remaining film can be also achieved by a dry etching method not employing a plasma.

Abstract: A method of fabricating a patterned magnetic layer comprises sequential steps of: (a) providing a workpiece comprising a non-magnetic substrate, a layer of magnetic material overlying a surface of the substrate, and a layer of a non-magnetic material overlying the layer of magnetic material; (b) forming a layer of a mask material on the layer of non-magnetic material; (c) forming a topographical pattern comprising a plurality of recesses in the layer of mask material; (d) selectively removing portions of the layer of non-magnetic material proximate lower portions of the recesses, thereby exposing selected portions of the layer of magnetic material; (e) treating the exposed portions of the layer of magnetic material with a liquid for reducing the magnetic properties thereof; and (f) removing the topographically patterned layer of mask material.

Abstract: A method of manufacturing a semiconductor device forms an interlayer insulating film on a nickel silicide layer formed on a substrate, and forms a through hole by performing dry etching using a resist pattern, formed on the interlayer insulating film, as a mask and then removing the resist pattern by ashing. A wafer after an ashing process is cleaned using a cleaning solution comprised of aqueous solution having a content of the fluorine-containing compound of 1.0 to 5.0 mass %, a content of chelating agent of 0.2 to 5.0 mass %, and a content of the organic acid salt of 0.1 to 3.0 mass %.

Abstract: The invention presents a novel polyimide-based thin film self-assembly technology, including five process steps described as follows: (1) deposits a sacrificial layer and a low-stress microstructure layer on a silicon substrate; (2) patterns and etches the low-stress microstructure layer to provide a stationary part and a movable part of the microstructure; (3) coats a photosensitive polyimide thin film as elastic joint of the microstructure layer and defines the shape by using photolithography technique; (4) releases the sacrificial layer beneath the movable part of microstructure layer by wet etching; (5) lastly proceeds the reflow process of polyimide to result in the contraction of the elastic joint further to rotate and lift the movable part in completion of the self-assembly of the microstructure. As the invention can be extensively applied to a myriad of miniaturizing industries, it can solve all the drawbacks of the prior art manufacturing process and miniaturization.

Abstract: A method for preparing TEM sample, comprising the following steps: providing a sample with two pits and a failure region between the two pits, the failure region comprising a semiconductor device; milling the first surface of the failure region, till the cross section of the semiconductor device is exposed; etching the first surface of the failure region; cleaning the sample; milling the second surface of the failure region, till the failure region can be passed by electron beam. A sample can be prepared for a high resolution TEM through above steps. When the sample is observed, it is easy to distinguish the lightly doped drain, source/drain regions from the silicon substrate and observe the pattern and defects in the lightly doped drain, source/drain regions clearly; in addition, it is easy to distinguish the BPSG from the non-doped silicon dioxide in the failure region.

Abstract: A method of manufacturing an electronic device comprises forming a wiring material layer made of aluminum or an aluminum alloy on the surface of an insulating film on a substrate, patterning the wiring material layer by a reactive ion etching treatment with a resist pattern used as a mask so as to form a wiring, and treating the surface of the insulating film including the wiring with an aqueous solution for removing the etching residue, the aqueous solution containing a peroxosulfate, a fluorine-containing compound and an acid for adjusting the pH value and having a pH value of ?1 to 3.

Abstract: A method of recycling dummy wafer is provided. The dummy wafer has at least one low-k dielectric material layer formed thereon. A treatment process is performed to the low-k dielectric material layer on the dummy wafer so that a component or impurity in the low-k dielectric material layer reacts to form a volatile substance. A wet etching process is performed to remove the low-k dielectric material layer.

Abstract: A wafer having a dielectric layer and an electrode partially protruding from the top surface of the dielectric layer is provided. The dielectric layer is etched with a chemical solution such as LAL. Prior to etching, the protruding portion of the electrode is removed or reduced to prevent any bubbles included in the chemical solution from adhering to the electrode. Thus, the chemical solution can etch the dielectric layers without being blocked by any bubbles included in a chemical solution.

Abstract: It is an objective to control the occurrence of the disorder of a far-field pattern and of an optical axial shift. A manufacturing method of a semiconductor laser device has the step for preparing a semiconductor substrate which has growth of a multi-layer including an active layer, the step for forming a mask over the growth of a multi-layer, and a step for forming a stripe-shaped ridge by dry etching and wet etching. A structure stacking a p-type AlGaInP layer, an etch-stop layer, a p-type Alx=0.7GaInP layer, a p-type Alx=0.6GaInP layer, a p-type GaAs layer, in order, over the active layer is taken in order to make the tailing part created in the dry etching process smaller by wet etching. The tailing part is composed of a p-type Alx=0.7GaInP layer including a high mixed crystal ratio of aluminum. Therefore, the p-type Alx=0.7GaInP layer is etched faster than the p-type Alx=0.

Abstract: A semiconductor device fabrication method comprises (1) forming a patterned mask layer on an oxide layer of a Mn-containing perovskite type oxide; (2) heat-treating the oxide layer; and (3) patterning the oxide layer with an etching solution containing at least one of hydrochloric acid, sulfuric acid, and nitric acid after the heat treatment of the oxide layer.

Abstract: An etching process is employed to selectively pattern the top magnetic film layer, the tunnel barrier, and the pinned bottom magnetic layer of a magnetic thin film structure. The pinned bottom magnetic film layer has an antiferromagnetic layer or a Ru spacer formed thereunder. The etching process employs various etching steps that selectively remove various layers of the magnetic thin film structure stopping on the antiferromagnetic layer or the Ru spacer. The progress of this etching process can be monitored by measuring the electrochemical potential difference of a part or wafer containing a magnetic structure with respect to a reference electrode simultaneously with the selective etching process.

Abstract: Photonic crystal structures are made by a method including steps of providing a substrate, depositing at least one planar layer to form a stack, each planar layer of the stack comprising two or more sublayers having different sublayer refractive indices, depositing a hard mask material, depositing an imprintable material over the hard mask material, patterning the imprintable material by imprinting an array of depressions, and directionally etching at the depressions a regular array of openings through the hard mask material and the stack.

Abstract: An etching process is employed to selectively pattern the exposed magnetic film layer of a magnetic thin film structure. The magnetic structure to be etched includes at least one bottom magnetic film layer and at least one top film layer which are separated by a tunnel barrier. The etching process employs various etching steps that selectively remove various layers of the magnetic thin film structure stopping on the tunnel barrier layer.

Abstract: A selective etching method with lateral protection function is provided. The steps includes: (a) providing a substrate; (b) forming a plurality of tunnels; (c) forming a lateral strengthening structure at a peripheral wall of the tunnels; (d) removing a bottom portion of the lateral strengthening structure, and a part of the substrate by an etching process so as to form a lower structure and expose an unstrengthened structure; and (f) etching the unstrengthened structure laterally so as to form an upper structure.

Abstract: The invention relates to a method for forming silicon atomic force microscope tips. The method includes the steps of depositing a masking layer onto a first layer of doped silicon so that some square or rectangular areas of the first layer of doped silicon are not covered by the masking layer, etching pyramidal apertures in the first layer of doped silicon, removing the masking layer, depositing a second layer of doped silicon onto the first layer of doped silicon, the second layer of doped silicon being oppositely doped to the first layer of doped silicon and etching away the first layer of doped silicon. Further steps may be added to form the atomic force microscope tips at the end of cantilevers.

Abstract: A technique for manufacturing a micro-electro mechanical structure includes a number of steps. Initially, a cavity is formed into a first side of a handling wafer, with a sidewall of the cavity forming a first angle greater than about 54.7 degrees with respect to a first side of the handling wafer at an opening of the cavity. Then, a bulk etch is performed on the first side of the handling wafer to modify the sidewall of the cavity to a second angle greater than about 90 degrees, with respect to the first side of the handling wafer at the opening of the cavity. Next, a second side of a second wafer is bonded to the first side of the handling wafer.

Abstract: An improved method is provided for fabricating a polarisation rotator in a rib waveguide having a propagation axis and opposite side walls. The method includes etching a pit in the substrate surface to form a recess in one of the side walls of the waveguide, during formation of the waveguide on the substrate surface, so as to provide an asymmetric waveguide section for imparting polarisation rotation to radiation propagated along the propagation axis. Preferably the pit is formed by a wet etching step forming an upper side surface within the recess that is inclined relative the waveguide side walls, and the waveguide side walls are formed by a dry etching step to extend perpendicularly to the substrate surface. In addition the dry etching step forms a lower side surface adjoining the upper side surface within the recess and tilted relative to the upper side surface.

Abstract: A pattern forming method includes: forming an etching-subject layer on a substrate; forming a Ti layer on the etching-subject layer; forming a TiOx layer by irradiating light on a portion of the Ti layer using a mask; etching the Ti layer to form a TiOx pattern; etching the etching-subject layer using the TiOx pattern as a mask; and removing the TiOx pattern.

Abstract: The present invention provides a method to pattern a substrate which features creating a multi-layered structure by forming, on the substrate, a patterned layer having protrusions and recessions. Formed upon the patterned layer is a conformal layer, with the multi-layered structure having a crown surface facing away from the substrate. Portions of the multi-layered structure are removed to expose regions of the substrate in superimposition with the protrusions, while forming a hard mask in areas of the crown surface in superimposition with the recessions.

Abstract: The present invention relates generally to micromachining. More particularly, the present invention relates to a method for combining directional ion etching and anisotropic wet etching and devices and structures fabricated thereby. The present invention is particularly applicable to silicon micromachining and provides architectures that combine crystallographic surfaces and vertical dry etched surfaces together in the same structure.

Abstract: A method of surface treating heat treated members to remove oxide scale. The heat treated members are subjected to a staged series of discrete chemical and physical cleaning steps yielding a substantially scale-free surface readily adaptable for subsequent application of protective coatings.

Abstract: The invention relates to a method for removing an area of a layer of a component consisting of metal or a metal compound. According to prior art, corrosion products of a component are removed in a first step by applying a molten mass or by heating in a voluminous powder bed. This requires high temperatures or a large amount of space. The inventive method for removing corrosion products of a component is characterized in that a cleaning agent is applied locally, which removes the corrosion products by means of a gaseous reaction product.

Abstract: During fabrication of a write head via holes are first opened in a gap layer, followed by formation of seed layers instead of the other way around. Moreover a first seed layer is formed, and without the first seed layer being used a second seed layer is formed. The second seed layer (which is the topmost layer) is used in plating to form coils (e.g. of copper) for the write head. After coil formation, the first seed layer is used for plating to form vias (e.g. of NiFe). The two seed layers may be formed in a single operation by using two different targets in a vacuum deposition chamber. Moreover, a single insulation layer is sufficient to insulate and protect all plated elements, regardless of whether they are formed by use of the first seed layer or the second seed layer.

Abstract: A tool for embossing high aspect ratio microstructures is provided, wherein the microstructures provide decreased surface reflection and increased transmission through an optical component even at high incident angles. The tool is fabricated by a process that comprises anisotropic etching of columnar pits in a silicon substrate using inductively coupled plasma, followed by isotropic reactive ion etching of the columnar pits to create relatively pointed obelisks. The silicon substrate is then preferably rinsed to remove remaining photoresist prior to vapor depositing a conductive layer thereon. Finally, a metal is electroformed over the conductive layer to form the embossing tool. The embossing tool is then pressed against an optical coating, for example a polymer sheet, to create microstructures having aspect ratios from 1 to 5.

Abstract: A transducer having a ceramic element in which the ceramic is elevated above a polymer and a method of manufacturing the transducer. The transducer comprises a piezo-composite element comprising a ceramic element embedded in epoxy. In an array, the ceramic elements may be in the form of posts. The plurality of ceramic elements is slightly elevated above the polymer and in staggered arrangement with the polymer. The element is manufactured by first grinding the face of the composite and removing damaged ceramic by acid etching the ceramic. The epoxy is removed by plasma etching so that the ceramic is above the epoxy. The composite is sputter plated so that a maximum temperature that could damage the plating is not exceeded. The ceramic is then poled so that a maximum temperature that could damage the plating is not exceeded. Contacts are then attached to the plating adjacent the ceramic.

Abstract: A method of manufacturing an optical crystal element of a laser device includes measuring an initial thickness of a crystal substrate formed of YAG or YVO4; introducing a mixture of a fluorine gas and an Ar gas having a ratio of the fluorine gas to the Ar gas in a range of 1:10 to 1:2 into a process chamber holding the crystal substrate; and generating ion beams of the mixture in the process chamber for etching a surface of the crystal substrate for a period time determined from an etching rate depending on the ratio of the mixture and the initial thickness of the crystal substrate. Thickness of the optical crystal element is controlled to a desired thickness. In the method, it is possible to produce the optical crystal element of a microchip laser having functions as a laser medium, a resonator and an etalon.

Abstract: A process is presented for realizing buried microchannels (10) in an integrated structure (1) comprising a monocrystalline silicon substrate (2). The process forms in the substrate (2) at least one trench (4). A microchannel (10) is obtained starting from a small surface port of the trench (4) by anisotropic etching of the trench. The microchannel (10) is then completely buried in the substrate (2) by growing a microcrystalline structure to enclose the small surface port.

Abstract: A dry etching method in which a plasma of an etching gas is generated and a magnetic material is dry-etched using a mask material made of a non-organic material, wherein an alcohol having at least one hydroxyl group is used as the etching gas. The alcohol used as the etching gas has one hydroxyl group such as an alcohol selected from the group including methanol (CH3OH), ethanol (C2H5OH) and propanol (C3H7OH).

Abstract: A method of easily manufacturing a nano-gap electrode by using a focused ion beam lithography includes a layer depositing step of depositing an electrode layer and a metal mask layer in this order on an insulating substrate, a mask pattern forming step of etching the metal mask layer by using the focused ion beam and thereby forming a mask pattern, a dry etching step of transferring a pattern to the electrode layer by dry etching, and a wet etching step of removing the metal mask layer by using a solution that selectively dissolves the metal mask layer compared to the electrode layer.

Abstract: A process for producing multiple undercut profiles in a single material. A resist pattern is applied over a work piece and a wet etch is performed to produce an undercut in the material. This first wet etch is followed by a polymerizing dry etch that produces a polymer film in the undercut created by the first wet etch. The polymer film prevents further etching of the undercut portion during a second wet etch. Thus, an undercut profile can be obtained having a larger undercut in an underlying portion of the work piece, utilizing only a single resist application step. The work piece may be a multi-layer work piece having different layers formed of the same material, or it may be a single layer of material.

Abstract: A method of manufacturing an electronic device comprises forming a wiring material layer made of aluminum or an aluminum alloy on the surface of an insulating film on a substrate, patterning the wiring material layer by a reactive ion etching treatment with a resist pattern used as a mask so as to form a wiring, and treating the surface of the insulating film including the wiring with an aqueous solution for removing the etching residue, the aqueous solution containing a peroxosulfate, a fluorine-containing compound and an acid for adjusting the pH value and having a pH value of ?1 to 3.

Abstract: Disclosed are a cantilever-type near-field probe capable of easily improving an optical throughput and being applied to a head of an optical data storage and a method of manufacturing the same. An oxide film is formed on a silicon substrate having dielectric films formed as a mask layer on upper and lower portions thereof, and a circular dielectric film formed on the upper mask layer and providing a function of a holder. A distal end of the probe has a parabolic structure by use of an effect of a bird's peak provided due to a difference of growth rate of the oxide film produced by the dielectric film, thereby forming the initial probe. After the dielectric film is removed from the initial probe, a bottom surface of the silicon substrate is removed, thereby providing the probe with the near-field aperture having a high throughput.

Abstract: A wireless suspension blank is made using a two-layer laminate composed of a metallic layer with the spring property and an electrically insulating layer. The first method includes a first step for working the metallic layer by the photo etching method, a second step for forming a wiring part on the insulating layer by the semi-additive method and a third step for working the insulating layer by the wet-etching method. The second method includes a first step for working the metallic layer by the photo etching method, a second step for forming a wiring part on the insulating layer by the semi-additive method and a third step for working the insulating layer by the plasma etching method. The third method includes a first step for forming a wiring part on the metallic layer by the semi-additive method, a second step for working the metallic layer by the wet-etching method and a third step for working the insulating layer by the dry-etching method or the wet-etching method.

Abstract: Three fundamental and three derived aspects of the present invention are disclosed. The three fundamental aspects each disclose a process sequence that may be integrated in a full process. The first aspect, designated as “latent masking”, defines a mask in a persistent material like silicon oxide that is held abeyant after definition while intervening processing operations are performed. The latent oxide pattern is then used to mask an etch. The second aspect, designated as “simultaneous multi-level etching (SMILE)”, provides a process sequence wherein a first pattern may be given an advanced start relative to a second pattern in etching into an underlying material, such that the first pattern may be etched deeper, shallower, or to the same depth as the second pattern. The third aspect, designated as “delayed LOCOS”, provides a means of defining a contact hole pattern at one stage of a process, then using the defined pattern at a later stage to open the contact holes.

Abstract: A monolithic thermal ink jet printhead (40) comprising a groove (45), a plurality of chambers (74) and nozzles (56) is manufactured by means of steps of: (203, 205) partially etching the groove (45) by means of a “dry” process and a “wet” process; (210) depositing a plurality of sacrificial layers (54); (212) obtaining a plurality of casts (156); (216) completing the etching of the groove (45) by means of an electrochemical process; and (220) removing the casts (156) and the sacrificial layers (54) in such a way as to obtain a plurality of nozzles (56) and chambers (74).

Abstract: An easier method is provided to manufacture a light emitting device that can display a full-color image using a polymeric organic compound. In the present invention, some of polymeric organic compounds are dissolved in a protic solvent while the others are dissolved in an aprotic solvent and the obtained solutions are applied to form organic compound films having laminate structures. A conductive film to serve as an etching stopper is formed on the organic compound films, so that portions of the organic compound films that do not overlap the conductive film are etched away. By using wet etching and dry etching in combination, different organic compound films each composed of a plurality of polymeric organic compounds can be formed in different light emitting elements on the same substrate.

Abstract: A method for treating a film of material, which can be defined on a substrate, e.g., silicon. The method includes providing a substrate comprising a cleaved surface, which had a porous silicon layer thereon. The substrate may have a distribution of hydrogen bearing particles defined from the cleaved surface to a region underlying said cleaved surface. The method also includes increasing a temperature of the cleaved surface to greater than about 1,000 Degrees Celsius while maintaining the cleaved surface in a etchant bearing environment to reduce a surface roughness value by about fifty percent and greater. Preferably, the value can be reduced by about eighty or ninety percent and greater, depending upon the embodiment.