Abstract: A process for etching a substrate and removing etch residue deposited on the surfaces in the etching chamber has two stages. In the first stage, an energized first process gas is provided in the chamber, and in the second stage, an energized second process gas is provided in the chamber. The energized first process gas comprises SF6 and Ar, the volumetric flow ratio of SF6 to other components of the first process gas being from about 5:1 to about 1:10. The energized second process gas comprises CF4 and Ar, the volumetric flow ratio of CF4 to other components of the second process gas being from about 1:0 to about 1:10.

Abstract: A method of cleaning a CVD vacuum vessel which has an electrically conductive partition plate which divides an interior of the vacuum vessel into a plasma generating space and a film-deposition processing space, and in the electrically conductive partition plate there is a plurality of through-holes connecting the plasma generating space to the film-deposition processing space, the method includes the steps of feeding a cleaning gas into the plasma-generating space; generating active seeds by applying high-frequency electric power to electrodes arranged in the plasma-generating space; feeding the generated active species into the film-deposition processing space through the plurality of through-holes in the electrically conductive partition plate; and cleaning the film-deposition processing space by the active seeds which have been fed into this film-deposition processing space.

Abstract: A plasma processing method that makes it possible to remove a photoresist film and fence portion while maintaining a specific shape of the opening is provided. After a wafer W is placed on a lower electrode 106 provided inside a processing chamber 102 of an ashing apparatus 100, power with its frequency set at 60 MHz and its level set at 1 kW and power with its frequency set at 2 MHz and its level set at 250 W are respectively applied to an upper electrode 122 and the lower electrode 106. A processing gas induced into the processing chamber 102 is raised to plasma, a photoresist film 208 at the wafer W is ashed and, at the same time, fence portion 214 formed around the opening of a via hole 210 during the etching process is removed. The level of the power applied to the lower electrode 106 is set equal to or lower than 10 W before the photoresist film 208 is completely removed.

Abstract: A method for removing from a microelectronic device structure a noble metal residue including at least one metal selected from the group consisting of platinum, palladium, iridium and rhodium, by contacting the microelectronic device structure with a cleaning gas including a reactive halide composition, e.g., XeF2, SF6, SiF4, Si2F6 or SiF3 and SiF2 radicals. The method may be carried out in a batch-cleaning mode, in which fresh charges of cleaning gas are successively introduced to a chamber containing the residue-bearing microelectronic device structure. Each charge is purged from the chamber after reaction with the residue, and the charging/purging is continued until the residue has been at least partially removed to a desired extent. Alternatively, the cleaning gas may be continuously flowed through the chamber containing the microelectronic device structure, until the noble metal residue has been sufficiently removed.

Abstract: A method is provided for surface treating where the environmental load is small. The surface treating method includes a cluster produced in a gas phase and bonded by a first molecule and a second molecule by means of an intermolecular force. At least a part of the internal energy released in producing the cluster is utilized whereby the first molecule contained in the cluster has a higher reactivity than that of the first molecule that is not bonded to the second molecule. The surface of the member to be treated is treated in a gas phase with the cluster containing the first molecule having a higher reactivity.

Abstract: Compositions comprising a polymer having silicon, germanium and/or tin; and a protecting group grafted onto a polymeric backbone are useful as resists and are sensitive to imaging irradiation while exhibiting enhanced resistance to reactive ion etching.

Abstract: A dry-etching method comprises the step of dry-etching a metal thin film as a chromium-containing half-tone phase-shift film, wherein the method is characterized by using, as an etching gas, a mixed gas including (a) a reactive ion etching gas, which contains an oxygen-containing gas and a halogen-containing gas, and (b) a reducing gas added to the gas component (a), in the process for dry-etching the metal thin film. The dry-etching method permits the production of a half-tone phase-shift photomask by forming patterns to be transferred to a wafer on a photomask blank for a chromium-containing half-tone phase-shift mask. The photomask can in turn be used for manufacturing semiconductor circuits. The method permits the decrease of the dimensional difference due to the coexistence of coarse and dense patterns in a plane and the production of a high precision pattern-etched product.

Abstract: Method and apparatus for etching a metal layer disposed on a substrate, such as a photolithographic reticle, are provided. In one aspect, a method is provided for processing a substrate including positioning a substrate having a metal photomask layer disposed on a silicon-based material in a processing chamber, introducing a processing gas at a flow rate of greater than about 350 sccm with the processing gas comprising an oxygen containing gas, a halogen containing gas, and optionally, an inert gas, into the processing chamber, generating a plasma of the processing gas in the processing chamber, generating a bias of about 50 watts or less, and etching exposed portions of the metal layer disposed on the substrate.

Abstract: A method of depositing and etching dielectric layers having low dielectric constants and etch rates that vary by at least 3:1 for formation of horizontal interconnects. The amount of carbon or hydrogen in the dielectric layer is varied by changes in deposition conditions to provide low k dielectric layers that can replace etch stop layers or conventional dielectric layers in damascene applications. A dual damascene structure having two or more dielectric layers with dielectric constants lower than about 4 can be deposited in a single reactor and then etched to form vertical and horizontal interconnects by varying the concentration of a carbon:oxygen gas such as carbon monoxide. The etch gases for forming vertical interconnects preferably comprises CO and a fluorocarbon, and CO is preferably excluded from etch gases for forming horizontal interconnects.

Abstract: In the present method for manufacturing a magnetic write head a focused ion beam (FIB) tool is utilized to mill the side edges of a P2 pole, in order to provide a narrowed track width. Prior to milling, a thin film layer of material is deposited upon the P2 pole tip. The milling boxes of the FIB tool are properly aligned upon the layer with reference to the location of the P2 pole tip. Milling of the lateral edges of the P2 pole tip is then conducted to the appropriate depth, and the layer of material is removed. The resulting P2 pole tip has sharp lateral edges, rather than the rounded edges that are produced in prior art FIB processing methods that do not utilize the thin film layer. In a preferred implementation, the FIB tool is utilized first to deposit the thin film layer and thereafter to perform the milling operation.

Abstract: A method comprising etching a material under plasma etching conditions using an etching composition which has a GWP of no greater than about 3000 and which comprises at least one etchant compound having a formula selected from the group consisting of F—CO—[(CR1R2)m—CO]n—F and F—CO—R3—CO—F, and wherein: m=0, 1, 2, 3, 4, or 5; n=1; R1 & R2 represent H, F or CxHyFz; wherein: x=1 or 2; and y+z=2x+1; R3 represents CR4═CR5, R6R7C═C or C≡C; wherein: R4-7 represent H, F, or CxHyFz; wherein: x=1 or 2; and y+z=2x+1; and also including the cleaning of a surface by use of an etchant compound, and further including an etching composition which includes said etchant compound and also an etchant-modifier.

Abstract: The present invention relates generally to the field of semiconductor device manufacturing, and more specifically to a method for cleaning and preconditioning a dome in a chemical vapor deposition system. During cleaning, the direction of flow of cooling water through an induction coil in the dome is reversed. During preconditioning, the direction of cooling water flow is preferably reversed again, such that it is the same direction as during deposition. The preconditioning portion of the method comprises introducing a hydrogen gas into the CVD chamber, and then introducing a mixture of hydrogen gas and nitrogen gas into the chamber.

Abstract: A method for SAC etching is provided involving a) etching a Si wafer having a nitride present thereon with a first etching gas containing a first perfluorocarbon and carbon monoxide, and b) etching the resultant Si wafer having an initially etched nitride photoresist thereon with a second etching gas containing a second perfluorocarbon in the substantial absence of carbon monoxide, wherein the etching steps a) and b) are performed at high RF power and low pressure compared to conventional processes to provide higher selectivity etching and a larger process window for SAC etching, as well as the ability to perform SAC etching and island contact etching under the same conditions with high verticality of the island contact and SAC walls.

Abstract: Etch residue, resulting from a process used in forming a via, is removed using a process that does not require using a liquid chemical solvent and does not result in excessive charge build-up in the via. One step is to use a fluorocarbon and oxygen. These gases are energized by both microwave and RF. Another step is to introduce argon, in addition to the other two gases, also energized by microwave and RF. This has the effect of removing any additional residue which tends to stick on the surface above the via as well completing the removal of etch residue in the via. An additional step is simply to apply de-ionized water to remove any remaining fluorinated residue that, as a result of the preceding two steps, is highly soluable in water.

Abstract: A method for forming a trench for a shallow trench isolation structure wherein the trench has rounded bottom corners. In one embodiment, the present invention performs a breakthrough etch to remove a native oxide layer disposed over a region of a semiconductor substrate. In so doing, a region of the semiconductor substrate is exposed. Next, the present embodiment etches a trench into the semiconductor substrate using a first etching environment. In this embodiment, the first etching environment is comprised of chlorine, hydrogen bromide, helium, and oxygen. The present embodiment then rounds the bottom corners of the trench using a second etching environment. In this embodiment, the second etching environment is comprised sulfur hexafluoride (SF6) and chlorine. In so doing, the present embodiment provides a method for forming a trench for a shallow trench isolation structure wherein the trench does not have sharp bottom corners formed therein.

Abstract: A method of forming three-dimensional structures on a substrate by a single reactive ion each run whereby a mask is formed on said substrate before a series of iterations are carried out, each iteration including a mask etch and a substrate etch, so that successive iterations give life to reduction in the mask area and exposure of further areas of substrate.

Abstract: In a plasma generating apparatus including a reaction chamber for providing a reaction space cut off from the outside; a plasma electrode installed at the outer upper portion of the reaction chamber, receiving high frequency power from the outside and generating plasma inside the reaction chamber; a grid horizontally installed to the reaction space, dividing the reaction space into an upper plasma generating space and a lower processing space and having plural through holes connecting the upper and lower spaces; an upper gas injector for providing gas to the plasma generating space; a lower gas injector for providing gas to the processing space; and a substrate supporting board installed to the processing space to be horizontally mounted with a substrate, by installing the grid in the reaction space, injecting inert gas through the upper gas injector and injecting process gas such as CxFy, etc. through the lower gas injector, a selective etching ratio of SiO2 can be improved.

Abstract: A dry cleaning method for use in semiconductor fabrication, including the following steps. An etched metallization structure is provided and placed in a processing chamber. The etched metallization structure is cleaned by introducing a fluorine containing gas/oxygen containing gas mixture into the processing chamber proximate the etched metallization structure without the use of a downstream microwave while applying a magnetic field proximate the etched metallization structure and maintaining a pressure of less than about 50 millitorr within the processing chamber for a predetermined time.

Abstract: A method to anisotropically etch an oxide/silicide/poly sandwich structure on a silicon wafer substrate in situ, that is, using a single parallel plate plasma reactor chamber and a single inert cathode, with a variable gap between cathode and anode. This method has an oxide etch step and a silicide/poly etch step. The fully etched sandwich structure has a vertical profile at or near 90° from horizontal, with no bowing or notching.

Abstract: A method for performing a cleaning process uses a cleaning gas and high-frequency power upon a film deposition apparatus for depositing a film on a substrate placed in a reactor chamber which can be evacuated to a low pressure. Supplying of high-frequency power is temporarily stopped in the middle of the cleaning process, and the cleaning process is restarted by again supplying high-frequency power. This method is capable of effectively removing by-products from the inside of a reactor chamber and makes it possible to form a high-quality deposition film, in particular, a high-quality electrophotographic photosensitive drum.

Abstract: A method of fabricating integrated circuit wafers, in accordance with this invention comprises the following steps. Provide an integrated circuit wafer having devices formed therein covered with a metal layer and a photoresist layer over the metal layer which is selectively exposed and developed forming a photoresist mask. Introduce the wafer into a multi-chamber system, patterning the metal layer by etching and then exposing the mask to light in a cooled chamber wherein the light is derived from a source selected from a mercury lamp and a laser filtered to remove red and infrared light therefrom before exposure of the wafer thereto. The chamber is cooled by a refrigerant selected from water and liquefied gas. Then remove the wafer, and load it into a photoresist stripping tank to remove the photoresist mask with a wet photoresist stripper. Place the wafer in a batch type plasma chamber after removing the photoresist mask.

Abstract: A method of depositing and etching dielectric layers having low dielectric constants and etch rates that vary by at least 3:1 for formation of horizontal interconnects. The amount of carbon or hydrogen in the dielectric layer is varied by changes in deposition conditions to provide low k dielectric layers that can replace etch stop layers or conventional dielectric layers in damascene applications. A dual damascene structure having two or more dielectric layers with dielectric constants lower than about 4 can be deposited in a single reactor and then etched to form vertical and horizontal interconnects by varying the concentration of a carbon:oxygen gas such as carbon monoxide. The etch gases for forming vertical interconnects preferably comprises CO and a fluorocarbon, and CO is preferably excluded from etch gases for forming horizontal interconnects.

Abstract: A method of depositing and etching dielectric layers having low dielectric constants and etch rates that vary by at least 3:1 for formation of horizontal interconnects. The amount of carbon or hydrogen in the dielectric layer is varied by changes in deposition conditions to provide low k dielectric layers that can replace etch stop layers or conventional dielectric layers in damascene applications. A dual damascene structure having two or more dielectric layers with dielectric constants lower than about 4 can be deposited in a single reactor and then etched to form vertical and horizontal interconnects by varying the concentration of a carbon:oxygen gas such as carbon monoxide. The etch gases for forming vertical interconnects preferably comprises CO and a fluorocarbon, and CO is preferably excluded from etch gases for forming horizontal interconnects.

Abstract: In accordance with the present invention, during a polysilicon etch back, a controlled amount of oxygen (O2) is added to the plasma generation feed gases, to reduce pitting of the etched back polysilicon surface. The plasma etchant is generated from a plasma source gas comprising: (i) at least one fluorine-containing gas, and (ii) oxygen. The invention may be practiced in any of a number of apparatus adapted to expose polysilicon to a plasma etchant. One preferred apparatus is a decoupled plasma source (DPS™, Applied Materials, Santa Clara, Calif.) etching system. Another preferred apparatus is a magnetically enhanced plasma (MXP™, Applied Materials, Santa Clara, Calif.) etching system.

Abstract: A dry-etching method comprises the step of dry-etching a metal thin film as a chromium-containing film, wherein the method is characterized by using, as an etching gas, a mixed gas including (a) a reactive ion etching gas, which contains an oxygen-containing gas and a halogen-containing gas, and (b) a reducing gas added to the gas component (a), in the process for dry-etching the metal thin film. The dry-etching method permits the production of a photomask by forming patterns to be transferred to a wafer on a photomask blank. The photomask can in turn be used for manufacturing semiconductor circuits. The method permits the decrease of the dimensional difference due to the coexistence of coarse and dense patterns in a plane and the production of a high precision pattern-etched product.

Abstract: The method of present invention etches a layer of polysilicon formed on a substrate disposed within a substrate processing chamber. The method flows an etchant gas including sulfur hexafluoride, an oxygen source and a nitrogen source into the processing chamber and ignites a plasma from the etchant gas to etch the polysilicon formed over the substrate. In a preferred embodiment, the etchant gas consists essentially of SF6, molecular oxygen (O2) and molecular nitrogen (N2). In a more preferred embodiment the etchant gas includes a volume ratio of molecular oxygen to the sulfur hexafluoride of between 0.5:1 and 1:1 inclusive and a volume ratio of the sulfur hexafluoride to molecular nitrogen of between 1:1 and 4:1 inclusive. In an even more preferred embodiment, the volume ratio of O2 to sulfur hexafluoride is between 0.5:1 and 1:1 inclusive and the volume ratio of sulfur hexafluoride to N2 is between 1.5:1 and 2:1 inclusive.

Abstract: In a plasma processing method, a plasma is generated using a process gas, and an electron beam is injected into the plasma to control an electron energy distribution in the plasma. Then, a semiconductor substrate is processed using the plasma with controlled electron energy distribution.

Abstract: A method for removing from a microelectronic device structure a noble metal residue including at least one metal selected from the group consisting of platinum, palladium, iridium and rhodium, by contacting the microelectronic device structure with a cleaning gas including a reactive halide composition, e.g., XeF2, SF6, SiF4, Si2F6 or SiF3 and SiF2 radicals. The method may be carried out in a batch-cleaning mode, in which fresh charges of cleaning gas are successively introduced to a chamber containing the residue-bearing microelectronic device structure. Each charge is purged from the chamber after reaction with the residue, and the charging/purging is continued until the residue has been at least partially removed to a desired extent. Alternatively, the cleaning gas may be continuously flowed through the chamber containing the microelectronic device structure, until the noble metal residue has been sufficiently removed.

Abstract: For use with a sub-micron semiconductor process, a trench isolation process improves the etch profile of trenches among dense and isolated lines. In an example embodiment, a process forms a dielectric stack of silicon dioxide, silicon nitride and silicon oxynitride on a silicon substrate. Photolithography and etch define trench regions in the silicon substrate through the dielectric stack. Silicon oxynitride acts as a hard mask reducing differences in the sidewall slope among dense areas of the semiconductor device and the sparse areas of the semiconductor device.

Abstract: The slider according to the invention can prevent the phenomenon of sticking and reduce entrapping of foreign particles between the sliding surfaces. The method for making micro-protrusions or micro-cavities on a surface of a substrate comprises the steps of: placing the substrate in a process chamber; supporting a mask member, having a micro shielding surface, independent of and in front of the substrate; and irradiating fast atomic beams onto the surface of the substrate through the mask member.

Abstract: A method of depositing and etching dielectric layers having low dielectric constants and etch rates that vary by at least 3:1 for formation of horizontal interconnects. The amount of carbon or hydrogen in the dielectric layer is varied by changes in deposition conditions to provide low k dielectric layers that can replace etch stop layers or conventional dielectric layers in damascene applications. A dual damascene structure having two or more dielectric layers with dielectric constants lower than about 4 can be deposited in a single reactor and then etched to form vertical and horizontal interconnects by varying the concentration of a carbon:oxygen gas such as carbon monoxide. The etch gases for forming vertical interconnects preferably comprises CO and a fluorocarbon, and CO is preferably excluded from etch gases for forming horizontal interconnects.

Abstract: Methods and apparatus for etching substrates such as silicon wafers are provided. In one specific approach, a surface of the substrate assembly is covered with a resist that is patterned to define features to be etched. In this approach, the surface is then exposed to a plasma in a plasma etcher so that surface areas not covered with the resist are etched, while the thickness of the resist increases or etches at a rate that is at least ten times slower than that of the exposed areas of the surface. This etching process can be followed with a conventional plasma etch. By combining the etching that increases the resist thickness with the conventional etching of resist in which the resist thins during etching, features having high aspect ratios can be etched.

Abstract: A method for structuring at least one layer to be structured. Initially, a mask is applied to the layer and the layer is structured using the mask. After the structuring step, the mask is then removed, while leaving behind redepositions of the material of the layer. The redepositions of the material of the layer are then removed by sound action.

Abstract: A plasma etching process for etching a carbon-based low-k dielectric layer in a multi-layer inter-level dielectric. The low-k dielectric may be divinyl siloxane-benzocyclobutene (BCB), which contains about 4% silicon, the remainder being carbon, hydrogen, and a little oxygen. The BCB etch uses an etching gas of oxygen, a fluorocarbon, and nitrogen and no argon. An N2/O2 ratio of between 1:1 and 3:1 produces vertical walls in the BCB. In a dual-damascene structure, the inter-level dielectric includes two BCB layers, each underlaid by a respective stop layer. Photolithography with an organic photoresist needs a hard mask of silicon oxide or nitride over the upper BCB layer. After the BCB etch has cleared all the photoresist, the bias power applied to the cathode supporting the wafer needs to be set to a low value while the separately controlled plasma source power is set reasonably high, thereby reducing faceting of the exposed hard mask.

Abstract: Dry etching of a metal oxide film exposed without being coated with a photoresist is carried out with plasma of a gas obtained by mixing hydrogen iodide with at least one gas selected from the group consisting of a group consisting of fluorine gas and fluorine-based compound gases and a group consisting of nitrogen gas and nitrogen-based compound gases, and then after the exposing of the above mentioned photoresist film to plasma of oxygen gas, the remaining photoresist film is removed by etching with plasma of a gas obtained by mixing oxygen gas with at least one gas selected from the group consisting of a group consisting of fluorine gas and fluorine-based compound gases and a group consisting of nitrogen gas and nitrogen-based compound gases.

Abstract: A resin etching solution containing a hydroxyalkylamine, an alkali metal compound and water, or an aliphatic alcohol, an aliphatic amine, an alkali metal compound and water, and a process for etching a polyimide film containing a resist pattern or metal layer pattern formed on either or both sides using the resin etching solution.

Abstract: The invention relates to a process for thermal etching under oxidizing conditions of a ceramic, more particularly with the aim of revealing its grain boundaries and for the study of its granular microstructure. The invention applies to technical and nuclear ceramics and in particular UO2 and to (U, Pu) O2 mixtures. The thermal etching is performed in a furnace or kiln under a controlled atmosphere constituted by an oxidizing gas supplying a chemical oxygen potential of −75 to −125 kJ/mole and comprises the following successive stages: rapid rise in the temperature of the furnace to a rate of 900 to 1500° C./h from the initial temperature to a temperature plateau, maintaining the temperature at said plateau at a value of 1250 to 1450° C. for between 30 and 15 minutes, lowering the temperature to the final temperature.

Abstract: A method of forming an iridium-based electrode structure on a substrate, from an iridium-containing precursor thereof which is decomposed to deposit iridium on the substrate. The iridium-based material is formed on the substrate in a desired environment, e.g., an oxidizing ambient environment which may for example contain an oxidizing gas such as oxygen, ozone, air, or nitrogen oxide, or alternatively a reducing environment containing a reducing agent such as H.sub.2, CO or NH.sub.3. The iridium deposited on the substrate is contacted with an etching reagent such as halogen-based etch species (e.g., Cl.sub.2, Br.sub.2, F.sub.2, CCl.sub.4, Si.sub.2 F.sub.6, SiCl.sub.4, NF.sub.3, C.sub.2 F.sub.6, SF.sub.6, or CF.sub.4) formed by exposing halogen to light, laser radiation, plasma, or ion beam, or alternatively with XeF.sub.2, for sufficient time and under sufficient conditions to etch the deposited iridium-based material and form the etched iridium-based electrode structure.

Abstract: A method of removing a carbon-contaminated layer from a silicon substrate surface before a silicon epitaxial growth on the silicon substrate surface. A carbon-contaminated layer on the silicon substrate is exposed to a chlorine radical to cause a chemical reaction of the chlorine radical with carbon atoms of the carbon-contaminated layer to generate chlorine carbide to form chlorine carbide for removal of the carbon-contaminated layer from the silicon substrate surface, wherein the chlorine radical has been generated by passing a chlorine gas through a heating filament so that the chlorine radical is generated at a much higher generation efficiency than when the chlorine radical were generated by using a deep ultraviolet ray.

Abstract: A new method of etching metal lines using SF.sub.6 gas during the overetch step to prevent undercutting of the anti-reflective coating layer is described. Semiconductor device structures are provided in and on a semiconductor substrate. The semiconductor device structures are covered with an insulating layer. A barrier metal layer is deposited overlying the insulating layer. A metal layer is deposited overlying the barrier metal layer. A silicon oxide layer is deposited overlying the metal layer. The silicon oxide layer is covered with a layer of photoresist which is exposed, developed, and patterned to form the desired photoresist mask. The silicon oxide layer is etched away where it is not covered by the photoresist mask leaving a patterned hard mask. The metal layer is etched away where it is not covered by the patterned hard mask to form metal lines. Overetching is performed to remove the barrier layer where it is not covered by the hard mask wherein SF.sub.

Abstract: A method in a plasma processing chamber for etching through a selected portion of a metallization layer of a wafer's layer stack. The method includes the step of etching at least partially through the metallization layer of the layer stack with an etchant source gas that consists essentially of chlorine and nitrogen. In another embodiment, the metallization layer comprises aluminum, and the flow ratio of the chlorine to the nitrogen ranges from about 1:1 to about 10:1. More preferably, the flow ratio of the chlorine to the nitrogen ranges from about 1:1 to about 4:1 and preferably ranges from about 1:1 to about 2:1.

Abstract: A method for stripping photoresist used as an etch mask in carbon based reactive ion etching includes flood exposing a patterned photoresist with a light and cyclically exposing the photoresist with an oxygen plasma in between the carbon based plasma. The step of cyclically exposing occurs after the step of flood exposing. The step of flood exposing includes the step of decomposing photosensitive compounds in the photoresist, while the step of cyclically exposing includes the step of cyclically removing layers of the photoresist.

Abstract: A method of manufacturing a semiconductor device, including the steps of: cooling a semiconductor wafer to a predetermined temperature, the semiconductor wafer being mounted on a stage provided with cooling means and having a thin oxide film on a surface thereof; supplying energy to gas containing hydrogen and water vapor to excite the gas into a plasma state; adding nitrogen fluoride downstream into a flow of the gas in the plasma state; and introducing a flow of the gas, including the nitrogen fluoride, to the semiconductor wafer to etch the thin oxide film while maintaining the semiconductor wafer at the predetermined temperature.

Abstract: An etching method includes the steps of supplying, to the gap between two powered electrodes, a gas capable of discharge which may be produced by adding water to helium and mixing a substance of chlorine, bromine or iodine or a compound containing chlorine, bromine or iodine; applying a RF voltage to the electrodes to produce gaseous discharge between the electrodes and the grounded stage having a material to be processed, thereon i.e., a glass substrate, at a pressure close to or at atmospheric pressure; and exposing the surface of the glass substrate to active species of the gas capable of discharge, which are produced by the discharge, to thus etch an ITO film on the surface of the substrate. The method is capable of removing a metal or a metallic compound containing a metal such as Au, Al, In, Sn or the like, which cannot be easily removed by conventional etching under atmospheric pressure, by producing a compound having a low boiling point or sublimation point and vaporizing it.

Abstract: A process involving vapor etching of nuclear tracks in dielectric materials for creating high aspect ratio (i.e., length much greater than diameter), isolated cylindrical holes in dielectric materials that have been exposed to high-energy atomic particles. The process includes cleaning the surface of the tracked material and exposing the cleaned surface to a vapor of a suitable etchant. Independent control of the temperatures of the vapor and the tracked materials provide the means to vary separately the etch rates for the latent track region and the non-tracked material. As a rule, the tracked regions etch at a greater rate than the non-tracked regions. In addition, the vapor-etched holes can be enlarged and smoothed by subsequent dipping in a liquid etchant.

Abstract: A method for cleaning a plasma etch chamber is described which can be carried out by first terminating an etch process by stopping a process gas flow into the chamber, then maintaining a RF power in the etch chamber, and flowing a cleaning gas consists of at least one inert gas and oxygen through the chamber at a flow rate higher than the flow rate for the process gas for a length of time sufficient to evacuate substantially all the contaminating byproducts formed by the process gas. A suitable cleaning gas contains at least one inert gas of Ar, He, or N.sub.2 mixed with O.sub.2. A sufficient length of time for the cleaning process is at least 5 seconds, and preferably at least 10 seconds.

Abstract: An etching method for performing dry-etching on a III-V group compound semiconductor or a II-VI group compound semiconductor in a dry-etching apparatus comprising a plasma source for creating a plasma of density of about 10.sup.10 cm.sup.-3 or greater, using a mixed gas containing a gas including a halogen element and a gas including nitrogon. The etching conditions are as follows: (a flow rate of the gas containing said halogen gas)/(a flow rate of said nitrogen gas) .gtoreq.1; and an internal pressure during etching reaction is about 1 mTorr or greater.

Abstract: A method for producing stable atmospheric pressure glow discharge plasmas using RF excitation and the use of said plasmas for modifying the surface layer of materials. The plasma generated by this process and its surface modification capability depend on the type of gases used and their chemical reactivity. These plasmas can be used for a variety of applications, including etching of organic material from the surface layer of inorganic substrates, as an environmentally benign alternative to industrial cleaning operations which currently employ solvents and degreasers, as a method of stripping paint from surfaces, for the surface modification of composites prior to adhesive bonding operations, for use as a localized etcher of electronic boards and assemblies and in microelectronic fabrication, and for the sterilization of tools used in medical applications.

Abstract: A refractory metal layer on a silicon oxide layer is exposed to gaseous etchant containing SF.sub.6, Cl.sub.2 and CO so as to be patterned; F radical and Cl radical effectively etch the refractory metal, and a reaction product of CO gas does not allow the dry etching to sidewardly proceed so that the dry etching achieves good anisotropy, a large etching rate and a large selectivity to silicon oxide.

Abstract: A process for etching shallow trenches in single crystal silicon is described. The process etchant comprises HBr/Cl.sub.2 /O.sub.2 /He. The process can be used with various mask 24 schemes including, for example, photoresists, oxide hardmasks and nitride hardmasks. The process forms shallow trenches 32 typically having a width of from about 0.25 microns to about 1 micron, and a depth of from about 0.3 microns to about 1 micron. The shallow trenches 32 have rounded bottom corners 38, smooth and continuous sidewalls 34 and substantially flat and clean bottoms 36. For a given trench width, the profile angle is substantially uniform across the single crystal silicon. The trench depth is substantially uniform across the silicon also. In addition, the profile angle is substantially independent of the trench depth. The process can comprise one or two etch steps for etching the single crystal silicon. The two-step etch process forms shallow trenches having varying profile angles with respect to the trench depth.