Abstract: A method of fabricating a high-sensitivity image sensor is disclosed. The disclosed method comprises: etching a predetermined region of active silicon and a buried oxide layer by using a mask over an SOI substrate to expose an N-type silicon substrate; implanting P-type ions into the exposed N-type silicon substrate to form a P-type region; forming crossed active silicon by patterning the rest of the active silicon not etched while the active silicon is etched to expose the N-type silicon substrate; implanting P-type ions into first two predetermined regions facing each other of the crossed active silicon to form P-type regions; implanting N-type ions into second two predetermined regions facing each other except for the P-type regions of the crossed active silicon to form N-type regions; forming a gate oxide layer and a gate electrode on the crossed active silicon; and forming a connection part to connect the P-type region of the crossed active silicon to the P-type region of the silicon substrate.

Abstract: The invention provides an imager having a p-n-p photodiode with an ultrashallow junction depth. A p+ junction layer of the photodiode is doped with indium to decrease transient enhanced diffusion effects, minimize fixed pattern noise and fill factor loss.

Abstract: A solid state image pickup device, having: a semiconductor substrate; a plurality of pixels formed on the semiconductor substrate, each pixel having a plurality of photoelectric conversion elements inclusive of a first photoelectric conversion element and a second photoelectric conversion element electrically separated; and a light shielding film formed over the semiconductor substrate, the light shielding film having an opening above each pixel, wherein the first and second photoelectric conversion elements have different saturated exposure amounts. A solid state image pickup device is provided which has a high sensitivity and a broad optical dynamic range.

Abstract: A submount can mount on it a semiconductor light-emitting device with high bonding strength, and a semiconductor unit incorporates the submount. The submount comprises (a) a submount substrate, (b) a solder layer formed at the top surface of the submount substrate, and (c) a solder intimate-contact layer that is formed between the submount substrate and the solder layer and that has a structure in which a transition element layer consisting mainly of at least one type of transition element and a precious metal layer consisting mainly of at least one type of precious metal are piled up. In the above structure, the transition element layer is formed at the submount-substrate side. The semiconductor unit is provided with a semiconductor light-emitting device mounted on the solder layer of the submount.

Abstract: The invention encompasses a method of forming a silicon nitride layer. A substrate is provided which comprises a first mass and a second mass. The first mass comprises silicon and the second mass comprises silicon oxide. A sacrificial layer is formed over the first mass. While the sacrificial layer is over the first mass, a nitrogen-containing material is formed across the second mass. After the nitrogen-containing material is formed, the sacrificial layer is removed. Subsequently, a silicon nitride layer is formed to extend across the first and second masses, with the silicon nitride layer being over the nitrogen-containing material. Also, a conductivity-enhancing dopant is provided within the first mass. The invention also pertains to methods of forming capacitor constructions.

Abstract: More complete charge transfer is achieved in a CMOS or CCD imager by reducing the spacing in the gaps between gates in each pixel cell, and/or by providing a lightly doped region between adjacent gates in each pixel cell, and particularly at least between the charge collecting gate and the gate downstream to the charge collecting gate. To reduce the gaps between gates, an insulator cap with spacers on its sidewalls is formed for each gate over a conductive layer. The gates are then etched from the conductive layer using the insulator caps and spacers as hard masks, enabling the gates to be formed significantly closer together than previously possible, which, in turn increases charge transfer efficiency. By providing a lightly doped region on between adjacent gates, a more complete charge transfer is effected from the charge collecting gate.

Abstract: A plurality of apertures is formed in at least one first insulating layer disposed over a sensor formed in a semiconductor substrate. A second insulating layer is disposed over the at least one first insulating layer and the plurality of apertures in the at least one first insulating layer. The apertures form hollow regions in the at least one first insulating layer over the sensor, allowing more light or energy to pass through the at least one first insulating layer to the sensor, and increasing the sensitivity of the sensor.

Abstract: A semiconductor integrated circuit having a high withstand voltage TFT and a TFT which is capable of operating at high speed in a circuit of thin film transistors (TFT) and methods for fabricating such circuit will be provided. A gate insulating film of the TFT required to operate at high speed (e.g., TFT used for a logic circuit) is relatively thinned less than a gate insulating film of the TFT which is required to have high withstand voltage (e.g., TFT used for switching high voltage signals).

Abstract: An imager temperature sensor and a current correction apparatus are provided which use dark pixel measurements from an imager chip during operation together with a fabrication process constant as well as a chip dependent constant to calculate chip temperature. The chip temperature may be used to generate a current correction signal. The correction signal is used to tune a current on the imager chip to correct for temperature variations.

Abstract: A solid-state imaging device comprising: a semiconductor substrate having a first surface; and a plurality of light-receiving sections arranged in an array pattern on the first surface of the semiconductor substrate, the solid-state imaging device reading a stored electric charge in each of the light-receiving sections, wherein each of the light-receiving sections comprises: a first signal electric charge storage section that stores a first signal electric charge corresponding to an incident light energy; and a second signal electric charge storage section that stores at least part of an excessive electric charge, the at least part of the excessive electric charge being captured from the first signal electric charge storage section, when the electric charge stored in the first signal electric charge storage section exceeds a saturated electric charge amount of the first signal electric charge section to form the excessive electric charge.

Abstract: In a solid state imaging device, sensitivity deterioration (shading) of the periphery of the imaging region is planned to be improved. An on-chip micro lens 28 corresponding to each sensor portion 23 in an imaging region 42 is comprised and the center of the reduction magnification of the exit pupil correction which is performed for the on-chip micro lens 28 is set to a position O deviated from the center of the imaging region 42.

Abstract: A solid-state imaging device includes a plurality of vertical charge transferring portions, and a horizontal charge transferring portion connected to at least one end of each of the vertical charge transferring portions.

Abstract: A color filter includes a substrate having a plurality of scribe lines arranged to form at least one filter region surrounded by the scribe lines. The scribe lines are at least partially filled with a resist material. At least one color resist layer is formed above the substrate within the at least one filter region.

Abstract: A solid state imaging device includes a transparent insulation film. The insulation film is laminated on transfer electrodes over the power supply lines. A transparent protection film, which has a refractive index that is greater than that of the insulation film, is laminated on the insulation film. The transparent insulation film has portions above the channels in which the thickness continuously increases from the center of adjacent channels to the associated channel separating region.

Abstract: A drive control circuit executes a cycle at least once while a first movable part moves one pitch of an electrode of a plurality of groups of electrodes, the cycle including a first operation for attracting the first movable part to a driving electrode substrate, a second operation for attracting the first movable part and a second movable part to stripe electrodes, a third operation for attracting the second movable part to the driving electrode substrate, and a fourth operation for attracting the first and second movable parts to the stripe electrodes.

Abstract: The present invention provides an optical system that includes an array of opto-electronic devices, an array of micro lenses, and a fore optic. The array of opto-electronic devices lie substantially along a plane, but the fore optic has a non-planar focal field. To compensate for the non-planar focal field of the fore optic, each opto-electronic device has a corresponding micro lens. Each micro lens has a focal length and/or separation distance between it and it respective opto-electronic device, which compensates for the non-planar focal field of the fore optic. The focal lengths of these lenses may differ relative to one another. As a result, light that is provided by the fore optic is reconfigured by the micro lenses having various focal lengths to be substantially focused along the plane of the array of opto-electronic devices.

Abstract: A pinned photodiode with a surface layer of a first conductivity type laterally displaced from an electrically active area of a gate structure and a charge collection region of a second conductivity type formed by an angled implant is disclosed. The angle of the charge collection region implant may be tailored so that the charge collection region contacts an adjacent edge of the transfer gate of the pixel sensor cell and minimizes, therefore, the gate overlap region and an undesirable barrier potential.

Abstract: A vertical color filter sensor group, formed on a substrate (preferably a semiconductor substrate) by a semiconductor integrated circuit fabrication process, and including at least two vertically stacked, photosensitive sensors. Other aspects of the invention are arrays of such vertical color filter sensor groups, and methods for fabricating such vertical color filter sensor groups and arrays thereof. In some embodiments, the sensor group is a block of solid material having a readout surface. At least two vertically stacked sensors are formed in the block and a trench contact is provided between one of the sensors and the readout surface.

Abstract: Selectively implanting carbon in a transistor lowers the collector-to-emitter breakdown (BVCEO) of the transistor. This transistor, with the lowered BVCEO, is then used as a “trigger” device in an Electrostatic Discharge (ESD) power clamp comprising a first low breakdown trigger device and a second high breakdown clamp device. ESD power clamps are constructed using epitaxial base pseudomorphic Silicon Germanium heterojunction transistors in a common-collector Darlington configuration.

Abstract: This invention discloses the several means by which transient noise due to capacitance related displacement current can be excluded from the optical signal coming from a silicon detector used in opto-couplers. The exclusion of such noise permits a high degree of detector sensitivity which permits the use of low efficiency silicon based LEDs for opto-coupler applications.

Abstract: Provided is a method of manufacturing an acceleration sensor capable of preventing bonding of a movable electrode and a fixed electrode. A stain film 8 for reducing bonding adsorption force is formed on side surfaces of a movable electrode 1, fixed electrodes 2a and 2b and a frame portion 7. In the case in which the movable electrode 1 and the fixed electrodes 2a and 2b are to be formed of a silicon substrate, it is preferable that an insulating film having irregular bonding of silicon atoms and oxygen atoms and irregular bonding of silicon atoms and nitrogen atoms should be employed for the stain film 8, for example. The formation of the stain film 8 can suppress the bonding between the movable electrode 1 and the fixed electrodes 2a and 2b even if Coulomb force is generated between both electrodes when the silicon substrate and a back side substrate 4 are joined by using an anode junction method.

Abstract: A phased-array antenna system and other types of radio frequency (RF) devices and systems using microelectromechanical switches (“MEMS”) and low-temperature co-fired ceramic (“LTCC”) technology and a method of fabricating such phased-array antenna system and other types of radio frequency (RF) devices are disclosed. Each antenna or other type of device includes at least two multilayer ceramic modules and a MEMS device fabricated on one of the modules. Once fabrication of the MEMS device is completed, the two ceramic modules are bonded together, hermetically sealing the MEMS device, as well as allowing electrical connections between all device layers. The bottom ceramic module has also cavities at the backside for mounting integrated circuits. The internal layers are formed using conducting, resistive and high-k dielectric pastes available in standard LTCC fabrication and low-loss dielectric LTCC tape materials.

Abstract: A package structure with a heat spreader and manufacturing method thereof is disclosed. The package structure includes a substrate, a ground pad, a heat spreader, a non-conductive adhesive layer, and a pre-solder layer. A die is seated on the substrate, and the ground pad is disposed on the surface of the substrate. The manufacturing method of the package structure includes the following steps: (a) providing the substrate; (b) forming the pre-solder layer on the ground pad by solder paste printing; (c) forming the non-conductive adhesive layer on the substrate surface for being adjacent to the pre-solder layer by adhesive dispensing; (d) disposing the heat spreader onto the non-conductive layer and the pre-solder layer; and (e) heating the non-conductive adhesive layer for solidification and continuing to heat the pre-solder layer for solder reflow so that the heat spreader is adhered to the substrate via the non-conductive adhesive layer and coupled to the ground pad via the pre-solder layer.

Abstract: Novel uses of diamondoid-containing materials in the field of microelectronics are disclosed. Embodiments include, but are not limited to, thermally conductive films in integrated circuit packaging, low-k dielectric layers in integrated circuit multilevel interconnects, thermally conductive adhesive films, thermally conductive films in thermoelectric cooling devices, passivation films for integrated circuit devices (ICs), and field emission cathodes. The diamondoids employed in the present invention may be selected from lower diamondoids, as well as the newly provided higher diamondoids, including substituted and unsubstituted diamondoids. The higher diamondoids include tetramantane, pentamantane, hexamantane, heptamantane, octamantane, nonamantane, decamantane, and undecamantane.

Abstract: A solid-state image pickup apparatus includes color separating filters for separating incident light representative of a scene into color components. Photosensitive cells are arranged in rows and columns each for receiving a particular color component and outputting a corresponding signal charge. The photosensitive cells are classified into a first and a second group respectively having first sensitivity and second sensitivity lower than the first sensitivity. The photosensitive cells of the first group adjoin the photosensitive cells of the second group with their geometric centers being shifted from those of the photosensitive cells of the second group by one half of a pitch with respect to arrangement in the direction of rows and/or the direction of columns. A first transfer path extends in the direction of columns between each nearby photosensitive cells of the first group adjoining each other in the direction of rows for transferring signal charges output from the photosensitive cells.

Abstract: A radio frequency chip package is formed by assembling a connecting element such as a circuit board or flexible circuit tape having chips thereon with a bottom plane element such as a lead frame incorporating a large thermally-conductive plate and leads projecting upwardly from the plane of the plate. The assembly step places the rear surfaces of the chips on the bottom side of the connecting element into proximity with the thermal conductor and joins the conductive traces on the connecting element with the leads. The resulting assembly is encapsulated, leaving terminals at the bottom ends of the leads exposed. The encapsulated assembly may be surface-mounted to a circuit board. The leads provide robust electrical connections between the connecting element and the circuit board.

Abstract: [Problem]To reduce a leakage current by suppressing the generation of a junction leakage.

Abstract: A lens array substrate and an image displaying device which can prevent unstable operation and malfunction of the TFTs by suppressing the rise in the temperature of liquid crystal display panel are provided. According to the invention, a lens resin layer and a sealing resin layer are provided on the glass substrate, and a lens array is formed at the interface of the lens resin layer and the sealing resin layer which have different refractive indexes from each other. On a cover substrate provided on the sealing resin layer, a light blocking member comprising a material with high reflectance such as Al and Ag is formed along the region corresponding to the boundary edges between the lenses in the lens array, then, a transparent electrode is formed on the all surface of the cover substrate via the light blocking member.

Abstract: Nonvolatile memory devices and methods for fabricating the same are provided. The device includes first and second base patterns disposed under floating and selection gates, respectively, at an active region. A channel region is formed in the active region between the first and second base patterns, and source and drain regions are formed in the active region adjacent to the first and second base patterns, respectively. The method includes forming first and second base patterns on a semiconductor substrate to be separated from each other by a predetermined space. A channel region is formed in the semiconductor substrate between the first and second base patterns. Source and drain regions are formed in the semiconductor substrate adjacent to the reverse side of the channel region on the basis of the first and second base patterns, respectively. A tunnel oxide layer is formed on a predetermined region of the channel region. A memory gate is formed to cover the first base pattern and the tunnel oxide layer.

Abstract: An individual-well adaptive method of body bias control that mitigates the effects of D2D and WD process variations is shown. It is assumed that p-type transistors are grouped in sections. The bodies of all the p-type transistors within a section are connected to a single n-well. This section size can be small enough to provide fine-granular adjustments to the circuit without having any impact on area overhead. With a small amount of additional circuitry and routing, individual well biases can be intelligently adjusted resulting in closely controlled chip power and performance. Experimental results show that binning yields as low as 17% can be improved to greater than 90% using the proposed method.

Abstract: A solid-state image pickup device in which many photoelectric converters are arranged in a shifted-pixel layout includes a vertical charge transfer path whose width is larger in a region in which an isolation area is disposed on both sides of the transfer path than in a region in which the isolation area is arranged on only one side thereof. This prevents an event in which the transfer efficiency and the saturation output of charge in the vertical charge transfer path are locally changed by the narrow channel effect.

Abstract: The present invention discloses a surface mountable device comprising a current-sensitive element and two electrodes. The current-sensitive element is composed of a PTC conductive composite, comprising at least one polymer and a conductive filler. The feature of the present invention is that the current-sensitive element is a three-dimensional bent structure so that the shape, length and height of the device can be varied according to the space of the circuit board and the resistance of the surface mountable device. Therefore, the mountable surface of the circuit board can be used more efficiently. Moreover, the area of the current-sensitive element of the present invention is larger than that of the conventional surface mountable device. Consequently, the normal resistance of the surface mountable device of the present invention is smaller than that of the conventional surface mountable device and the voltage endurance of the surface mountable device of the present invention is increased.

Abstract: A bipolar transistor includes a collector that is selected from the group SiC and SiC polytypes (4H, 6H, 15R, 3C . . . ), a base that is selected from the group Si, Ge and SiGe, at least a first emitter that is selected from the group Si, SiGe, SiC, amorphous-Si, amorphous-SiC and diamond-like carbon, and at least a second emitter that is selected from the group Si, SiGe, SiC, amorphous-Si, amorphous-SiC and diamond-like carbon. Direct-wafer-bonding is used to assemble the bipolar transistor. In an embodiment the bandgap of the collector, the bandgap of the at least a first emitter and the bandgap of the at least a second emitter are larger than the bandgap of the base.

Abstract: A lock in pinned photodiode photodetector includes a plurality of output ports which are sequentially enabled. Each time when the output port is enabled is considered to be a different bin of time. A specified pattern is sent, and the output bins are investigated to look for that pattern. The time when the pattern is received indicates the time of flight.

Abstract: In a solid-state image pick-up device of FIG. 1, a plurality of photoelectric converting devices 100 having almost square light receiving regions are provided like a tetragonal grid over the surface of a semiconductor substrate and a plurality of vertical transfer sections 200 are provided corresponding to the respective photoelectric converting device strings respectively. The vertical transfer section 200 includes a vertical transfer channel and a plurality of vertical transfer electrodes provided on the upper layer of the vertical transfer channel, and the vertical transfer channel is provided in winding shape between the photoelectric converting devices 100 constituting the corresponding photoelectric converting device strings.

Abstract: A manufacturing method of semiconductor devices, micromachines such as semiconductor device, narrow pitch connectors, electrostatic actuators or piezoelectric actuators, and ink jet heads, ink jet printers, liquid crystal panels, and electronic appliances, including them characterized in that short circuit due to dusts floating in the air will not take place. In a method where a silicon wafer (30) undergoes dicing to manufacture semiconductor devices (20), a groove (30a) covered by an insulating layer and spanning a dicing line is formed in the above described silicon wafer, and the silicon wafer undergoes dicing along the dicing line.

Abstract: A color linear image sensor device has a shutter function for selectively draining charges stored in a photodetector circuit. The color linear image sensor device includes first, second, and third linear image sensors having different sensitivities with respect to incident light and arranged successively in sensitivity decreasing order from the outermost, and a shutter gate and a shutter drain for adjusting an amount of exposure to the linear image sensor which has the highest sensitivity to incident light.

Abstract: A solid-state image pickup device includes: a plurality of light receiving portions arranged in a matrix, and a vertical transfer register which is four-phase driven by first, second, third and fourth transfer electrodes of a three-layer structure. The vertical transfer register is provided for each of columns of said light receiving portions. The first and third transfer electrodes of the first layer are alternately arranged in a charge transfer direction, and the adjacent two of the first and third transfer electrodes extend in parallel to each other between the light receiving portions. With this solid-state image pickup device, the accumulated charge capacity of each transfer region composed of the adjacent transfer electrodes for two-phases is equalized and the area of the light receiving portion is increased irrespective of variations in processed dimension between the transfer electrodes.

Abstract: An image sensor includes (a) a plurality of pixels each having (i) a plurality of photosensitive areas having a first sensitivity to light for forming a first sensitivity area; (ii) a plurality of charge-coupled devices respectively adjacent the photosensitive areas having a second sensitivity to light for forming a second sensitivity area; wherein the second sensitivity area is less sensitive to light than the first sensitivity area so that the second sensitivity area saturates after the first sensitivity area saturates; (iii) a first transfer mechanism for permitting electrons to be passed from the first sensitivity area to the second sensitivity area; and (b) a second transfer mechanism for moving electrons through the plurality of charge-coupled devices.

Abstract: In a semiconductor device for generating complementary PWM signals for, for example, controlling an inverter, a dead time is flexibly added by using a simple architecture. A dead time addition unit adds time elapsing until a value of a timer reaches a set value of a register as a first dead time at a rise of a first PWM signal. On the other hand, time elapsing until the value of the timer reaches a set value of another register is added as a second dead time at a rise of a second PWM signal.

Abstract: A CMOS imager having multiple graded doped regions formed below respective pixel sensor cells is disclosed. A deep retrograde p-well is formed under a red pixel sensor cell of a semiconductor substrate to increase the red response. A shallow p-well is formed under the blue pixel sensor cell to decrease the red and green responses, while a shallow retrograde p-well is formed below the green pixel sensor cell to increase the green response and decrease the red response.

Abstract: A semiconductor device comprising: a semiconductor substrate having a light receiving or emitting element; a condenser lens provided above the element; a first transparent film provided on the condenser lens for planarization over the condenser lens; a light-transmittable optical element provided above the first transparent film; and a second transparent film interposed between the first transparent film and the optical element; wherein the first transparent film is comprised of a fluorine compound so that the first transparent film is lower in refractive index than the condenser lens and the second transparent film is lower in water- and oil-repellent properties than the first transparent film.

Abstract: A lock in pinned photodiode photodetector includes a plurality of output ports which are sequentially enabled. Each time when the output port is enabled is considered to be a different bin of time. A specified pattern is sent, and the output bins are investigated to look for that pattern. The time when the pattern is received indicates the time of flight.

Abstract: An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

Abstract: This invention relates to improving the internal combustion in reciprocating engines of 4 or 2 cycle operation, and more particularly to reciprocating engines which are compounded in order to provide extension of the expansion event. Both primary cylinders and larger secondary cylinders have pistons moving in block cylinders that are cooled and lubricated as usual, but added cylinders are fastened on the top of each block cylinder, each of the same bore and axially aligned with the block cylinder below them, their length that of the stroke of their piston. At the top of each piston's stroke, the piston is in the block cylinder as usual with rings in the normal place, but above the block, the piston extends toward the head, slightly smaller, and concentric with the lower part, a distance for the right compression ratio. This space between the piston and cylinder allows both to operate at high temperatures, but not touch each other, so no lubrication is needed.

Abstract: Disclosed herein is a solid-state imaging device having an effective pixel portion, an optical black portion, and a charge transfer register portion commonly provided in the effective pixel portion and the optical black portion, wherein the register width of a portion of the charge transfer register portion in the optical black portion is set larger than the register width of a portion of the charge transfer register portion in the effective pixel portion. With this configuration, the general dynamic range in the solid-state imaging device can be improved.

Abstract: A pixel sensor cell for use in a CMOS imager exhibiting improved storage capacitance. The source follower transistor is formed with a large gate that has an area from about 0.3 &mgr;m2 to about 10 &mgr;m2. The large size of the source follower gate enables the photocharge collector area to be kept small, thereby permitting use of the pixel cell in dense arrays, and maintaining low leakage levels. Methods for forming the source follower transistor and pixel cell are also disclosed.

Abstract: A honeycomb CCD, whose light receiving portion and a certain light receiving portion 105 adjoining thereto are arranged at a position to be shifted by half a pixel pitch in line and row directions, has charge transfer electrodes 111-114 formed of double-layered polysilicon electrode, a metal wiring 125, having smaller resistivity thereto, which is arranged in the longitudinal direction along each VCCD to intersect and cross over the charge transfer electrodes 111-114 being connected by a contact hole 126, by which electrical resistance of the polysilicon layer of the charge transfer electrodes can be lowered without increasing thickness thereof.

Abstract: A multi-chip semiconductor package and a fabrication method thereof are provided. A substrate having an upper surface and a lower surface is prepared. At least a first chip is mounted on the upper surface of the substrate. A non-conductive material is applied over predetermined area on the first chip and the upper surface of the substrate. At least a second chip is mounted on the non-conductive material, and formed with at least a suspending portion free of interference in position with the first chip, wherein the non-conductive material is dimensioned in surface area at least corresponding to the second chip, so as to allow the suspending portion to be supported on the non-conductive material. With the second chip being completely supported on the non-conductive material without causing a conventional chip-crack problem, structural intactness and reliability can be effectively assured for fabricated-package products.

Abstract: An electronic circuit device has a high-density mount board (2), on which are disposed a microcomputer (3) and random access memory (7) which are connected to each other through an exclusive memory bus (12) for high-speed data transfer, a programmable device (8) which is a variable logic circuit represented by FPGA, and an electrically-rewritable nonvolatile memory (16) which can store the operation program of the microcomputer. The high-density mount board has external mounting pins on the bottom surface so that it can be mounted on a mother board in the same manner as a system on-chip multi-chip module. With an intended logic function being set on the programmable device, a hardware-based function to be realized by the electronic circuit device can be simulated. With an operation program being written to the nonvolatile memory, a software-based function to be realized can be simulated.