Abstract: By etching, a first groove and a second groove are formed in a silicon substrate. Surfaces of the side walls of these grooves have a surface orientation of (111). The first and second grooves sandwich a silicon thin plate therebetween, which is formed as a part of the silicon substrate. The silicon thin plate is sufficiently thin so as to act as a quantum well. Further, a pair of silicon oxide films acting as tunneling barriers are formed on the surfaces of the side walls of the silicon thin plate, thus forming a double barrier structure. In addition, a pair of polysilicon electrodes are formed and sandwich the double barrier structure. As a result, the structure of a resonance tunneling diode, which utilizes the resonance tunneling effect, is provided. Adding a third electrode to the above structure provides a resonance tunneling transistor.

Abstract: A carrier transport media is doped with impurities or includes barrier structures within or on the carrier transport media and a sinusoidally alternating external electric field(s) with frequencies equal to the Bloch frequency divided by an integer is applied to the carrier transport media to alter the effective barriers of the impurities or barrier structures to an arbitrarily large potential compared to the zero field barrier potential. The various impurities or barrier structures are band engineered and deposited, grown or implanted in the carrier transport media and can take any form such as barrier layers in or on the transport media, laterally induced barriers, and impurities or defects in the carrier transport media. The application of time-dependent external fields across a length of nanoscale or mesoscopic structure leads to an effective renominalization of the barrier potential strengths when the frequency of the applied electric field multiplied by an integer is equal to the Bloch frequency.

Abstract: The present invention relates to a light-controlled semiconductor heterostructure component for generating microwave frequency oscillations, wherein the heterostructure comprises at least two semiconductor materials: at least one of them absorbing light by creating electron-hole pairs; and the other one of them having majority carriers with a relationship of velocity as a function of electric field that presents a region of negative slope.

Abstract: The invention presents a structure of heterostructure-emitter and heterostructure-base transistor. The device structure are, from bottom upward in succession, a substrate, a buffer layer, a collector layer, a base layer, a quantum well, an emitter layer, a confinement layer and an ohmic contact layer. Of them, except the quantum well which is made of InGaAs and the confinement layer which is formed by AlGaAs, the rest are all made of GaAs material. Base on the design of the heterostructure of base and emitter, a transistor of such structure, under normal operation mode, possesses high current gain and low offset voltage so as to reduce undesirable power consumption. In addition, under the inverted operation mode, the interesting multiple S-shaped negative-differential-resistance may be obtained due to the avalanche multiplication and two-stage carrier confinement effects.

Abstract: An electronic part is disclosed which is furnished with an artificial super lattice obtained by alternately superposing a substance of good conductivity formed of a compound between one element selected from among the elements belonging to the transition elements of Groups 3A to 6A and the rare earth elements and an element selected from among boron, carbon, nitrogen, phosphorus, selenium, and tellurium or a compound between oxygen and a transition metal element selected from among the elements of Group 7A and Group 8 and an insulating substance formed of a compound between a simple metal element selected from among the elements belonging to Group 1A, Group 2A, and Groups 1B to 4B and an element selected from among carbon, nitrogen, oxygen, phosphorus, sulfur, selenium, tellurium, and halogen elements in thicknesses fit for obtaining a quantum size effect.

Abstract: A semiconductor device includes a semi-insulating semiconductor substrate, a semiconductor layer structure including at least an undoped layer of a first semiconductor, an undoped spacer layer of a second semiconductor having an electron affinity smaller than that of the first semiconductor, and an n type electron supply layer of the second semiconductor successively laminated on the substrate, the undoped layer having a flat top surface and a flat rear surface on the flat top surface of the undoped spacer layer, having, at a top surface, a concavo-convex periodic structure, and a flat rear surface, the n-type electron supply layer of the second semiconductor having a flat top surface and a rear surface that buries concavities of the concavo-convex structure of the undoped spacer layer, and a plurality of periodically arranged Schottky electrodes on the flat top surface of the n type electron supply layer, arranged in a direction perpendicular to the concavo-convex periodic structure of the undoped spacer lay

Abstract: A semiconductor light-emitting device that enables to realize a satisfactory carrier confinement effect to be capable of stable operation at room temperature. This device includes a QW layer and p- and n-barrier layers placed at each side of the QW layer. The QW layer has an energy level E.sub.va at the top of the valence band and an energy level E.sub.ca at the bottom of the conduction band. The p-barrier layer has an energy level E.sub.vpb at the top of the valence band and an energy level E.sub.cpb at the bottom of the conduction band. The n-barrier layer has an energy level E.sub.vnb at the top of the valence band and an energy level E.sub.cnb at the bottom of the conduction band. The energy levels E.sub.va, E.sub.vpb and E.sub.vnb at the top of the valence band satisfy the relationship of E.sub.va >E.sub.vpb >E.sub.vnb. The energy levels E.sub.ca, E.sub.cpb and E.sub.cnb at the bottom of the conduction band satisfy the relationship of E.sub.va <E.sub.vnb <E.sub.vpb.

Abstract: An electronic device which includes, a couple of first conduction regions which are capable of confining carriers, a second conduction region having a higher energy level than those of the first conduction regions, and a first electrode for impressing a voltage on the first conduction regions, wherein when a voltage is impressed via the first electrode between the couple of first conduction regions, carriers are caused to move due to a tunneling effect from one of the first conduction regions via the second conduction region to the other of the first conduction regions, and when the voltage impressed between the couple of first conduction regions is removed, carriers are confined mainly in the one of the first conduction regions.

Abstract: A Coulomb-blockade element includes a silicon layer formed on a substrate through an insulating film. The silicon layer includes a narrow wire portion and first and second electrode portions. The narrow wire portion serves as a conductive island for confining a charge. The first and second electrode portions are formed to be connected to the two ends of the narrow wire portion and are wider than the narrow wire portion. Each of the first and second electrode portions has constrictions on at least one of the upper and lower surfaces thereof, which make a portion near the narrow wire portion thinner than the narrow wire portion.

Abstract: A semiconductor device has a substrate composed of a semiconductor which has one of sphalerite and diamond crystal structures. The substrate has a plane orientation inclined at 0.5.degree. to 15.degree. with respect to one of {111} and {110} planes indicated by Miller indices. A first semiconductor layer is formed on the substrate. The first semiconductor layer has a sawtooth-shaped first periodic structure consisting of one of the {111} and {110} planes indicated by the Miller indices and at least one plane indicated by another index. A second semiconductor layer is formed on the first semiconductor layer. The second semiconductor layer has a second periodic structure having a phase shifted from a phase of the first periodic structure.

Abstract: A heterojunction tunnel diode with first and second barrier layers, the first barrier layer including aluminum antimonide arsenide. A quantum well formation is sandwiched between the first and second barrier layers, and includes first and second quantum well layers with a barrier layer sandwiched therebetween, the first quantum well layer being adjacent the first barrier layer. The first quantum well layer is gallium antimonide arsenide which produces a peak in hole accumulations therein. The second quantum well layer produces a peak in electron accumulations therein. A monolayer of gallium antimonide is sandwiched in the first quantum well layer at the peak in hole accumulations and a monolayer of indium arsenide is sandwiched in the second quantum well layer at the peak in electron accumulations.

Abstract: A quantum wire structure includes a first layer having a thickness sufficiently smaller than a de Broglie wavelength of an electron wave in a medium, a second layer and a third layer which are disposed on and under the first layer and respectively have a forbidden band width larger than that of the first layer, wherein the first layer has a region with a relatively small curvature and a region with a relatively large curvature in its cross-section, and a width of the region with a relatively small curvature is 50 nm or less.

Abstract: This invention describes a nanometer scale interband lateral resonant tunneling transistor, and the method for producing the same, with lateral geometry, good fanout properties and suitable for incorporation into large-scale integrated circuits. The transistor is of a single gate design and operation is based on resonant tunneling processes in narrow-gap nanostructures which are highly responsive to quantum phenomena. Such quantum-effect devices can have very high density, operate at much higher temperatures and are capable of driving other devices.

Abstract: A submatrix of semiconductor material contains plural electron conduction annels in either or both series and parallel arrangements. Electrons in the channels are confined by the submatrix and a surrounding main matrix provides photon confinement within the submatrix for nonequilibrium phonons which are mutually interchanged between channels. The confinement enhances the efficiency of energy and momentum transfer by means of nonequilibrium phonons. Embodiments of the invention as a transformer, bistable switch, controlled switch and amplifier are disclosed.

Abstract: The single electron transistor can be operated at room temperature. The distance between the electrodes 5, 5 can be adjusted by the length of the protein and/or the wideness of the lipid bilayer and the distance between the quantum dot 4 and one of the electrodes 5 can be adjusted in units of 1.5 .ANG. by means of .alpha.-helix confirmation of a G segment of the protein.

Abstract: Apparatus for and method of increasing the effective integration time, and, hence, reducing the noise bandwidth of a photodetector. The current output of the photodetector is converted to a voltage signal in a low pass filter. The low pass filter is preferably implemented as a switched capacitor filter.

Abstract: Group II-VI compound semiconductor light emitting devices which include at least one II-VI quantum well region of a well layer disposed between first and second barrier layers is disclosed. The quantum well region is sandwiched between first and second cladding layers of a II-VI semiconductor material. The first cladding layer is formed on and lattice matched to the first barrier layer and to a substrate of a III-V compound semiconductor material. The second cladding layer is lattice matched to the second barrier layer. The quantum well layer comprises a II-VI compound semiconductor material having the formula A.sub.x B.sub.(1-x) C wherein A and B are two different elements from Group II and C is at least one element from Group VI. When the second cladding layer has a p-type conductivity, a graded bandgap ohmic contact according to the present invention can be utilized.

Abstract: A new class of electronic systems, wherein microelectronic semiconductor integrated circuit devices are integrated on a common substrate with molecular electronic devices.

Abstract: An optical controlled resonant tunneling oscillator utilizing an oscillation variation characteristic of a resonant tunneling oscillator in accordance with a negative differential resistance, a series resistance and a static capacitance varied with an intensity of light when the light is incident on a resonant tunneling device having a double barrier quantum well structure and a method for fabricating the same are disclosed. The oscillator can modulate the frequency 2 or 3 levels in response to an intensity of an incident light as compared with the method of a conventioal photoelectric system that modulates the frequency in response to ON/OFF of an electric signal, thereby simplifying the system. The oscillator controls the resonant tunneling at the high speed by light, thereby enabling processing a signal of tens to hundreds GHz.

Abstract: A quantum device including a plate-like conductor part having a necking portion and a method of producing the same are disclosed.

Abstract: A superlattice of LT-GaAs layers and another semiconductor layers such as LT-AlGaAs or HT-GaAs is grown on a substrate. Lattice imperfectness such as strain or crystal defects is selectively introduced. Then, the superlattice is annealed to produce As precipitates at selected locations of the LT-GaAs layers. When strain is given by metal electrodes, anisotropic etching and self-alined metal deposition can be done utilizing these electrodes. Various semiconductor devices, particularly SET devices can be manufactured utilizing those metallic precipitates.

Abstract: An epitaxial structure and method of manufacture for a field-effect transistor capable of high-speed low-noise microwave, submillimeterwave and millimeterwave applications. Preferably, the epitaxial structure includes a donor layer and/or buffer layer made from a semiconductor material having the formula AlP.sub.0.39+y Sb.sub.0.61-y.

Abstract: A semiconductor light-emitting device employs a quantum well having a fundamental wavelength in the absence of an external electric field; a microcavity with two reflectors, having a resonance wavelength which closely corresponds to the fundamental wavelength of the quantum well; and electrodes for applying an electric field across the microcavity to change the wavelength of the quantum well and thereby control the radiance of the microcavity.

Abstract: A heterojunction semiconductor device includes an unipolar transistor having, a collector layer, a base layer, a collector side barrier layer provided between the collector layer and base layer, an emitter layer, and an emitter side barrier layer provided between the base layer and the emitter layer. The emitter side barrier layer has a thickness for tunneling a carrier from the emitter and base layer and injecting the carrier into the base layer according to a predetermined voltage applied between the emitter and base layers, the base layer includes a superlattice structure. The superlattice structure includes a plurality thin barrier layers and a thin well layer for forming a mini-band through which the injected carrier can move and a mini-band gap with which the injected carrier collides.

Abstract: An optical operator designed to be subjected to write radiation for processing read radiation that it receives, the operator comprising an electro-optical material (Q2), first and second materials (Q1, Q3) distributed on either side of the electro-optical material (Q2), said first and second materials (Q1, Q3) being collection quantum wells. Quantum barrier forming materials (6, 8) are interposed between said two materials (Q1, Q3) and the electro-optical material (Q2), with one of the quantum barrier forming materials (6) constituting a filter such that charges of a certain sign photoexcited by the write radiation in a material (4, Q1) on one side of said filter pass through it in the absence of an external electric field to relax in the collection quantum well (Q3) situated on the other side of the filter (6), while charges of opposite sign are blocked by the filter (6) in the other collection well (Q1).

Abstract: A transistor according to the invention for simultaneously providing at least two current-voltage characteristics includes a base, a collector, and an emitter. At least one of the base, collector, and emitter includes a first layer grown using molecular beam epitaxy (MBE). The first layer includes a first strip having a first doping characteristic created using focused ion beam processing. A second strip has a second doping characteristic created by focused ion beam processing. A middle section of undoped material is located between the first and second strips. A resonant tunneling junction is grown on the first layer using MBE and includes a plurality of layers.

Abstract: A multi-well diode is disclosed which can be used with other electronic components as an electronic neuron circuit. Structural embodiments of the multi-well diode are disclosed having a p-i-n, n-i-n, or p-i-p configurations. In addition, the wells of the i-region are disclosed as being either n-type or p-type semiconductor material. The multi-well diode has an S-shaped current-voltage characteristic curve at forward bias whereby it remains in a low conductance state until its threshold voltage is exceeded, then switches through an unstable region of its characteristic curve into a high conductance state. The multi-well diode remains in the high conductance state until its bias voltage and current drops below its holding condition, at which time it switches into a low conductance state. The multi-well diode can be used in a pulse-mode input circuit, thereby generating a pulse-mode output signal which can have a different amplitude and frequency than the input signal.

Abstract: A multi-well diode is disclosed which can be used with other electronic components as an electronic neuron circuit. The multi-well diode has an S-shaped current-voltage characteristic curve at forward bias whereby it remains in a low conductance state until its threshold voltage is exceeded, then switches through an unstable region of its characteristic curve into a high conductance state. The multi-well diode remains in the high conductance state until its bias voltage and current drops below its holding condition, at which time it switches into a low conductance state. The multi-well diode can be used in a pulse-mode input circuit, thereby generating a pulse-mode output signal which can have a different amplitude and frequency than the input signal. Such pulse-mode input circuits can be either excitatory or inhibitory in operation.

Abstract: A current-controlled resonant tunneling diode (RTD) having an InAs quantum well, AlGaSb barriers and InAs cladding layers is disclosed. The RTD of this invention displays an S-shaped negative differential resistance in its I-V relationship. As a result, the RTD displays the bistability necessary to greatly enhance the speed of operation of many key electronic components by eliminating the need for large load resistances in the circuit design.

Abstract: A band-to-band resonant tunneling transistor including GaSb and InAs resonant tunneling layers separated by a thin barrier layer and a second InAs layer separated from the GaSb layer by another thin barrier layer. A terminal on the InAs resonant tunneling layer and a terminal on the second InAs layer. Leakage current reduction layers are positioned on the second InAs layer with a bias terminal positioned thereon. The InAs resonant tunneling layer has a plurality of quantized states which are misaligned with the ground state of the GaSb layer in a quiescent state, each of the quantized states of the InAs resonant tunneling layer are movable into alignment with the ground state of the GaSb layer to provide current flow through the transistor with the application of a specific potential to the terminal on the second InAs layer.

Abstract: Multiple quantum wells within an impact avalanche transit time device (IMPATT) utilizing a plurality of gallium arsenide/aluminum gallium arsenide heterojunctions are used to provide a high power, high frequency, high efficiency device operating at 50 GHz and up. The multiple quantum wells defined by the heterojunctions between pairs of gallium arsenide quantum wells and aluminum gallium arsenide barrier layers improves the nonlinearity of the avalanche process within the gallium arsenide quantum wells and reduces the ionization rate saturation limitations. Optical injection locking of the current through the IMPATT device is achieved by irradiating the active layer of the IMPATT device with modulated laser light.

Abstract: A quantum wire embedded in another material or a quantum wire which is free standing. Specifically, the quantum wire structure is fabricated such that a quantum well semiconductor material, for example Gallium Arsenide (GaAS), is embedded in a quantum barrier semiconductor material, for example Aluminum Arsenide (AlAs). Preferably, the entire quantum wire structure is engineered to form multiple subbands and is limited to a low dimensional quantum structure. The dimensions of the quantum wire structure are preferably around 150.times.250 .ANG.. This structure has a negative absolute conductance at a predetermined voltage and temperature. As a result of the resonant behavior of the density of states, the rates of electron scattering in the passive region (acoustic phonon and ionized impurity scattering as well as absorption of optical phonons) decrease dramatically as the electron kinetic energy increases.

Abstract: A quantum device including a plate-like conductor part having a necking portion made by forming a first mask layer having a first strip portion on a conductor substrate; forming a second mask layer having a second strip portion on the conductor substrate; etching a region of the conductor substrate which is not covered with the first and second mask layers, by using the first and second mask layers as an etching mask, to form a plurality of first recess portions on a surface of the conductor substrate; selectively covering side faces of the plurality of first recess portions, and side faces of the first and second mask layers with a side wall film; selectively removing only the second mask layer; etching another region of the conductor substrate which is not covered with the first mask layer and the side wall film, by using the first mask layer and the side wall film as an etching mask, to form a plurality of second recess portions on the surface of the conductor substrate; selectively removing part of anothe

Abstract: A room temperature high speed transistor that does not suffer deleterious effects from plasmon scattering. The transistor of the present invention comprises a semiconducting base region having a type of majority carriers and sub-band ordering associated with the majority carriers. The transistor further comprises a semiconducting collector region contacting the base region at a collector-base heterojunction, the semiconducting collector region having the same type of majority carriers as the semiconducting base region and having a sub-band ordering different than that of the base region. The transistor further comprises a semiconducting emitter region contacting the base region at an emitter-base heterojunction, the semiconducting emitter region having the same type of majority carriers as the semiconducting base region. In active operation of the transistor of the present invention, carriers are injected from a main sub-band in the emitter region into a satellite sub-band the base region.

Abstract: An integrated circuit which includes a pair of serially arranged P channel transistor devices connected with their source and drain terminals in series. The devices are constructed as N well devices in a P substrate. Using a pair of N well devices allows higher voltages to be divided and applied across the two devices without reaching the breakdown limits of either the oxide or the junctions between different portions of the devices used in the process. These devices have been found capable of transferring ten or more volts to circuitry for programming or erasing flash EEPROM cells even the they are a part of integrated circuitry designed for only 3.3 volt usage.

Abstract: A quantum multifunction transistor including a plurality of conduction layers of semiconductor material with a tunnel barrier layer sandwiched therebetween. The conduction layers each being very thin to form discrete energy levels, and the material being chosen so that discrete energy levels therein are not aligned across the tunnel barrier layer in an equilibrium state. A gate coupled to a portion of one of the conduction layers for aligning, in response to a voltage applied thereto, discrete energy levels in the conduction layers across the tunnel barrier layer, whereby majority carrier current flows through the transistor. Application of a higher voltage to the gate results in minority carrier current flow through the transistor.

Abstract: A heterojunction bipolar transistor includes a multiquantum barrier structure as part of the collector and contacting the base. The MQB has an energy band structure in which the height of the effective potential barrier of the MQB increases in steps from the base into the collector. Therefore, an electric field in the collector in the vicinity of the base-collector interface is relaxed and intervalley scattering of electrons is suppressed whereby a reduction in electron mobility due to the intervalley scattering is suppressed, reducing transit time of electrons in the collector.

Abstract: A lateral resonant tunneling transistor is provided comprising heterojunction barriers (24) and a quantized region (33). Current between source contact (26) and drain contact (28) can be switched "ON" or "OFF" by placing an appropriate voltage on gate contacts (30) and (32). The potential on gate contacts (30) and (32) selectively modulate the quantum states within quantized region (33) so as to allow electrons to tunnel through heterojunction barrier (24) and quantized region (33).

Abstract: A high-speed semiconductor device includes an emitter layer serving as an injection source of hot electrons and a collector barrier layer disposed between a base layer and a collector layer. The potential profile of the collector barrier layer gradually varies from a region in the vicinity of the boundary between the base layer and the collector barrier layer whereby reflection of electrons at the collector barrier layer is significantly reduced. Therefore, current density in the ON state of the device is increased without damaging the high speed characteristics of the device, and current density in the OFF state of the device is decreased, resulting in a high-performance and high-speed semiconductor device.

Abstract: A phonon modulator which includes a semiconductor body having at least first and second polar semiconductor quantum wells formed therein separated by a polar semiconductor barrier. The conduction band energies of the wells and barrier are selected such that the lowest energy electronic states in the two wells are separated by an energy which is greater than the energies of optical phonons in the well and barrier materials. Respective voltages are applied to the wells which are less than the optical phonon emission threshold in the well and barrier materials to generate respective currents therein. Increasing the voltage to the first well to a level in excess of such optical phonon emission threshold causes optical phonons to be emitted from the first well to create a standing interface mode from the first well through the barrier to the second well, thereby providing a scattering mechanism for electrons in the second well and reducing the current thereof.

Abstract: A gain-stable npn heterojunction bipolar transistor includes a graded superlattice between its base and emitter consisting of multiple discrete periods, with each period having a layer of base material and another layer of emitter material. The thicknesses of the base material layers decrease while the thicknesses of the emitter material layers increase in discrete steps for each successive period from the base to the emitter. The thickness of each period is preferably at least about 20 Angstroms, with the superlattice including more than five periods. The superlattice is preferably doped to establish an electrical base-emitter junction at a desired location. The graded superlattice inhibits the diffusion of beryllium p dopant from the base into the emitter during transistor operation, thus stabilizing the device's gain and turn-on voltage.

Abstract: A multiple quantum well (MQW) radiation sensor eliminates tunneling current from the photoactivated current that provides an indication of incident radiation, and yet preserves a substantial bias voltage across the superlattice, by fabricating an intermediate contact layer between the superlattice and a tunneling blocking layer. Using the intermediate contact layer to apply a bias voltage across the superlattice but not the blocking layer, the photoexcited current flow through the intermediate contact and blocking layers is taken as an indication of the incident radiation. The width of the intermediate contact layer and the barrier energy height of the blocking layer relative to that of the superlattice barrier layers are selected to enable a substantial photoexcited current flow across the blocking layer.

Abstract: A field effect transistor according to the present invention uses a silicon monocrystalline substrate. At least two independent thin amorphous silicon layers are formed in a position for preventing movement of majority carriers in a channel region in the surface of the silicon substrate. Each amorphous silicon layer is between monocrystalline silicon layers. A gate electrode is formed on the surface of the channel region through a gate insulating layer. Thin potential barriers and a potential well are formed in the channel region by at least two amorphous silicon layers. Sharp potential barriers are formed by forming thin amorphous silicon layers, and a field effect transistor utilizing the resonant-tunneling effect with high tunneling efficiency is implemented.

Abstract: A non-volatile semiconductor memory providing a semiconductor substrate including source and drain diffusion regions and a gate electrode, and an insulating film which is at least provided on the semiconductor substrate just below the gate electrode and has a smaller dielectric breakdown strength on the source side than on the drain side, wherein the insulating film is comprised of a laminated film having a multilayer structure on the drain side and a single-layer film or multilayer film which is broken down at a smaller voltage on the source side than on the drain side, and a predetermined voltage is applied to break down the single-layer film or multilayer film on the source side, so that data can electrically be written only once.

Abstract: A light emitting device has an indium gallium arsenide phosphide luminescent layer between a first clad layer of n-type indium phosphide and a second clad layer of p-type indium phosphide, and a strained barrier layer of p-type indium aluminum arsenide is inserted between the luminescent layer and the second clad layer so as to increase the potential barrier therebetween, thereby improving the luminous efficiency and the saturation point of the light output.

Abstract: There is disclosed a heterojunction bipolar transistor (HBT) which operates as either the emitter top mode performance or the collector top mode performance and also operates for low power dissipation due to lower ON voltages. A high gain, ultra-high speed semiconductor device is also disposed which includes a collector top type pnp HBT as a switching transistor and a lateral npn bipolar transistor as a current injection source, together with an integration method thereof which meets high density requirement with simple processes. The HBT is implemented with an InP substrate and a collector or emitter layer of p type In.sub.x Al.sub.1-x As lattice matched at least to the InP substrate, a base layer of n type In.sub.x Ga.sub.1-x As, a first spacer layer interposed between the base and collector and a second spacer layer between the base and emitter, both the spacer layers being made of p type In.sub.x Ga.sub.

Abstract: Disclosed is a photodetector adapted to detect light having a predetermined level of photon energy, comprising: a first semiconductor layer, a second semiconductor layer having a quantum well or a quantum wire structure, a barrier layer provided between the first and second semiconductor layers, a device for applying voltage to the barrier layer and the first and second semiconductor layers in order to generate a tunnel current flowing through the barrier layer, and a device for detecting the tunnel current. The second semiconductor layer exhibits a plurality of quantized electron energy levels, the energy difference between which is slightly smaller or slightly larger than the photon energy of the detected light. Further, incidence of the detected light upon the second semiconductor layer causes the quantized electron energy levels to shift by the photo Stark effect, resulting in variation of the tunnel current.

Abstract: A multi-well diode is disclosed which can be used with other electronic components as an electronic neuron circuit. The multi-well diode has an S-shaped current-voltage characteristic curve at forward bias whereby it remains in a low conductance state until its threshold voltage is exceeded, then switches through an unstable region of its characteristic curve into a high conductance state. The multi-well diode remains in the high conductance state until its bias voltage and current drops below its holding condition, at which time it switches into a low conductance state. The multi-well diode can be used in a pulse-mode input circuit, thereby generating a pulse-mode output signal which can have a different amplitude and frequency than the input signal. Such pulse-mode input circuits can be either excitatory or inhibitory in operation.

Abstract: A double barrier tunnel diode (10) has a quantum well (12), a pair of electron injection layers (16) on either side of the quantum well (12), and a barrier layer (14) between each of the electron injection layers (16) and the quantum well (12), in a strained biaxial epitaxial relationship with the quantum well (12). The material of the quantum well (12) is chosen such that the biaxial strain is sufficient to reduce the energy of heavy holes in the quantum well (12) to less than the energy of the conduction band minimum energy of the electron injection layers (16). Preferably the quantum well (12) is made of gallium antimonide with from about 1 to about 40 atomic percent arsenic alloyed therein, the electron injection layers (16) are made of indium arsenide, and the barrier layers (14) are made of aluminum antimonide.

Abstract: A resonant tunneling diode having a quantum well sandwiched between first and second tunnel barrier layers and the quantum well and tunnel barrier layers sandwiched between an injection layer and a collector layer. The improvement includes a relatively thin layer of semiconductor material sandwiched between either the first tunnel barrier layer and the injection layer or the first tunnel barrier layer and the quantum well. The thin semiconductor layer has a valence band with an energy level lower than the valence band of the first tunnel barrier layer so as to prevent minority carriers from travelling toward the injection layer.