Abstract: An acoustic charge transport device is formed by a process which introduces a process dependent variation in charge carrier density within the device. The acoustic charge transport device includes a transport channel operable to carry charge carriers in response to a surface acoustic wave. In addition, the acoustic charge transport device further includes a backgate for controlling the charge carrier density within the transport channel.

Abstract: A ferroelectric-type nonvolatile semiconductor memory comprising (A) a bit line, (B) a transistor for selection, (C) memory units in the number of N, each memory unit comprising memory cells in the number of M wherein N≧2 and M≧2, and (D) plate lines in the number of M×N, in which the memory units in the number of N are stacked through an insulating interlayer, each memory cell comprises a first electrode, a ferroelectric layer and a second electrode, the first electrodes are in common in each memory unit, and the common first electrode is connected to the bit line through the transistor for selection, and the second electrode of the m-th memory cell in the n-th memory unit is connected to the [(n−1)M+m]-th plate line wherein m=1, 2 . . . M and n=1, 2 . . . N.

Abstract: A high performance unary digital loudspeaker system is disclosed; providing cost-effective and efficient performance, and providing the option to integrate multiple speaker elements or other related circuitry, and comprising a semiconductor substrate (102), an electrode (104) disposed upon the substrate, an insulator element (106) disposed upon the electrode forming a frame of material, an electrically conductive membrane (108) disposed upon the insulator element so as to form a chamber (110) between the electrode and the membrane, the membrane having a flexible support section (112) formed therein, and a control circuit (200) coupled (114, 116) to the membrane and the electrode, and adapted to provide a variable potential therebetween.

Abstract: In a field effect type device having a thin film-like active layer, there is provided a thin film-like semiconductor device including a top side gate electrode on the active layer and a bottom side gate electrode connected to a static potential, the bottom side gate electrode being provided between the active layer and a substrate. The bottom side gate electrode may be electrically connected to only one of a source and a drain of the field effect type device. Also, the production methods therefor are disclosed.

Abstract: A millimeter wave module includes a silicon substrate with first and second cavityes formed by anisotropic etching on the silicon substrate, and a glass substrate having a microstrip filter pattern and microbumps for connecting the glass substrate to the silicon substrate. A filter is provided using an air layer as a dielectric disposed in the first cavity. An MMIC is mounted by the flip chip method over the second air layer. A coplanar waveguide is on the silicon substrate for connecting the filter and MMIC. The filter having low loss is achieved because it has the microstrip structure using air as an insulating layer. Also change in characteristics of the MMIC during mounting is eliminated because the MMIC is protected by contacting air. Accordingly, the millimeter wave module has excellent characteristics and is made using a simple method.

Abstract: A defect removable semiconductor element and the manufacturing method thereof are provided with a protective layer covering fuses exposed at a part of the redundancy memory cell region, the layer being thinner than the one covering the main memory cell region, so that a predetermined fuse is cut off for removing a defect without damaging adjacent fuses even if the amount of energy of laser beam to be applied is greater and the size of the spot to be focused is bigger, thereby improving operational conditions in the energy of the laser beam to be applied and the size of a spot to be focused and the operational reliability in removing a defect.

Abstract: A variable conductance device having a first source region and a first drain region in a semiconductor substrate. A first channel region connects the first source and the first drain regions. A first resistive layer overlies the first channel region and has first and second electrical contacts spaced apart from one another thereon. The conductance of the path between the first source region and the first drain region depends on the current flowing between the first and second electrical contacts. By adding a FET having its gate and source shorted together to the variable conductance device, a device having the current gain characteristics of a bipolar transistor is obtained. The first drain region is connected to the drain of the FET and the source of the FET is connected to the second electrical contact. The precise form of the current transfer function can be altered by connecting a number of variable conductance devices according to the present invention in parallel.

Abstract: A solid state image pick-up device is disclosed in which potential wells formed between adjacent ones of charge transfer electrodes of a vertical charge transfer portion thereof, formed between adjacent ones of charge transfer electrodes of a horizontal charge transfer portion and formed in a connecting region between the vertical and horizontal charge transfer portions are uniformalized. Impurity densities of regions between the charge transfer electrodes of the vertical charge transfer portion thereof, between the charge transfer electrodes of the horizontal charge transfer portion and in a connecting region between the vertical and horizontal charge transfer portions are set independently from each other on the basis of the inter-electrode distances and amplitudes and potentials of driving pulses supplied these electrodes such that these potential wells become equal to each other.

Abstract: In a charge coupled device, trap levels formed by insulating layers or floating electrodes are formed on a semiconductor layer or a semiconductor substrate. Stationary charges are trapped in some of the trap levels or floating electrodes. The charge transfer electrodes are in self-alignment with potential barrier regions.

Abstract: The present invention is directed to an improved CCD utilizing a potential gradient along the lengths of the various channels of the CCD during charge transfer to cause generated electrical charge to migrate along the length of the channel to a summing well. The potential gradient is formed by biasing the opposing ends of the electrodes overlying the lengths of the various channels with different voltages.

Abstract: Protection circuits for preventing an internal circuit on a semiconductor substrate from destroying due to an excess voltage are formed on the output end and input end of an internal circuit. The protection circuit on the input end has a gate electrode comprised of a band-like conductive film. This gate electrode is grounded and has a shape zigzagging in a waveform with crests and troughs alternately appearing in a planar view. A drain diffusion layer connected to an output end of the internal circuit is formed in one of two diffusion regions of the surface of the semiconductor substrate that are defined by the gate electrode, and a source diffusion layer grounded is formed in the other region. The source diffusion layer and the drain diffusion layer are formed integral with each other, so that the protection circuit on the input end is substantially constituted of one buffer transistor.

Abstract: A charge transferring apparatus comprising, e.g., a buried type charge coupled device in which a pair of transfer electrodes located at the most downstream point of a charge transfer direction is driven by a drive pulse other than that for any other pair of transfer electrodes and a potential well formed at the pair of the transfer electrodes located at the most downstream point is made shallower than that at any other pair of transfer electrodes allowing the output dynamic range of a charge transfer device to be increased for improving the output quality.

Abstract: A transistor in accordance with the invention comprises an ultra-thin Mo--C film functioning as a channel for an electron flow with two ends of the thin metal film functioning as source and drain terminals of the transistor, respectively; a piezoelectric film formed on the Mo--C film, for producing a force in accordance with an applied electric field provided by a gate voltage; and an electrode film formed on the piezoelectric film functioning as a gate of the transistor to which the gate voltage is applied to produce the applied electric field; and wherein a resistance of the Mo--C film between the source and drain terminals changes in accordance with the force produced in response to the applied gate voltage. This transistor can be used as an element of the three dimensional integrated circuit with a laminated structure.

Abstract: A charge transfer device is disclosed in which the number of transfer clocks can be decreased, and also, power consumption, the heating amount and parasitic emissions are also reduced. Three groups of electrodes are repeatedly disposed in an alternating sequence above an N-type channel (transfer channel). Among the three groups of electrodes, a predetermined DC bias voltage supplied from a DC power supply is applied to one group of electrodes. Between the remaining two groups of electrodes, a single-phase transfer clock H.phi. supplied from the exterior of the device is directly applied to one group of electrodes, while a transfer clock H.phi.' produced by delaying the transfer clock H.phi. by a predetermined delay time in a delay circuit is applied to the other group of electrodes. Also disclosed is a solid-state imaging apparatus using the above-described charge transfer device.

Abstract: A metal-semiconductor type field effect transistor has a Y-letter shaped gate electrode standing on an active layer, and the Y-letter shaped gate electrode prevents piezoelectric charges induced beneath both ends of the wing portions thereof from undesirable merger so as to restrict variation of the threshold regardless of the orientation of the Y-letter shaped gate electrode.

Abstract: In a CCD type solid state image pickup device including two-dimensionally arranged photo/electro conversion portions, a plurality of vertical shift registers each connected to one column of the photo/electro conversion portions, and a horizontal transfer portion connected to the vertical shift register, signal charges of every four of each column of the photo/electro conversion portions are mixed within the vertical shift registers or within the vertical transfer portions and the horizontal output register, to create a mixed signal charge. Then, the mixed signal charge corresponding to four of the photo/electro conversion portions is transferred within the horizontal output register. Thus, one scanning line is formed by every four rows of the photo/electro conversion portions.

Abstract: In accordance with the invention, a full frame solid-state image sensor of altered accumulation potential comprises a substrate that includes a semiconductor of one conductivity type and has a surface at which is situated a photodetector that comprises a first storage area and a second storage area. The first and second storage areas each comprise a CCD channel of conductivity type opposite to the conductivity type of the semiconductor. A first barrier region separates the first storage area from the second storage area, and a second barrier region separates the second storage area from an adjacent photodetector; the second barrier region is shallower than the first barrier region. Adjacent to one side of the photodetector is a channel stop of the same conductivity type as the semiconductor.

Abstract: A heterostructure electron emitter including a substrate having a surface with a predetermined potential barrier and a quantum well formed in the substrate adjacent the surface. Contacts are positioned on the substrate for coupling free electrons to the substrate and into the quantum well. An acoustic wave device is positioned on the substrate so as to direct acoustic waves to strike the free electrons in the quantum well and excite the free electrons sufficiently to cause the free electrons to overcome the potential barrier and to be emitted from the surface of the substrate.

Abstract: A complementary acoustic charge transport circuit element comprises first and second buried channels. Each of the channels is comprised of a piezoelectric semiconductor and each channel has a source through which charge is injected and a drain through which charge is extracted. A transducer propagates an acoustic wave through each channel and the propagated waves transport the charge between the sources and the drains. A source and/or a drain of one channel is connected in parallel with the corresponding souce and/or drain of the other channel. The waves are complementary at the interconnected ones of the sources and/or the drains.

Abstract: A solid state imaging device which reduces the occurrence of crosstalk between a plurality of picture elements arranged in a linear or matrix form. The solid state imaging device includes a plurality of photosensitive cells formed on a first principal surface of a semiconductor substrate, a transfer electrode formed in a gap area among the cells on the first principal surface to read out charges produced in the cells, a drive metal wiring formed on the transfer electrode within the gap area, a first insulating film covering the cells with a predetermined thickness, and a plurality of metal reflecting films formed on the first insulating film in such a manner that the whole surface of each of the metal reflecting films forms a reflecting surface substantially parallel to a surface of each of the cells on the side of the first principal surface whereby light passed through the photosensitive cells from a side opposite to the first principal surface is reflected back to each of the photosensitive cells.

Abstract: The present invention is directed to a charge transfer device formed on a semiconductor substrate which comprises a channel region formed on the semiconductor substrate, at least a set of transfer gate electrodes formed adjacent to each other and insulated from each other, the set of transfer gate electrode formed over the channel region through an insulating film, clock means for providing the transfer gate electrode with multiple clock pulses, and a plurality of resistors provided between each of the transfer gate electrodes and the clock means, the resistors having respective values corresponding to capacitances of the transfer gate electrodes. Therefore, a transfer efficiency of signal charges can be improved without reducing a maximum amount of signal charges handled by a vertical register.

Abstract: A HACT device employing a thin-film overlay of a more strongly piezoelectric material can operate as a delay line and as a tapped delay line, or transversal filter, while requiring less total power for the SAW clock signal. The increased electrical potential per unit total SAW power thus realized facilitates coupling between the total SAW energy and the mobile charge carriers. Some materials systems, such as a GaAs substrate and a ZnO thin-film overlay, will require an intervening thin-film dielectric layer in between the HACT substrate and epitaxial layers and the thin-film piezoelectric overlay. This may be necessitated by chemical, semiconductor device processing, or adhesion incompatibilities between the substrate material and the thin-film overlay material.

Abstract: A novel heterostructure acoustic charge transport (HACT) device is disclosed which displays both electron and hole transport. The device includes a transducer fabricated on a substrate structure that launches surface acoustic waves. An optional reflector is formed in the substrate structure at an end portion adjacent to the transducer for reflecting the surface acoustic waves. Also included is an electrode configured with the transport channel at an end thereof distal to the transducer for generating electrical signal equivalents of the propagating electrode charge. The device makes use of both the conduction band quantum well to transport electrons and the valance band quantum well to transport holes. In this manner the sampling, processing and detection frequencies of the device can be doubled.

Abstract: A monolithic integrated circuit device combines integrated heterostructure acoustic charge transport (HACT) devices and heterostructure insulated gate field effect transistor (HIGFET) devices in a single structure in which the HACT and HIGFET layers are grown in as a contiguous composite heterostructure.

Abstract: An improved CCD image sensor which contains a plurality of photodetectors is provided with a transfer gate and uses a CCD as a scanner for reading signals, and having photo diodes which are connected consecutively to both the left and right sides of VCCD region and, in the parts without VCCD region, are disposed repeatedly parallel to each other separated by an interval of the width of the channel stop region. A 4 phase clock signal consisting of 4 fields is used for operation of said CCD image sensor. The resultant CCD image sensor has an increased photodetector area which can provide high resolution of video.

Abstract: A heterojunction acoustic charge transport (HACT) device having a charge transport layer 16 surrounded by upper and lower charge confinement layers 14,30, respectively, and having a cap layer 36 at the outer surface, above the upper confinement layer 30, is provided with a P-N junction to minimize the effects of surface states. An intermediate layer 34 is disposed between the cap layer 36 and upper charge confinement layer 30. The upper confinement layer 30 and intermediate layer 34 are doped with opposite polarities to provide a P-N junction which creates a built-in electric field having sufficient strength to keep mobile charge carriers, transported by a SAW along the charge transport channel, from being trapped by or recombined with surface states at the external interface of the cap layer 36. Alternatively, the intermediate layer is not present and a cap layer 42 is doped to provide one side of the P-N junction.

Abstract: A sampling device operating as a buffer between a first data signal and a relatively slow processing device accepts the input signal and stores samples of it on a SAW traveling past an input electrode. A blocking potential is applied to a set of electrodes to store a set of charge packets with the SAW device. Packets are consecutively released at a slower rate accommodated to the needs of the next processing unit in line, to read out the sampled signal at a modified rate for intentional distortion of the input signal, for slowing the output stored signal rate, or for time reversal of the signal.

Abstract: A high speed analog to digital converter system employs a set of ACT devices in parallel to buffer a high speed data sampling rate to the processing rate of the analog to digital converters employed. Vernier control of phase between individual devices is maintained by controlling the speed of propagation of the SAW wave by illumination of the substrate in response to a phase comparison between the SAW and a reference signal.

Abstract: A transversal filter comprises an acoustic charge transport device comprising an input contact for introducing a signal into a buried channel through which the signal is transported by a high frequency acoustic wave and a plurality of non-destructive sense electrodes overlying the channel for successively sampling the signal. A memory device is provided for storing a plurality of tap weight signals, with each tap weight signal for being associated with one of the electrodes. A multiplier system is operably connected with each of the electrodes and with the storage device for generating the product of the signal sampled at each electrode and the associated tap weight signal. A summer is operably associated with the multiplier for summing the products and thereby generating an output signal.

Abstract: An interline transfer or frame interline transfer CCD solid image sensor is adapted to read out signal charges from light receiving sections of a matrix array by means of vertical charge transfer sections and horizontal charge transfer sections. A plurality of horizontal charge transfer sections are formed for lowering the horizontal transfer frequency. The voltage transition in the transfer gate across the horizontal charge transfer sections is caused to occur stepwise or temporally slowly to improve the transfer efficiency across the horizontal charge transfer sections. A smear drain region for sweeping out unnecessary charges is formed along the horizontal charge transfer sections. The transfer electrode of the horizontal charge transfer sections connected to the busline wiring is patterned to clear contact holes provided in the smear drain region to provide for positive overflow without increasing the chip area.

Abstract: A solid-state image pick-up device is fabricated on a p-type semiconductor substrate, and having a plurality of photo-electric converters respectively having n-type impurity regions and formed in a surface portion of the semiconductor substrate at spacings, a shift register having an n-type charge transfer region separated from the n-type impurity regions by respective channel forming regions, a thin insulating film covering the channel forming regions and outlet subregions of the n-type impurity regions, and a transfer gate electrode extending on the thin insulating film, wherein the transfer gate electrode is shaped in such a manner as to create an electric field over each outlet subregion and the associated channel forming region so that carriers are accelerated from each outlet subregion through the associated channel forming region to the shift register.

Abstract: A structure of a solid-state image sensing device applicable to an HDVS is disclosed in which at least one of the transmission paths for the drive pulses used for driving vertical registers and horizontal registers can achieve reduced propagation delays and signal distortions of the drive pulses. In the first preferred embodiment, a control gate for controlling the transfer of signal charges between the horizontal registers is constituted by a first polycrystalline silicon layer, a metal wiring layer is formed and is connected to the first polycrystalline silicon layer via contact regions and transfer electrodes provided for driving the horizontal registers are constituted by second and third semiconductor layers placed between the first polycrystalline silicon layer and the metal wiring layer without contacting the contact regions.

Abstract: A linear acoustic charge transport circuit including an acoustic charge transport (ACT) device and a transconductance amplifier. In one embodiment the ACT device includes a bipolar injector. The ACT device can comprise either a thick channel ACT or a heterojunction ACT.

Abstract: Described is a new high performance CCD image sensor technology which can be used to build a versatile image sensor family with the sensors that have high resolution and high pixel density. The described sensor architectures are based on a new charge super sweep concept which was developed to overcome such common problems as blooming and the image smear. The charge super sweep takes place in very narrow vertical channels located between the photosites similar to the Interline Transfer CCD devices. The difference here is that the charge is never stored in these regions for any significant length of time and is swept out using a new resistive gate traveling wave sweeping technique. The charge super sweep approach also allows the fast charge transfer of several lines of data from the photosites located anywhere in the array into the buffer storage during a single horizontal blanking interval.

Abstract: A charge transfer device includes a pair of charge transfer registers which receive signal charges from a photo sensor cell array and which transfer the received signal charges in the same direction along the charge tranfer registers, and a floating diffusion type charge reading section for reading the signal charges alternately from final stages of the pair of charge transfer registers. A signal charge detection circuit includes an output gate assembly provided between the final stage of each of the pair of charge transfer registers and a floating diffusion. A reading circuit operates to cause the signal charges alternately read from the final stages of the pair of charge transfer registers, to flow through a single channel under formed the output gate assembly, into the floating diffusion. An electric field is formed in the channel formed under the output gate assembly, so as to forcibly guide the signal charge from the final stage of each of the pair of charge transfer registers to the floating diffusion.

Abstract: An Acoustic Charge Transport Imager, suitable for use as a High Definition Television (HDTV) camera element, is disclosed in which an array of amorphous hydrogenated silicon based avalanche photodiodes are combined with acoustic charge transport channels in a GaAs substrate, to achieve very high speed read out of photogenerated charge. High speed read out allows the fabrication of detector arrays large enough to meet the resolution requirements of HDTV while ensuring operation within the timing constraints of the HDTV frame rate.