Employing Resonant Tunneling Patents (Class 257/25)
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Patent number: 7034331Abstract: The tunnel junction structure comprises a p-type tunnel junction layer of a first semiconductor material, an n-type tunnel junction layer of a second semiconductor material and a tunnel junction between the tunnel junction layers. At least one of the semiconductor materials includes gallium (Ga), arsenic (As) and either nitrogen (N) or antimony (Sb). The probability of tunneling is significantly increased, and the voltage drop across the tunnel junction is consequently decreased, by forming the tunnel junction structure of materials having a reduced difference between the valence band energy of the material of the p-type tunnel junction layer and the conduction band energy of the n-type tunnel junction layer.Type: GrantFiled: June 4, 2004Date of Patent: April 25, 2006Assignee: Agilent Technologies, Inc.Inventors: Ying-Lan Chang, Ashish Tandon, Michael H. Leary, Michael R. T. Tan
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Patent number: 7026642Abstract: The disclosed embodiments relate to a vertical tunneling transistor that may include a channel disposed on a substrate. A quantum dot may be disposed so that an axis through the channel and the quantum dot is substantially perpendicular to the substrate. A gate may be disposed so that an axis through the channel, the quantum dot and the gate is substantially perpendicular to the substrate.Type: GrantFiled: August 27, 2003Date of Patent: April 11, 2006Assignee: Micron Technology, Inc.Inventor: Gurtej S. Sandhu
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Patent number: 7008806Abstract: Disclosed is a method of determining causes of intrinsic oscillations in a double-barrier quantum-well intrinsic oscillator comprising developing an emitter quantum-well (EQW) from a double-barrier quantum-well system (DBQWS); coupling the EQW to a main quantum-well (MQW), wherein the MQW is defined by double-barrier heterostructures of a resonant tunneling diode; using energy subband coupling to induce quantum-based fluctuations in the EQW; creating intrinsic oscillations in electron density and electron current in the DBQWS; forming a distinct subband structure based on the intrinsic oscillations; and identifying a THz-frequency signal source based on the quantum-based fluctuations, wherein the intrinsic oscillations comprise maximum subband coherence, partial subband coherence, and minimum subband coherence, wherein the energy subband is a quantum mechanical energy subband, wherein the intrinsic oscillations occur proximate to a bias voltage point in the range of 0.224 V and 0.Type: GrantFiled: August 24, 2004Date of Patent: March 7, 2006Assignee: The United States of America as represented by the Secretary of the ArmyInventors: Peiji Zhao, Dwight Woolard
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Patent number: 7005670Abstract: In a method of fabricating a thin film transistor array substrate, an aluminum-based conductive layer is deposited onto an insulating substrate, and patterned to form a gate line assembly. The gate line assembly includes gate lines, gate electrodes, and gate pads. A gate insulating layer is formed on the substrate with the gate line assembly. A semiconductor layer, and an ohmic contact layer are sequentially formed on the gate insulating layer. A double-layered conductive film with a chrome-based under-layer and an aluminum-based over-layer is deposited onto the substrate, and patterned to form a data line assembly. The data line assembly includes data lines crossing over the gate lines, source electrodes, drain electrodes, and data pads. The chrome-based under-layer of the conductive film is patterned through dry etching while using Cl2 or HCl as the dry etching gas.Type: GrantFiled: June 28, 2005Date of Patent: February 28, 2006Assignee: Samsung Electronics Co., Ltd.Inventors: Sang-Gab Kim, Mun-Pyo Hong
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Patent number: 7002175Abstract: A double barrier resonant tunneling diode (RTD) is formed and integrated with a level of CMOS/BJT/SiGe devices and circuits through processes such as metal-to-metal thermocompressional bonding, anodic bonding, eutectic bonding, plasma bonding, silicon-to-silicon bonding, silicon dioxide bonding, silicon nitride bonding and polymer bonding or plasma bonding. The electrical connections are made using conducting interconnects aligned during the bonding process. The resulting circuitry has a three-dimensional architecture. The tunneling barrier layers of the RTD are formed of high-K dielectric materials such as SiO2, Si3N4, Al2O3, Y2O3, Ta2O5, TiO2, HfO2, Pr2O3, ZrO2, or their alloys and laminates, having higher band-gaps than the material forming the quantum well, which includes Si, Ge or SiGe. The inherently fast operational speed of the RTD, combined with the 3-D integrated architecture that reduces interconnect delays, will produce ultra-fast circuits with low noise characteristics.Type: GrantFiled: October 8, 2004Date of Patent: February 21, 2006Assignee: Agency for Science, Technology and ResearchInventors: Jagar Singh, Yong Tian Hou, Ming Fu Li
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Patent number: 6974967Abstract: A quantum logic gate utilizes an inter-polarization (dipole—dipole) interaction between excitons having polarization in semiconductor quantum well structures, or a spin exchange interaction between spin polarized excitons in the semiconductor quantum well structures. Problems associated with conventional semiconductor quantum well structures are solved in that a phase relaxation time is very short because of using inter-subband electrons, and that there is no usable ultrashort optical pulse laser technology because a subband transition wavelength is in a far-infrared region and hence ultra fast control is impossible.Type: GrantFiled: June 8, 2005Date of Patent: December 13, 2005Assignee: National Institute of Advanced Industrial Science and TechnologyInventor: Kazuhiro Komori
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Patent number: 6967347Abstract: An assembly includes a first electrical circuitry for providing a first electrical signal containing data and a transmitting arrangement, connected with the first electrical circuitry, for receiving the first electrical signal and for converting the first electrical signal into an electromagnetic signal containing at least a portion of the data. The electromagnetic signal has a carrier frequency greater than 300 GHz. The assembly also includes a receiving arrangement for receiving the electromagnetic signal and for converting the electromagnetic signal into a second electrical signal containing at least some of the portion of the data, and a second electrical circuitry connected with the receiving arrangement and configured for receiving the second electrical signal.Type: GrantFiled: June 14, 2003Date of Patent: November 22, 2005Assignee: The Regents of the University of ColoradoInventors: Michael J. Estes, Garret Moddel
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Patent number: 6952019Abstract: An electron device which controls quantum chaos wherein a quantum chaos property is controlled extensively and externally is provided. The electron device which controls quantum chaos is manufactured by using a single material. A heterojunction provided with a first region having an electron system characterized by quantum chaos and a second region having an electron system characterized by integrability is formed. The first region and the second region are adjacent to each other, and the heterojunction is capable of exchanging electrons between the first region and the second region. A quantum chaos property of an electron system in a system formed of the first region and the second region is controlled by applying to the heterojunction an electric field having a component perpendicular to at least a junction surface.Type: GrantFiled: February 18, 2004Date of Patent: October 4, 2005Assignee: Sony CorporationInventor: Ryuichi Ugajin
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Patent number: 6943367Abstract: In a method of fabricating a thin film transistor array substrate, an aluminum-based conductive layer is deposited onto an insulating substrate, and patterned to form a gate line assembly. The gate line assembly includes gate lines, gate electrodes, and gate pads. A gate insulating layer is formed on the substrate with the gate line assembly. A semiconductor layer, and an ohmic contact layer are sequentially formed on the gate insulating layer. A double-layered conductive film with a chrome-based under-layer and an aluminum-based over-layer is deposited onto the substrate, and patterned to form a data line assembly. The data line assembly includes data lines crossing over the gate lines, source electrodes, drain electrodes, and data pads. The chrome-based under-layer of the conductive film is patterned through dry etching while using Cl2 or HCl as the dry etching gas.Type: GrantFiled: March 25, 2003Date of Patent: September 13, 2005Assignee: Samsung Electronics Co., Ltd.Inventors: Sang-Gab Kim, Mun-Pyo Hong
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Patent number: 6929987Abstract: In a method of forming a semiconductor device with a first channel layer formed over a portion of a second channel layer, a portion of the second channel underlying the first channel is etched so as to form an overhanging ledge in the first channel, and then a metallic contact disposed on top of the ledge portion is diffused into the first channel by ohmic alloying to form an electrode in the first channel.Type: GrantFiled: December 23, 2003Date of Patent: August 16, 2005Assignee: HRL Laboratories, LLCInventor: Jeong-Sun Moon
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Patent number: 6924501Abstract: A quantum logic gate utilizes an inter-polarization (dipole-dipole) interaction between excitons having polarization in semiconductor quantum well structures, or a spin exchange interaction between spin polarized excitons in the semiconductor quantum well structures. Problems associated with conventional semiconductor quantum well structures are solved in that a phase relaxation time is very short because of using inter-subband electrons, and that there is no usable ultrashort optical pulse laser technology because a subband transition wavelength is in a far-infrared region and hence ultra fast control is impossible.Type: GrantFiled: September 26, 2002Date of Patent: August 2, 2005Assignee: National Institute of Advanced Industrial Science and TechnologyInventor: Kazuhiro Komori
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Patent number: 6882100Abstract: A light device includes an electron supply defining an emitter surface. A dielectric tunneling layer is disposed between the electron supply and a cathode layer. The cathode layer has at least partial photon transparency that is substantially uniform across the emitter surface.Type: GrantFiled: January 6, 2003Date of Patent: April 19, 2005Assignee: Hewlett-Packard Development Company, L.P.Inventors: Zhizhang Chen, Sriram Ramamoorthi, Terry E McMahon, Timothy F. Myers
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Patent number: 6881984Abstract: A resonant-cavity light-emitting diode includes a semiconductor light-emitting layer sandwiched between an under and an upper semiconductor distributed Bragg reflector mirror layer, which are formed on the substrate, a light extracting section formed on the upper semiconductor distributed Bragg reflector mirror layer and having an opening to extract light from the semiconductor light-emitting layer, and a groove formed by removing portions of the semiconductor light-emitting layer, under and upper semiconductor distributed Bragg reflector mirror layers which lie in a peripheral portion of the opening of the light extraction section and reach the under semiconductor distributed Bragg reflector mirror layer, the inner wall of the groove being formed to reflect part of light emitted from the semiconductor light-emitting layer into the groove.Type: GrantFiled: September 12, 2003Date of Patent: April 19, 2005Assignee: Kabushiki Kaisha ToshibaInventor: Keiji Takaoka
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Patent number: 6864501Abstract: A photon source includes a photon source body including quantum dots, a non-insulating layer overlying and in contact with the quantum dots, and an electrical contact that allows electrically activated emission of radiation from at least one of the quantum dots. An active region is defined within the photon source body such that emission is only collected from a dot or a limited number of dots within the active region.Type: GrantFiled: October 2, 2002Date of Patent: March 8, 2005Assignee: Kabushiki Kaisha ToshibaInventors: Andrew James Shields, Richard Mark Stevenson, Beata Ewa Kardynal, Zhiliang Yuan
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Patent number: 6853022Abstract: A semiconductor memory device having as its main storage portion a capacitor storing charges as binary information and an access transistor controlling input/output of the charges to/from the capacitor, and eliminating the need for refresh, is obtained. The semiconductor memory device includes a capacitor with a storage node located above a semiconductor substrate and holding the charges corresponding to a logical level of stored binary information, an access transistor located on the semiconductor substrate surface and controlling input/output of the charges accumulated in the capacitor, and a latch circuit located on the semiconductor substrate and maintaining a potential of the capacitor storage node. At least one of circuit elements constituting the latch circuit is located above the access transistor.Type: GrantFiled: January 29, 2003Date of Patent: February 8, 2005Assignee: Renesas Technology Corp.Inventors: Tsuyoshi Koga, Yoshiyuki Ishigaki, Motoi Ashida, Yukio Maki, Yasuhiro Fujii, Tomohiro Hosokawa, Takashi Terada, Makoto Dei, Yasuichi Masuda
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Patent number: 6849867Abstract: A radiation emitting device of the present invention includes at least one radiation emitter, first and second electrical leads electrically coupled to the radiation emitter, and an integral encapsulant configured to encapsulate the radiation emitter and a portion of the first and second electrical leads. The encapsulant has at least a first zone and a second zone, where the second zone exhibits at least one different characteristic from the first zone. Such different characteristics may be a physical, structural, and/or compositional characteristic. Preferably, the at least one different characteristic includes at least one of the following: mechanical strength, thermal conductivity, thermal capacity, coefficient of thermal expansion, specific heat, oxygen and moisture impermeability, adhesion, and transmittance with respect to radiation emitted from the radiation emitter. The radiation emitter may be in a form of an emitter, and is preferably an LED.Type: GrantFiled: January 8, 2003Date of Patent: February 1, 2005Assignee: Gentex CorporationInventors: John K. Roberts, Spencer D. Reese
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Patent number: 6835949Abstract: An assembly includes a device for receiving at least one input to produce an output. An antenna supports the device to transfer the input to the device and further to transfer the output from the device such that the antenna supports a selected one of the input and the output as a high frequency current. The antenna includes a peripheral configuration which confines high frequency current to at least one dominant path to oscillate therein. The other one of the input and the output is a lower frequency signal present at least generally throughout the antenna. At least one port is positioned away from the dominant path to isolate the lower frequency signal from high frequency current in the dominant path. The antenna is configured to support the lower frequency signal having a frequency in a low frequency range including zero to several terahertz.Type: GrantFiled: August 29, 2003Date of Patent: December 28, 2004Assignee: The Regents of the University of ColoradoInventors: Manoja D. Weiss, Blake J. Eliasson, Garret Moddel
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Patent number: 6833556Abstract: A transistor includes a semiconductor channel disposed nearby a gate and in an electrical path between a source and a drain, wherein the channel and at least one of the source or the drain are separated by an interface layer so as to form a channel-interface layer-source/drain junction in which a Fermi level of the semiconductor channel is depinned in a region near the junction and the junction has a specific contact resistance of less than approximately 1000 &OHgr;-&mgr;m2. The interface layer may include a passivating material such as a nitride, a fluoride, an oxide, an oxynitride, a hydride and/or an arsenide of the semiconductor of the channel. In some cases, the interface layer consists essentially of a monolayer configured to depin the Fermi level of the semiconductor of the channel, or an amount of passivation material sufficient to terminate all or a sufficient number of dangling bonds of the semiconductor channel to achieve chemical stability of the surface.Type: GrantFiled: January 14, 2003Date of Patent: December 21, 2004Assignee: Acorn Technologies, Inc.Inventors: Daniel E. Grupp, Daniel J. Connelly
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Patent number: 6822266Abstract: A semiconductor light-emitting device includes an active layer having a single quantum well structure. The single quantum well structure enables a high-speed response such that the rise and fall time is 2.1 nsec. Further, the single quantum well active layer is doped with Zn at a concentration of 8×1017 cm−3. Thereby, the half-value width of the light-emitting spectrum is 25 nm or more, which is wider than in the case of no doping. Thus, temperature dependence of an optical output is reduced.Type: GrantFiled: May 24, 2002Date of Patent: November 23, 2004Assignee: Sharp Kabushiki KaishaInventors: Takahisa Kurahashi, Hiroshi Nakatsu, Tetsurou Murakami, Shouichi Ohyama
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Patent number: 6819695Abstract: A multi-layer dopant diffusion barrier is disclosed that effectively prevents dopant diffusion but does not contribute to parasitic pn junctions or parasitic capacitance. A multi-layer dopant diffusion barrier layer prevents dopant diffusion.Type: GrantFiled: March 31, 2000Date of Patent: November 16, 2004Assignee: TriQuint Technology Holding CoInventors: Yuliya Anatolyevna Akulova, Michael Geva, Abdallah Ougazzaden
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Publication number: 20040217343Abstract: The tunnel junction structure comprises a p-type tunnel junction layer of a first semiconductor material, an n-type tunnel junction layer of a second semiconductor material and a tunnel junction between the tunnel junction layers. At least one of the semiconductor materials includes gallium (Ga), arsenic (As) and either nitrogen (N) or antimony (Sb). The probability of tunneling is significantly increased, and the voltage drop across the tunnel junction is consequently decreased, by forming the tunnel junction structure of materials having a reduced difference between the valence band energy of the material of the p-type tunnel junction layer and the conduction band energy of the n-type tunnel junction layer.Type: ApplicationFiled: June 4, 2004Publication date: November 4, 2004Inventors: Ying-Lan Chang, Ashish Tandon, Michael H. Leary, Michael R. T. Tan
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Publication number: 20040201010Abstract: An electron device which controls quantum chaos wherein a quantum chaos property is controlled extensively and externally is provided. The electron device which controls quantum chaos is manufactured by using a single material. A heterojunction provided with a first region having an electron system characterized by quantum chaos and a second region having an electron system characterized by integrability is formed. The first region and the second region are adjacent to each other, and the heterojunction is capable of exchanging electrons between the first region and the second region. A quantum chaos property of an electron system in a system formed of the first region and the second region is controlled by applying to the heterojunction an electric field having a component perpendicular to at least a junction surface.Type: ApplicationFiled: February 18, 2004Publication date: October 14, 2004Inventor: Ryuichi Ugajin
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Publication number: 20040201008Abstract: A coupled quantum well Mach-Zehnder modulator that employs a push-pull structure to reduce the modulation voltage. The Mach-Zehnder modulator includes a first arm having a first PIN semiconductor device and a second arm having a second PIN semiconductor device. The intrinsic layers of the PIN devices include a coupled quantum well structure to provide an opposite index of refraction change for different DC bias voltages. An RF signal used to modulate the light beam is applied to the two arms in phase and causes the index of refraction in the intrinsic layers of the two PIN devices to change in opposite directions so that a push-pull type drive is achieved without requiring 180° out-of-phase RF drive signal.Type: ApplicationFiled: April 10, 2003Publication date: October 14, 2004Inventors: Elizabeth T. Kunkee, David V. Forbes, David C. Scott, Timothy A. Vang, Wenshen Wang
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Patent number: 6803598Abstract: Interband tunnel diodes which are compatible with Si-based processes such as, but not limited to, CMOS and SiGe HBT fabrication. Interband tunnel diodes are disclosed (i) with spacer layers surrounding a tunnel barrier; (ii) with a quantum well adjacent to, but not necessarily in contact with, one of the injectors, and (iii) with a first quantum well adjacent to, but not necessarily in contact with, the bottom injector and a second quantum well adjacent to, but not necessarily in contact with, the top injector. Process parameters include temperature process for growth, deposition or conversion of the tunnel diode and subsequent thermal cycling which to improve device benchmarks such as peak current density and the peak-to-valley current ratio.Type: GrantFiled: May 5, 2000Date of Patent: October 12, 2004Assignee: University of DelawareInventors: Paul R. Berger, Phillip E. Thompson, Roger Lake, Karl Hobart, Sean L. Rommel
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Patent number: 6794673Abstract: An amorphous silicon thin film includes a plastic substrate as a base, and insulating layers are formed thereon each radiated with a pulse laser beam which removes volatile contaminants like a resist as a pretreatment. A protective layer including a gas barrier layer and a refractory buffer layer is formed on the substrate. Gas penetration from the substrate to the amorphous silicon film is thereby prevented. Conduction of heat produced by energy beam radiation to the substrate is prevented as well. it is possible to increase energy intensity of energy beam radiated for the polycrystallization of the amorphous silicon film to the optimal value for perfect polycrystallization.Type: GrantFiled: December 11, 2001Date of Patent: September 21, 2004Assignee: Sony CorporationInventors: Dharam Pal Gosain, Jonathan Westwater, Miyako Nakagoe, Setsuo Usui, Kazumasa Nomoto
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Publication number: 20040171177Abstract: A method for forming a uniform layered structure comprising an ultra-thin layer of amorphous silicon and its thermal oxide is disclosed. In one aspect, a method for forming a nanolaminate of silicon oxide on a substrate is disclosed. In another aspect, a method for forming a patterned hard mask on a substrate is disclosed. The patterned hard mask includes a nanolaminate of silicon and silicon oxide. The methods are characterized by the oxidation of an amorphous silicon layer using atomic oxygen.Type: ApplicationFiled: March 4, 2004Publication date: September 2, 2004Inventors: Omer H. Dokumaci, Oleg Gluschenkov, Michael Belyanksy, Bruce B. Doris
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Patent number: 6768131Abstract: The invention uses the optical nonlinearity of electrically biased exciton polariton in a strong coupling regime or exciton polariton in a strong coupling regime with spatially separated electron and hole pairs. The method comprises providing a signal light (1300) to an exciton polariton system in a strong coupling regime and excitons with spatially separated electron and hole pairs, providing a control light (1302) to the exciton polariton system and removing the control light (1302). Various applications are available, including optical turnstiles, all-optical switches, all-optical phase retardation, low-power saturable transmitters and mirrors. In addition, the applications may operate at single- or few-photon levels.Type: GrantFiled: May 29, 2002Date of Patent: July 27, 2004Assignee: The Regents of the University of CaliforniaInventor: Mathilde RĂĽfenacht
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Patent number: 6765303Abstract: A SRAM cell includes a single FinFET and two resonant tunnel diodes. The FinFet has multiple channel regions formed from separate fins. The resonant tunnel diodes may be formed from FinFET type fins. In particular, the resonant diodes may includes a thin, undoped silicon region surrounded by a dielectric. The SRAM cell is small and provides fast read/write access times.Type: GrantFiled: May 6, 2003Date of Patent: July 20, 2004Assignee: Advanced Micro Devices, Inc.Inventors: Zoran Krivokapic, Judy Xilin An, Matthew S. Buynoski
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Patent number: 6765238Abstract: The tunnel junction structure comprises a p-type tunnel junction layer of a first semiconductor material, an n-type tunnel junction layer of a second semiconductor material and a tunnel junction between the tunnel junction layers. At least one of the semiconductor materials includes gallium (Ga), arsenic (As) and either nitrogen (N) or antimony (Sb). The probability of tunneling is significantly increased, and the voltage drop across the tunnel junction is consequently decreased, by forming the tunnel junction structure of materials having a reduced difference between the valence band energy of the material of the p-type tunnel junction layer and the conduction band energy of the n-type tunnel junction layer.Type: GrantFiled: September 12, 2002Date of Patent: July 20, 2004Assignee: Agilent Technologies, Inc.Inventors: Yin-Lan Chang, Ashish Tandon, Michael H. Leary, Michael R. T. Tan
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Patent number: 6762071Abstract: A method for fabricating an electron tunneling device on a substrate includes forming a first non-insulating layer on the substrate and providing a first amorphous layer. The method further includes the steps of providing a second layer, and forming a second non-insulating layer and providing an antenna structure connected with the first and second non-insulating layers. The second layer of material is configured to cooperate with the first amorphous layer such that the first amorphous layer and the second layer of material together serve as a transport of electrons between and to the first and second non-insulating layers, and the transport of electrons includes, at least in part, transport by means of tunneling.Type: GrantFiled: January 20, 2003Date of Patent: July 13, 2004Assignee: The Regents of the University of ColoradoInventors: Blake J. Eliasson, Garret Moddel
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Patent number: 6750471Abstract: The present invention is directed to a microelectric device and especially a Field effect transistor comprising a source, drain, channel, an insulating layer overlying said channel containing at least one closed cage molecule, said closed cage molecule being capable of exhibiting a Coulomb blockade effect upon application of a voltage between said source and drain. Two different microelectronic devices are described containing the closed cage molecule, a logic cell and a memory cell.Type: GrantFiled: July 25, 2002Date of Patent: June 15, 2004Assignee: International Business Machines CorporationInventors: Donald Stimson Bethune, Sandip Tiwari
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Patent number: 6728281Abstract: A quantum-dot photon turnstile device is capable of producing a stream of regulated and directed single pairs of photons with opposite circular polarizations. This device operates by injecting pairs of electrons and holes, alternately, into a single quantum dot, where they combine to form photons. The device will efficiently and reliably produce a directed beam of such photons at regular time intervals. It will be able to operate at high frequency and at high temperature. Such a stream of regulated photon pairs will be useful in quantum cryptography, quantum computing, low-power optical communications, as a light standard, and in many other areas of technology and fundamental science.Type: GrantFiled: February 9, 2001Date of Patent: April 27, 2004Assignees: The Board of Trustees of the Leland Stanford Junior University, Japan Science and Technology CorporationInventors: Charles Santori, Oliver Benson, Yoshihisa Yamamoto, Matthew Pelton, Jungsang Kim
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Publication number: 20040069984Abstract: An assembly includes a first electrical circuitry for providing a first electrical signal containing data and a transmitting arrangement, connected with the first electrical circuitry, for receiving the first electrical signal and for converting the first electrical signal into an electromagnetic signal containing at least a portion of the data. The electromagnetic signal has a carrier frequency greater than 300 GHz. The assembly also includes a receiving arrangement for receiving the electromagnetic signal and for converting the electromagnetic signal into a second electrical signal containing at least some of the portion of the data, and a second electrical circuitry connected with the receiving arrangement and configured for receiving the second electrical signal.Type: ApplicationFiled: June 14, 2003Publication date: April 15, 2004Inventors: Michael J. Estes, Garret Moddel
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Patent number: 6710367Abstract: A quantum-confined Stark effect semiconductor optical modulator, operable to modulate light of a particular wavelength in the range of around 780 to 840 nm. A p-i-n diode having p, intrinsic and n regions, as well as first and second electrical contacts for application of a reverse bias voltage defines the modulator. The particular intrinsic region includes a plurality of semiconductor layers defining a plurality of quantum wells separated by barrier layers having a certain bandgap energy above that of the quantum wells. The quantum wells including at least two ultra-thin barrier layers within the quantum well and being of a material having a certain bandgap energy above that of the quantum wells. The width of each ultra-thin barrier layer is no more than approximately two molecular layers thick.Type: GrantFiled: May 17, 2002Date of Patent: March 23, 2004Assignee: The United States of America as represented by the Secretary of the ArmyInventors: John D. Bruno, Mary S. Tobin
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Patent number: 6707070Abstract: A wavelength-tunable light emitting device includes a substrate having an atomic-scale structure formed on a surface thereof, a needle member for locally applying a voltage through a vacuum space or a transparent insulating member to the substrate to cause a tunnel current to flow through the atomic-scale structure, and a variable-voltage power supply capable of varying voltage applied across the gap between the substrate and the needle member. The gap between the first member and the second member is as close as a few nm in length. A tunnel current flows from the tip of the needle member to the atomic-scale structure when a predetermined voltage is applied across the gap between the substrate and the needle member; and light is emitted from a tunneling region in which the tunnel current flows, because of an optical transition between respective localized states of the substrate and the needle.Type: GrantFiled: April 10, 2002Date of Patent: March 16, 2004Assignee: RikenInventors: Makoto Sakurai, Masakazu Aono
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Patent number: 6707063Abstract: A process of fabricating a molecular electronic device that preserves the integrity of the active molecular layer of the electronic device during processing is described. In one aspect, a passivation layer is provided to protect a molecular layer from degradation during patterning of the top wire layer. A molecular electronic device structure and a memory system that are formed from this fabrication process are described.Type: GrantFiled: March 22, 2001Date of Patent: March 16, 2004Assignee: Hewlett-Packard Development Company, L.P.Inventor: Yong Chen
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Patent number: 6686610Abstract: A light emitting diode structure is formed on a substrate. A nucleation layer at low temperature is formed on the substrate. A buffer layer is formed on the nucleation layer for easing the subsequent formation of crystal growth. N active layer is disposed between an upper confinement layer and a lower confinement layer. The active layer include the semiconductor material doped with III-N elements. A contact layer is disposed on the upper confinement layer. A reversed tunneling layer is form on the contact layer, wherein the conductive types for both are different. A transparent layer is formed on the reversed tunneling layer. A cathode electrode contacts with the conductive buffer layer and is separated from the active layer and the transparent electrode.Type: GrantFiled: March 15, 2002Date of Patent: February 3, 2004Assignee: South Epitaxy CorporationInventor: Jinn-Kong Sheu
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Publication number: 20040016921Abstract: A resonant tunneling diode is produced in a gallium arsenide material system formed with barrier layers of AlGaAs with a quantum well layer of low band-gap material between them. The material of the well is selected to adjust the second energy level to the edge of the conduction band in GaAs, with a preferred quantum well layer formed of InGaAs. The resonant tunneling diode structure is grown by a metal organic chemical vapor deposition process on the surface of the nominally exact (100) GaAs substrate. Layers of doped GaAs may be formed on either side of the multilayer resonant tunneling diode structure, and spacer layers of GaAs may also be provided on either side of the barrier layers to reduce the intrinsic capacitance of the structure.Type: ApplicationFiled: January 30, 2001Publication date: January 29, 2004Applicant: Wisconsin Alumni Research FoundationInventors: Dan Botez, Luke J. Mawst, Ali R. Mirabedini
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Patent number: 6667490Abstract: A negative differential resistance device is provided that includes a first barrier, a second barrier and a third barrier. A first quantum well is formed between the first and second barriers. A second quantum well is formed between the second and third barriers.Type: GrantFiled: October 23, 2002Date of Patent: December 23, 2003Assignee: Raytheon CompanyInventors: Jan Paul Van der Wagt, Gerhard Klimeck
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Patent number: 6664562Abstract: An assembly includes a device for receiving at least one input to produce an output. An antenna arrangement supports the device to transfer the input to the device and further to transfer the output from the device such that the antenna arrangement supports a selected one of the input and the output as a high frequency current. The antenna includes a peripheral configuration which confines high frequency current to at least one dominant path to oscillate in the dominant path and the other one of the input and the output is a lower frequency signal present at least generally throughout the antenna arrangement. At least one port is positioned sufficiently away from the dominant path to isolate the lower frequency signal from surface current in the dominant path. The assembly is usable in modulation, emitting, mixing and detection modes and may include a resonant or non-resonant configuration.Type: GrantFiled: October 5, 2002Date of Patent: December 16, 2003Assignee: The Regents of the University of ColoradoInventors: Manoja D. Weiss, Blake J. Eliasson, Garret Moddel
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Patent number: 6661021Abstract: A micro electron gun that is capable of extracting electrons from a semiconductor utilizing a quantum size effect and that can be mounted individually for each of pixels is disclosed, as well as a picture display apparatus using such electron guns which is high in quantum efficiency, of high brightness and thin, as well as methods of manufacture thereof. Conduction electrons from a n-type semiconductor substrate (2) are accelerated under an electric field through a layer or layers (4) of quantum size effect micro particles (3) formed on surfaces of the n-type semiconductor substrate (2) and passed therethrough without undergoing phonon scattering, so that they when arriving at an electrode (5) may possess an amount of energy not less than the work function of the electrode (5) and are thus allowed to spring out into a vacuum.Type: GrantFiled: November 18, 2002Date of Patent: December 9, 2003Assignee: Japan Science and Technology CorporationInventors: Shunri Oda, Xinwei Zhao, Katsuhiko Nishiguchi
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Patent number: 6635898Abstract: A quantum computer comprises a trench-isolated channel region formed in a boron-doped silicon germanium layer which has narrow channel regions which form tunnel barriers and wide channel regions which define first and second quantum dots. Tunnelling between the first and second quantum dots is controlled by a side gate and/or a surface gate. The quantum states used to represent a qubit may be defined as |an excess hole on the first quantum dot> and |an excess hole on the second quantum dot>. A Hadamard Transformation UH of an initial state may be effected by application of a pulse to the side or surface gate. The first and second tunnel quantum dots are of unequal size which helps decouple the quantum computer from the environment.Type: GrantFiled: November 19, 2001Date of Patent: October 21, 2003Assignee: Hitachi, Ltd.Inventors: David Arfon Williams, Paul Cain
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Patent number: 6614046Abstract: A nuclear spin control device comprises a first semiconducting layer with spin-up carriers, a second semiconducting layer with spin-down carriers; and a third semiconducting layer arranged between the first and the second semiconducting layers. The third semiconducting layer can be tunnelled selectively by the spin-up carriers and the spin-down carriers such that nuclear spin in the third semiconducting layer selectively interacts with the carriers so as to be oriented into a desired direction. The device may be adapted to control the shape of a wave function so as to cover nuclear spins in the third semiconducting layer and propagate information of one nuclear spin to another nuclear spin.Type: GrantFiled: February 12, 2001Date of Patent: September 2, 2003Assignee: Tohoku UniversityInventors: Hideo Ohno, Yuzo Ohno, Shuya Kishimoto
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Patent number: 6614060Abstract: An LED based on a two well system with charge asymmetric resonance tunnelling comprises first and second coupled wells, one being a wide well and the other an active quantum well. The wells are coupled via a resonance tunnelling barrier which is transparent for electrons and blocking for holes.Type: GrantFiled: May 26, 2000Date of Patent: September 2, 2003Assignee: Arima Optoelectronics CorporationInventors: Wang Nang Wang, Yurii Georgievich Shreter, Yurii Toomasovich Rebane
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Patent number: 6600184Abstract: A magnetic tunnel junction (MTJ) sensor system and a method for fabricating the same are provided. First provided is an antiferromagnetic (AFM) layer. A first ferromagnetic layer with a pinned magnetization is disposed adjacent to the AFM layer for serving as a pinned layer. Next included is a tunnel barrier layer adjacent to the first ferromagnetic layer, and a second ferromagnetic layer adjacent to the tunnel barrier layer. Adjacent to the second ferromagnetic layer is a spacer. A third ferromagnetic layer is positioned adjacent to the spacer for working in conjunction with the second ferromagnetic layer to serve as a free layer. The magnetization direction of the pinned layer is substantially perpendicular to the magnetization direction of the free layer at zero applied magnetic field. A cap layer resides adjacent to the third ferromagnetic layer. A thickness of the first ferromagnetic layer and second ferromagnetic layer is selected to achieve a resonant tunneling effect.Type: GrantFiled: March 25, 2002Date of Patent: July 29, 2003Assignee: International Business Machines CorporationInventor: Haradayal Singh Gill
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Patent number: 6593602Abstract: A substrate has first and second edges disposed in parallel and a principal surface connecting the first and second edges. An active layer is formed on the principal surface. A ridge-like region is disposed on the active layer along a path interconnecting a point on the first edge and a point on the second edge. The ridge-like region is made of semiconductor material having a refraction index smaller than a refraction index of the active layer, and defines a waveguide. The path is disposed along the principal surface and includes a first region on the side of the first edge and a second region on the side of the second edge. A first angle is taken between a normal to the first edge directing toward the principal surface and the first region. A second angle smaller than the first angle is taken between a normal to the second edge directing toward the principal surface and the second region. Electrodes inject current in a region of the active layer along the path.Type: GrantFiled: August 27, 2001Date of Patent: July 15, 2003Assignee: Stanley Electric Co., Ltd.Inventors: Ji Hao Liang, Yoshihiro Ogawa, Ken Sasakura, Tsuyoshi Maruyama
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Publication number: 20030127641Abstract: A method for fabricating an electron tunneling device on a substrate includes forming a first non-insulating layer on the substrate and providing a first amorphous layer. The method further includes the steps of providing a second layer, and forming a second non-insulating layer and providing an antenna structure connected with the first and second non-insulating layers. The second layer of material is configured to cooperate with the first amorphous layer such that the first amorphous layer and the second layer of material together serve as a transport of electrons between and to the first and second non-insulating layers, and the transport of electrons includes, at least in part, transport by means of tunneling.Type: ApplicationFiled: January 20, 2003Publication date: July 10, 2003Inventors: Blake J. Eliasson, Garret Moddel
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Patent number: 6580143Abstract: A surface modification layer having a surface modification coefficient of 0.1 to 0.5 is formed on the surface of an organic insulating film on a substrate. A metal wiring is provided on the surface of the organic insulating film having the surface modification layer formed at the surface thereof. Thus, the bonding strength between the metal wiring and the organic insulating film is enhanced.Type: GrantFiled: October 9, 2001Date of Patent: June 17, 2003Assignee: Murata Manufacturing Co., Ltd.Inventors: Koji Yoshida, Makoto Tose
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Patent number: 6573530Abstract: A quantum well optoelectronic device exploiting the multistability of the light-current characteristic of a multiple quantum well structure to achieve complex manipulation of the optical output of a light-emitting channel. Intraband tunneling of each of two distinct carrier types gives rise to a nonlinear dependence of optical gain on injected current.Type: GrantFiled: October 2, 2001Date of Patent: June 3, 2003Assignee: Nortel Networks LimitedInventors: Edward H. Sargent, Dayan Ban
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Patent number: 6559467Abstract: A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis. The quantum dot layer is preferably comprised of AlxByInzGa1-x-y-zN, InGaN1-a-bPaAsb, or AlxByInzGa1-x-y-zN1-a-bPaAsb.Type: GrantFiled: May 17, 2001Date of Patent: May 6, 2003Assignee: Technologies and Devices International, Inc.Inventors: Audrey E. Nikolaev, Yuri V. Melnik, Konstantin V. Vassilevski, Vladimir A. Dmitriev