With Additional Electrode To Control Conductive State Of Josephson Junction Patents (Class 257/36)
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Patent number: 6728131Abstract: A method for inserting fluxons into an annular Josephson junction is disclosed. Fluxon injection according to the present invention is based on local current injection into one of the superconducting electrodes of the junction. By choosing an appropriate value for the injection current, which depends upon the spacing between injecting leads among other factors, the residual fluxon pinning can be reduced to a very small level. Fluxon injection according to the present invention provides for fully controlling the trapping of individual fluxons in annular Josephson junctions and is reversible to a state of zero fluxons without heating the Josephson above its critical temperature. Fluxon injection according to the present invention can be used for preparing the working state of fluxon oscillators, clock references, radiation detectors and shaped junctions that may be used as qubits for quantum computing.Type: GrantFiled: April 4, 2002Date of Patent: April 27, 2004Assignee: D-Wave Systems, Inc.Inventor: Alexey V. Ustinov
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Publication number: 20040000666Abstract: The present invention involves a quantum computing structure, comprising: one or more logical qubits, which is encoded into a plurality of superconducting qubits; and each of the logical qubits comprises at least one operating qubit and at least one ancilla qubit. Also provided is a method of quantum computing, comprising: performing encoded quantum computing operations with logical qubits that are encoded into superconducting operating qubits and superconducting ancilla qubits. The present invention further involves a method of error correction for a quantum computing structure comprising: presenting a plurality of logical qubits, each of which comprises an operating physical qubit and an ancilla physical qubit, wherein the logical states of the plurality of logical qubits are formed from a tensor product of the states of the operating and ancilla qubits; and wherein the states of the ancilla physical qubits are suppressed; and applying strong pulses to the grouping of logical qubits.Type: ApplicationFiled: April 4, 2003Publication date: January 1, 2004Inventors: Daniel Lidar, Lian-Ao Wu, Alexandre Blais
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Patent number: 6670630Abstract: A superconducting structure that includes a mesoscopic phase device and a mesoscopic charge device. The superconducting structure further includes a mechanism for coupling the mesoscopic phase device and the mesoscopic charge device so that the quantum state of the mesoscopic phase device and the quantum state of the mesoscopic charge device interact. In another aspect, the superconducting structure includes a mechanism for reading out the quantum state of the mesoscopic charge device.Type: GrantFiled: April 12, 2002Date of Patent: December 30, 2003Assignee: D-Wave Systems, Inc.Inventors: Alexandre Blais, Jeremy P. Hilton
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Patent number: 6649929Abstract: A method and structure for a d-wave qubit structure includes a qubit disk formed at a multi-crystal junction (or qubit ring) and a superconducting screening structure surrounding the qubit. The structure may also include a superconducting sensing loop, where the superconducting sensing loop comprises an s-wave superconducting ring. The structure may also include a superconducting field effect transistor.Type: GrantFiled: May 16, 2002Date of Patent: November 18, 2003Assignee: International Business Machines CorporationInventors: Dennis M. Newns, Chang C. Tsuei
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Publication number: 20030209706Abstract: A mesa-shaped superconducting-superlattice structure is formed and adhered with epoxy onto a dielectric substrate where plural superconducting layers and plural insulating layers are naturally and alternately stacked. A &lgr;/4 micro strip line (which means the length of the strip line is one-fourth of the wavelength of a microwave to be introduced) is electrically connected via a metallic film onto the mesa structural portion of the superconducting-superlattice structure, and a metallic electrode is electrically connected to the additional mesa structural portion of the superconducting-superlattice structure via a metallic film.Type: ApplicationFiled: March 21, 2003Publication date: November 13, 2003Applicant: UTSUNOMIYA UNIVERSITYInventors: Akinobu Irie, Ginichiro Oya
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Patent number: 6627916Abstract: A solid state dc-SQUID includes a superconducting loop containing a plurality of Josephson junctions, wherein an intrinsic phase shift is accumulated through the loop. In an embodiment of the invention, the current-phase response of the dc-SQUID sits in a linear regime where directional sensitivity to flux through the loop occurs. Changes in the flux passing through the superconducting loop stimulates current which can be quantified, thus providing a means of measuring the magnetic field. Given the linear and directional response regime of the embodied device, an inherent current to phase sensitivity is achieved that would otherwise be unobtainable in common dc-SQUID devices without extrinsic intervention.Type: GrantFiled: March 31, 2001Date of Patent: September 30, 2003Assignee: D-Wave Systems, Inc.Inventors: Mohammad H. S. Amin, Timothy Duty, Alexander Omelyanchouk, Geordie Rose, Alexandre Zagoskin, Jeremy P. Hilton
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Patent number: 6614047Abstract: A finger SQUID qubit device and method for performing quantum computation with said device is disclosed. A finger SQUID qubit device includes a superconducting loop and one or more superconducting fingers, wherein the fingers extend to the interior of said loop. Each finger has a mesoscopic island at the tip, separated from the rest of the finger by a Josephson junction. A system for performing quantum computation with the finger SQUID qubit device includes a mechanism for initializing, entangling, and reading out the qubits. The mechanism may involve passing a bias current across the leads of the superconducting loop and a mechanism for measuring a potential change across the leads of the superconducting loop. Furthermore, a control system includes a mechanism for addressing specific qubits in a quantum register of finger SQUID devices.Type: GrantFiled: December 17, 2001Date of Patent: September 2, 2003Assignee: D-Wave Systems, Inc.Inventors: Alexander Tzalenchuk, Zdravko Ivanov, Jeremy P. Hilton
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Patent number: 6605822Abstract: A method for performing a quantum computing entanglement operation between a phase qubit and a charge qubit. A coherent connection between the phase qubit and the charge qubit is provided. The coherent connection allows the quantum state of the phase qubit and the quantum state of the charge qubit to interact with each other. The coherent connection is modulated for a duration te. The phase qubit is connected to the charge qubit during at least a portion of the duration te in order to controllably entangle the quantum state of the phase qubit and the quantum state of the charge qubit.Type: GrantFiled: April 12, 2002Date of Patent: August 12, 2003Assignee: D-Wave Systems, Inc.Inventors: Alexandre Blais, Jeremy P. Hilton
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Patent number: 6580102Abstract: Quantum computing systems and methods that use opposite magnetic moment states read the state of a qubit by applying current through the qubit and measuring a Hall effect voltage across the width of the current. For reading, the qubit is grounded to freeze the magnetic moment state, and the applied current is limited to pulses incapable of flipping the magnetic moment. Measurement of the Hall effect voltage can be achieved with an electrode system that is capacitively coupled to the qubit. An insulator or tunnel barrier isolates the electrode system from the qubit during quantum computing. The electrode system can include a pair of electrodes for each qubit. A readout control system uses a voltmeter or other measurement device that connects to the electrode system, a current source, and grounding circuits. For a multi-qubit system, selection logic can select which qubit or qubits are read.Type: GrantFiled: June 5, 2001Date of Patent: June 17, 2003Assignee: D-Wave Systems, Inc.Inventors: Zdravko Ivanov, Alexander Tzalentchuk, Jeremy P. Hilton, Alexander Maassen van den Brink
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Patent number: 6562693Abstract: There is provided is a semiconductor laser device capable of simplifying fabricating processes with a simple construction and easily mounting two semiconductor laser elements and a monitoring PD on a compact package and a wire bonding method for the semiconductor laser device. There are provided a stem 100 provided with a plurality of lead pins 121 through 124, a sub-mount 160 that is die-bonded onto the stem 100 and has its surface formed integrally with a monitoring PD 140 and two semiconductor laser elements 131 and 132 that are die-bonded onto the sub-mount 160 and have emission light monitored by the monitoring PD 140. A first bonding surface i.e. anode electrode 183 of the monitoring PD 140 and a second bonding surface i.e. end surface 123a of a lead pin 123 that is approximately perpendicular to the first bonding surface are wire-bonded to each other.Type: GrantFiled: March 12, 2001Date of Patent: May 13, 2003Assignee: Sharp Kabushiki KaishaInventors: Hideki Ichikawa, Mamoru Okanishi, Terumitsu Santo, Toshihiko Yoshida
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Publication number: 20030038285Abstract: A solid state dc-SQUID includes a superconducting loop containing a plurality of Josephson junctions, wherein an intrinsic phase shift is accumulated through the loop. In an embodiment of the invention, the current-phase response of the dc-SQUID sits in a linear regime where directional sensitivity to flux through the loop occurs. Changes in the flux passing through the superconducting loop stimulates current which can be quantified, thus providing a means of measuring the magnetic field. Given the linear and directional response regime of the embodied device, an inherent current to phase sensitivity is achieved that would otherwise be unobtainable in common dc-SQUID devices without extrinsic intervention.Type: ApplicationFiled: July 9, 2002Publication date: February 27, 2003Inventors: Mohammad H.S. Amin, Timothy Duty, Alexander Omelyanchouk, Geordie Rose, Alexandre Zagoskin, Jeremy P. Hilton
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Patent number: 6495854Abstract: A method and structure for a d-wave qubit structure includes a qubit disk formed at a multi-crystal junction (or qubit ring) and a superconducting screening structure surrounding the qubit. The structure may also include a superconducting sensing loop, where the superconducting sensing loop comprises an s-wave superconducting ring. The structure may also include a superconducting field effect transistor.Type: GrantFiled: December 30, 1999Date of Patent: December 17, 2002Assignee: International Business Machines CorporationInventors: Dennis M. Newns, Chang C. Tsuei
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Patent number: 6479863Abstract: A tunneling charge injector includes a conducting injector electrode, a grid insulator disposed adjacent the conducting injector electrode, a grid electrode disposed adjacent the grid insulator, a retention insulator disposed adjacent the grid electrode, and a floating gate electrode disposed adjacent the retention insulator. In the tunneling charge injector, charge is injected from the conducting injector electrode onto the floating gate. Electrons are injected onto the floating gate when the conducting injector electrode is negatively biased with respect to the grid electrode, and holes are injected onto the floating gate when the conducting injector electrode is positively biased with respect to the grid electrode. The tunneling charge injector is employed in a nonvolatile memory cell having a nonvolatile memory element with a floating gate such as a floating gate MOS transistor.Type: GrantFiled: December 6, 2000Date of Patent: November 12, 2002Inventor: John M. Caywood
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Patent number: 6365912Abstract: A superconductive tunnel junction device in which quasiparticles in a superconductive region (S1), relax into a normal metal trap (N1) releasing their potential energy in electron-electron interactions to increase the number of excited charge carriers in the trap. The excited charge carriers tunnel through an insulating tunnel junction barrier (I2) into a second superconductive region (S2). The quasiparticles in the first superconductive region are formed either by absorption or energetic particles/radiation or by injection by charge carriers tunneling in from a base region which can be of normal metal (N0) or superconductor (or both) of semiconductor. The current from the trap to the second superconductor is higher than that out of the base region thus providing current amplification. The device can thus form a three terminal transistor-like device. It can be used as or in particle/radiation detectors, as an analogue signal amplifier, microrefrigerator or digital switch.Type: GrantFiled: March 6, 2001Date of Patent: April 2, 2002Assignee: Isis Innovation LimitedInventors: Norman Ewart Booth, Joel Nathan Ullom, Michael Nahum
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Publication number: 20020025586Abstract: A method of forming a novel high temperature superconducting Josephson junction which is capable of achieving a formation of a Josephson junction having high characteristic conveniently and quickly without necessitating costly micromachining facilities. Two high temperature superconducting whisker crystals are crossed with each other on a substrate and subjected to thermal treatment to form a Josephson junction between the two high temperature superconducting whisker crystals.Type: ApplicationFiled: August 21, 2001Publication date: February 28, 2002Inventors: Yoshihiko Takano, Takeshi Hatano, Akira Ishii, Syunichi Arisawa, Kazumasa Togano
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Patent number: 6344659Abstract: The present invention relates on an interferometer arrangement comprising a source electrode and a drain electrode, a base electrode to which the source electrode and the drain electrode are connected through tunnel barriers, the base electrode thus forming a double barrier quantum well, and first and second superconducting gate electrodes to control the source-drain current. The base electrode comprises a ferromagnetic material enabling resonant tunneling of source-drain electrons when there are bound states within the quantum well structure matching the energy of said source-drain electrons. The invention also relates to a logical element comprising such an interferometer arrangement and to a method of controlling the conductance of an interferometer.Type: GrantFiled: November 24, 1999Date of Patent: February 5, 2002Assignee: Telefonaktiebolaget LM Ericsson (publ)Inventors: Zdravko Ivanov, Robert Shekhter, Anatoli Kadiqrobov, Tord Claeson, Mats Jonson, Erland Wikborg
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Patent number: 6160266Abstract: This invention provides a superconducting device with good characteristics that can be reproduced at an arbitrary place on a substrate and a method of manufacturing the same. A convex region (a processed, linearly shaped platinum thin film) of oriented metal is provided on a substrate as a gate electrode. Then, an oxide insulating film (SrTiO.sub.3 thin film) is deposited on the convex region, and further a YBa.sub.2 Cu.sub.3 O.sub.7 oxide superconducting thin film is deposited on the oxide insulating film. Accordingly, a grain boundary part is formed on the convex region. A drain electrode and a source electrode are formed facing each other with the grain boundary part between.Type: GrantFiled: February 20, 1997Date of Patent: December 12, 2000Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Akihiro Odagawa, Hideaki Adachi, Kentaro Setsune
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Patent number: 6147360Abstract: This invention provides a superconducting device with good characteristics that can be reproduced at an arbitrary place on a substrate and a method of manufacturing the same. A convex region (a processed, linearly-shaped platinum thin film) of oriented metal is provided on a substrate as a gate electrode. Then, an oxide insulating film (SrTiO.sub.3 thin film) is deposited on the convex region, and further a YBa.sub.2 Cu.sub.3 O.sub.7 oxide superconducting thin film is deposited on the oxide insulating film. Accordingly, a grain boundary part is formed on the convex region. A drain electrode and a source electrode are formed facing each other with the grain boundary part in between.Type: GrantFiled: May 21, 1998Date of Patent: November 14, 2000Assignee: Matsushita Electric Industrial Co. Ltd.Inventors: Akihiro Odagawa, Hideaki Adachi, Kentaro Setsune
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Patent number: 6111268Abstract: The invention relates to an inverted JOFET with an at least bicrystalline electrically conductive substrate-layer bearing an insulating element and a superconductive element with a Josephson-junction. The substrate-layer is connected to a control-element. The invention further relates to a method for making such a JOFET. The grain boundary in the substrate-layer thereby maps into the Josephson-junction in the superconductive element.Type: GrantFiled: July 17, 1998Date of Patent: August 29, 2000Assignee: International Business Machines CorporartionInventors: Jochen Mannhart, Bernd Mayer
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Patent number: 5965900Abstract: The invention relates to a detector cell comprising tunnel-effect superconductive devices organized in a two-dimensional array and placed on a common substrate, each superconductive device comprising a tunnel-effect superconductive junction and being electrically connected to a bottom connection area and to a top connection area. The superconductive devices are separated from one another by trenches extending down to and including the bottom connection area and defining individual bottom connection areas disposed between each of said junctions and the substrate. At least one individual bottom connection area is electrically connected to at least one bottom connection area of an adjacent superconductive device by a localized bridge region.Type: GrantFiled: December 4, 1998Date of Patent: October 12, 1999Assignee: Agence Spatiale EuropeenneInventors: Anthony Peacock, Robert Venn
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Patent number: 5955743Abstract: The invention relates to a superconductive tunnel element comprising superconductors, barriers and insulators, which tunnel element has the following layer structure: superconductor (S1), insulator (I), superconductor (S2), barrier (B), superconductor (S3), insulator (I) and superconductor (S4).Type: GrantFiled: September 2, 1997Date of Patent: September 21, 1999Inventor: Hehrwart Schroeder
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Patent number: 5942765Abstract: In the random access memory utilizing an oxide high-temperature superconductor, a first high-temperature superconductor layer 1, a non-superconductor layer 2, a second high-temperature superconductor layer 3 and a non-superconductor layer 4 are formed on an insulated substrate. The first high-temperature superconductor layer 1 is formed in a first loop, forming a memory storage superconductor quantum interference device by two Josephson junctions and a control current line I.sub.WX (6) and a bias current line I.sub.WY (8) in order to store the flux quantum. The second high-temperature superconductor layer 3 is formed in a second loop, forming a reading superconducting quantum interference device by two Josephson junctions and a control current line I.sub.RX (5) and a bias current line I.sub.RY (7).Type: GrantFiled: November 20, 1997Date of Patent: August 24, 1999Assignee: International Superconductivity Technology CenterInventors: Kazunori Miyahara, Yoichi Enomoto, Shoji Tanaka
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Patent number: 5872731Abstract: A multi-state Josephson memory in a superconductor integrated circuit includes a plurality of superconductive quantum interference device (SQUID) memory cells 2 each having a SQUID 4 characterized by a SQUID loop inductance L and a junction critical current I.sub.c, which determine the number of memory states that can be stored in the SQUID 4. A gate current I.sub.g is transmitted to the superconductive inductors 6 and 8 of the SQUID 4 to perform a read operation by crossing a designated number of current threshold boundaries corresponding to the memory state stored in the SQUID, so that the Josephson junction 12 of the SQUID 4 generates a number of pulses corresponding to the memory state. A control current I.sub.con writes data to the SQUID 4 through a control current input 16, and is preferably magnetically coupled to the SQUID 4 through superconductive inductor pairs 18, 6 and 20, 8. In a preferred embodiment, a plurality of SQUID memory cells 70a, 70b, . . .Type: GrantFiled: October 10, 1997Date of Patent: February 16, 1999Assignee: TRW Inc.Inventors: Hugo W-K. Chan, Arnold H. Silver, Robert D. Sandell
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Patent number: 5861361Abstract: A FET type superconducting device comprises a thin superconducting channel, a superconducting source region and a superconducting drain region formed of an oxide superconductor over a principal surface of the substrate, and a gate electrode on a gate insulator disposed on the superconducting channel for controlling the superconducting current flowing through the superconducting channel by a signal voltage applied to the gate electrode. The superconducting channel is formed of(Pr.sub.w Y.sub.1-w)Ba.sub.2 Cu.sub.3 O.sub.7-z (0<w<1, 0<z<1) oxide superconductororY.sub.1 Ba.sub.2 Cu.sub.3-v CO.sub.V O.sub.7-u (0<v<3, 0<u<1) oxide superconductor.These oxide superconductors have smaller carrier densities than the conventional oxide superconductor so that the superconducting channel has a larger thickness than the one funned of the conventional oxide superconductor.Type: GrantFiled: April 17, 1996Date of Patent: January 19, 1999Assignee: Sumitomo Electric Industries, Ltd.Inventors: Takao Nakamura, Michitomo Iiyama
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Patent number: 5854492Abstract: A nondestructive inspection apparatus having a SQUID is made with compact configuration and is capable of detecting a metallic or non-metallic metal for defects, corrosion, and the like, by forming the SQUID and a magnetic field applying coil on the same substrate. The SQUID comprises two Josephson junctions, a washer coil connected to the Josephson junctions to form a superconducting loop, shunt resistors, a damping resistor, and a feedback modulation coil, all of which are formed from a superconducting thin film on a supporting substrate. A magnetic field applying coil is formed on the same supporting substrate with a superconducting thin film or a normal conducting metal thin film. The magnetic field applying coil, which generally has plural turns around the SQUID, applies a dc or ac magnetic field to a sample. The change in magnetic field caused by a defect in the sample is detected by the washer coil, and the position and size of the defect may thus be determined.Type: GrantFiled: October 29, 1996Date of Patent: December 29, 1998Assignee: Seiko Instruments Inc.Inventors: Kazuo Chinone, Toshimitsu Morooka, Satoshi Nakayama, Akikazu Odawara
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Patent number: 5831278Abstract: A three-terminal device constructed from a Josephson junction with one or more asymmetric control lines is disclosed. The device is constructed with high temperature superconducting materials. The junction can be a bicrystal, SNS (Superconducting-Normal-Superconducting) or any other type of high temperature superconductor junction. The control line is either a conducting or superconducting material which is electrically isolated from the junction but inductively coupled into the junction. A portion of the control line is approximately directly above the junction and has current which at least partially flows parallel or nonparallel to current flowing across the junction. The control line current alters the magnetic field within the junction which changes the critical current of the junction. The junction is in a superconducting or resistive state depending on whether the bias current of the junction is greater than or less than the control current.Type: GrantFiled: March 15, 1996Date of Patent: November 3, 1998Assignee: Conductus, Inc.Inventor: Stuart J. Berkowitz
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Patent number: 5821557Abstract: A Josephson junction includes a substrate, a first superconducting layer, a second superconducting layer transversely overlaid on the first layer with an insulating layer interposed therebetween, the insulating layer is an oxide or a nitride of the superconducting material, and the insulating layer including a low oxygen- or nitrogen-concentrated area in contact with each of the first and second layers. A process for fabricating the Josephson junction includes the steps of preparing a substrate, forming a first superconducting layer, forming a second superconducting layer transversely on the first layer with an insulating layer interposed therebetween wherein the insulating layer is an oxide or nitride of the superconducting material, and injecting ion beams into the insulating layer so as to form low oxygen- or nitrogen-concentrated area linking the first and second layers.Type: GrantFiled: July 8, 1996Date of Patent: October 13, 1998Assignee: Shimadzu CorporationInventors: Shinji Nagamachi, Masahiro Ueda, Kei Shinada, Mitsuyoshi Yoshii
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Patent number: 5804835Abstract: This is an invention of a superconductive device that is equipped with a first superconductive electrode, a second superconductive electrode and a junction that is made of a superconductive material that connects these superconductive electrodes, wherein there are 2-terminal or 3-terminal superconductive devices that use a junction that is in a superconductive state that is weaker than the first and the second superconductive electrodes or in a normal conductive state that is near the superconductive state. The differences between the critical current, the critical temperature, the pair potential and the carrier densities of the first and the second superconductive electrodes and the junction are used as a means of putting the junction in the states mentioned above. Based on the methods mentioned above, a superconductive device which has few pattern rule restrictions and which is easy to fabricate can be offered.Type: GrantFiled: June 5, 1995Date of Patent: September 8, 1998Assignee: Seiko Epson CorporationInventors: Taketomi Kamikawa, Eiji Natori, Setsuya Iwashita, Tatsuya Shimoda
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Patent number: 5773843Abstract: A metal electrode disposed on a surface of an oxide superconductor and forming electric contact with the oxide superconductor wherein at least a portion of the metal electrode is in contact with a side surface of the oxide superconductor which is perpendicular to the surface on which the metal electrode is disposed.Type: GrantFiled: February 20, 1996Date of Patent: June 30, 1998Assignee: Sumitomo Electric Industries, Inc.Inventors: Takao Nakamura, Michitomo Iiyama
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Patent number: 5757243Abstract: An effective high frequency oscillator is made of a plurality of Josephson devices. A high frequency converter as a high frequency circuit is made of the high frequency oscillator, nonlinear superconductor devices, and transmission line. Josephson devices are connected in parallel to make a superconductor module. Then superconductive modules are connected in series for high frequency via a phase locking circuit such as a thin film type capacitor to make the high frequency oscillator. Consequently, the high frequency oscillator is used as a local oscillator for a frequency converter. The high frequency system comprises a high frequency package housing a high frequency circuit, a cooling unit including a low temperature stage in thermal contact with the high frequency package, and a shielding case for housing the high frequency circuit and the low temperature stage. The high frequency system of the present invention provides a small-sized and power-saving high frequency circuit having operational stability.Type: GrantFiled: May 13, 1996Date of Patent: May 26, 1998Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Koichi Mizuno, Akira Enokihara, Hidetaka Higashino, Kentaro Setsune
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Patent number: 5717222Abstract: A superconducting device includes a substrate, a projecting insulating region formed in a principal surface of the substrate, and a first thin film portion of an oxide superconductor formed on the projecting insulating region. Second and third thin film portions of an oxide superconductor are positioned at opposite sides of the projecting insulating region to be continuous to the first thin film portion, respectively, so that a superconducting current can flow through the first thin film portion between the second thin film portion and the third thin film portion. The second thin film portion and the third thin film portion has a thickness larger than that of the first thin film portion. The projecting insulating region is formed of an oxide which is composed of the same constituent elements of the oxide superconductor but which has the oxygen content smaller than that of said oxide superconductor.Type: GrantFiled: May 23, 1996Date of Patent: February 10, 1998Assignee: Sumitomo Electric Industries, Ltd.Inventors: Takao Nakamura, Hiroshi Inada, Michitomo Iiyama
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Patent number: 5710437Abstract: A radiation detecting device including a superconducting tunnel junction having a three-layer structure formed by depositing a lower electrode, a tunnel barrier layer, and an upper electrode in sequence. The upper electrode, the tunnel barrier layer and lower electrode have substantially aligned side walls around substantially their entire perimeters such that a cross-section of the three-layer structure along a path perpendicular to a direction of the deposition is substantially constant in shape and size along the direction of the deposition and such that no portion of the lower electrode or the upper electrode extends beyond the tunnel barrier layer. At least one of the upper electrode and the lower electrode is made of superconducting material.Type: GrantFiled: March 2, 1994Date of Patent: January 20, 1998Assignee: Nippon Steel CorporationInventors: Masahiko Kurakado, Toru Takahashi, Atsuki Matsumura
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Patent number: 5654259Abstract: The substance has a composition of a general chemical formula ofBi.sub.2 -(Sr.sub.2 Ca.sub.1).sub.1-x (La.sub.2 Y.sub.1).sub.x -Cu.sub.y -O.sub.z,where 0.4.ltoreq.x.ltoreq.1, y=2 and z=9-10.5, wherein the substance is an insulator or a semiconductor in the dark, and has a photoconductivity Q(.lambda.,T) in conjugate with superconductivity of a superconductor of an adjacent component of the Bi-SrCa-LaY-Cu-O system at and below a critical temperature (T) of less than 105.degree.-115.degree. K. and below 65.degree.-85.degree. K. at photoexcitation in an optical wavelength range (.lambda.) of 420-670 nm. The present invention relates to a method for producing the same and a superconductive optoelectronic device by using the same. The present invention also relates to an organized integration of the element or device into an apparatus to further develop a new field of "Superconductive Optoelectronics.Type: GrantFiled: June 7, 1995Date of Patent: August 5, 1997Assignee: The University of TokyoInventor: Taizo Masumi
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Patent number: 5621223Abstract: A superconducting device includes first and second oxide superconducting regions of a relatively thick thickness, formed directly on a principal surface of a substrate to be separate from each other, and a third oxide superconducting region of an extremely thin thickness which is formed directly on the principal surface of the substrate so as to bridge the first and second oxide superconducting regions. A barrier layer and a diffusion source layer are formed on the third oxide superconducting region, and an isolation region is formed to cover an upper portion or both side surfaces of the diffusion source layer. The first, second and third oxide superconducting regions and the isolation region are formed of the same oxide superconductor material, and the isolation region is diffused with a material of the diffusion source layer, so that the isolation region does not show superconductivity.Type: GrantFiled: August 16, 1995Date of Patent: April 15, 1997Assignee: Sumitomo Electric Industries, Ltd.Inventors: Takao Nakamura, Hiroshi Inada, Michitomo Iiyama
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Patent number: 5610857Abstract: A memory element for multiple bit storage uses a plurality of Josephson junction devices coupled in parallel between a ground plane and a superconductive line. A gate current is directly coupled to the superconductive line at a midpoint, and a control current is magnetically coupled to the superconductive line along its length. The current trajectory of the gate and control currents from an initial value to a quiescent point in the threshold curve traces determines the states of the modes. All the modes have a stable operating point at the quiescent point. The control current in the absence of the gate current is used to maintain the memory element at the quiescent point, and the gate current is used to momentarily transition none, one or more of the Josephson junction devices to a voltage state to determine the states of the modes at the quiescent point via appropriate Josephson sensors.Type: GrantFiled: March 25, 1996Date of Patent: March 11, 1997Assignee: Tektronix, Inc.Inventor: Vallath Nandakumar
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Patent number: 5596206Abstract: A new type of superconducting device is disclosed. The device embodies a superconducting ceramic film as an active part. A control electrode is provided on the superconducting film in which a passing current is controlled by applying a voltage on an intermediate portion of the film.Type: GrantFiled: April 4, 1995Date of Patent: January 21, 1997Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Shunpei Yamazaki
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Patent number: 5594257Abstract: A superconducting device comprises a substrate having a principal surface, a non-superconducting oxide layer having a similar crystal structure to that of an oxide superconductor formed on the principal surface, which can compensates the lattice mismatch between the substrate and the oxide superconductor, a superconducting source region and a superconducting drain region formed of c-axis oriented oxide superconductor thin films on the non-superconducting oxide layer, and an insulating region formed of a doped oxide superconductor on the non-superconducting oxide layer separating the superconducting source region and the superconducting drain region between them. On the insulating region an extremely thin superconducting channel formed of a c-axis oriented oxide superconductor thin film is arranged.Type: GrantFiled: June 24, 1993Date of Patent: January 14, 1997Assignee: Sumitomo Electric Industries, Ltd.Inventors: Takao Nakamura, Michitomo Iiyama
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Patent number: 5550389Abstract: A superconducting device low in power dissipation and high in operating speed is fabricated by use of a combination of a superconductor material and a semiconductor material. The superconducting device having a low power dissipation and high operating speed characteristic according to the present invention is suitable for configuring a large-scale integrated circuit.Type: GrantFiled: December 22, 1993Date of Patent: August 27, 1996Assignee: Hitachi, Ltd.Inventors: Toshikazu Nishino, Mutsuko Hatano, Haruhiro Hasegawa, Hideaki Nakane, Ushio Kawabe, Kazuo Saitoh, Mitsuo Suga, Kazumasa Takagi
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Patent number: 5548130Abstract: A DC SQUID has a first washer coil for forming a superconducting ring, Josephson junctions and a dampening resistor coupled to both ends of the first washer coil, and a shunting resistor connected in parallel to the Josephson junctions. An input coil is magnetically coupled with the first washer coil, and a first modulation coil is also magnetically coupled with the first washer coil. A ground plane comprising a superconducting film is disposed to cover an area of the Josephson junctions without covering the first washer coil for shielding the Josephson junctions from a magnetic noise. The ground plane prevents a magnetic flux trap from occurring, thus enabling stable operation of the DC SQUID. A washer cover comprising a superconducting film is disposed to cover only a slit portion of the first washer coil to prevent leakage of a magnetic field from the slit portion. The ground plane and the washer cover are simultaneously formed in a same layer of the DC SQUID.Type: GrantFiled: December 29, 1994Date of Patent: August 20, 1996Assignee: Seiko Instruments Inc.Inventors: Nobuhiro Shimizu, Norio Chiba, Satoru Yabe
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Patent number: 5539215Abstract: A superconducting device comprising a substrate having a principal surface, a non-superconducting oxide layer having a similar crystal structure to that of the oxide superconductor, a first and a second superconducting regions formed of c-axis oriented oxide superconductor thin films on the non-superconducting oxide layer separated from each other and gently inclining to each other, a third superconducting region formed of an extremely thin c-axis oriented oxide superconductor thin film between the first and the second superconducting regions, which is continuous to the first and the second superconducting regions.Type: GrantFiled: December 29, 1994Date of Patent: July 23, 1996Assignee: Sumitomo Electric Industries, Ltd.Inventors: Takao Nakamura, Hiroshi Inada, Michitomo Iiyama
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Patent number: 5521399Abstract: A bonded, SOI wafer which has stepped isolation trenches and sublayer interconnections first formed in a bulk silicon wafer. After these process steps are complete, a thin polysilicon layer is formed on the planarized upper surface of the bulk silicon wafer. This thin polysilicon layer is then bound to an oxide layer on the surface of a separate wafer to form a bonded silicon-on-oxide structure. The entire assembly is, in effect inverted, and what had been the lower surface of the bulk silicon wafer, is removed to the bottom of the deepest trench step. In this bonded SOI structure, regions between the trenches are deep and suitable for bipolar device fabrication, while the trench steps form shallow regions suitable for fabrication of CMOS devices.Type: GrantFiled: May 16, 1994Date of Patent: May 28, 1996Assignee: International Business Machines CorporationInventors: Shao-Fu S. Chu, Chang-Ming Hsieh, Louis L. C. Hsu, Kyong-Min Kim, Shaw-Ning Mei
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Patent number: 5481119Abstract: A superconducting element includes a superconducting thin film bridge extending along the surface of a substrate, and a control electrode member for injecting quasi particles into a portion of an intersection region of the superconducting thin film bridge. The intersection region extends across the superconducting thin film bridge in a direction which is perpendicular to the current flow direction of the superconducting thin film bridge. A remaining portion of the intersection region, which is not injected with quasi particles by the control electrode member, operates as a weak-coupling bridge to thereby control the current flow within the superconducting thin film bridge.Type: GrantFiled: August 7, 1992Date of Patent: January 2, 1996Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hidetaka Higashino, Koichi Mizuno, Kentaro Setsune
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Patent number: 5442196Abstract: A pair of superconducting electrodes are so formed as to interpose a semiconductor therebetween, and a control electrode is formed on the semiconductor through an insulator film so as to control the superconductive weak coupling state in the semiconductor between the superconducting electrodes. The distance between the superconducting electrodes is determined by the thickness of the superconductor interposed between the two electrodes, whereby the interelectrode distance is settled with a high precision to improve the uniformity of the device characteristic.And in an arrangement where two superconducting electrodes are formed on a semiconductor layer and the superconductive weak coupling state between such two electrodes is controlled by a third electrode, the gain is increadable by furnishing a varied impurity distribution in the semiconductor layer.Type: GrantFiled: February 24, 1994Date of Patent: August 15, 1995Assignee: Hitachi, Ltd.Inventors: Toshikazu Nishino, Mutsuko Miyake, Ushio Kawabe, Yutaka Harada, Masaaki Aoki, Mikio Hirano
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Patent number: 5442195Abstract: A superconducting device may include a superconducting weak link equipped with plural superconducting devices that are used as input-output terminals formed on the same plane and at least one current source for applying current to at least one of these superconducting electrodes. A superconducting device suitable for high integration can be realized as it enables structuring of a superconducting weak link 1 equipped with plural superconducting electrodes 101, 102, 103 and 104 that can be used as input-output terminals and changing symmetry of superconducting electrode arrangement through the form of a normal conductor 201 which is forming a superconducting weak link. In addition, when this superconducting device is used as a quasi-particle injection type device, a superconducting device with plural superconducting electrodes that can be used for a gate electrode, drain electrode or control electrode can be realized. Further, a superconducting device equipped with new functions (e.g.Type: GrantFiled: October 18, 1993Date of Patent: August 15, 1995Assignee: Hitachi, Ltd.Inventors: Kazuo Saitoh, Toshikazu Nishino, Mutsuko Hatano
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Patent number: 5441926Abstract: A superconducting transistor having a source region and a drain region are formed by a YBCO film on a barrier layer, which is composed of a PBCO film formed on an STO substrate. A gate electrode is disposed on the thinner wall at the back of the STO substrate. In a superconducting transistor so constructed the electric field created by the gate voltage works effectively at an interface with the barrier layer, more carriers can be drawn out relative to the applied gate voltage, and it becomes possible for a large superconduction current to flow.Type: GrantFiled: November 12, 1993Date of Patent: August 15, 1995Assignee: Fuji Electric Co., Ltd.Inventors: Hiroshi Kimura, Toshiyuki Matsui, Takeshi Suzuki, Kazuo Mukae, Akihiko Ohi
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Patent number: 5436471Abstract: A Josephson junction apparatus comprises a polymeric film having flexibility, and a Josephson junction circuit formed on the polymeric film. The Josephson junction circuit includes a Josephson junction device and a wiring for connecting to the Josephson junction device. Namely, the Josephson junction apparatus has flexibility, and thus the Josephson junction apparatus can be placed not only on a flat surface but also it can be placed on a curved surface in practice. Furthermore, in the Josephson junction apparatus, when a functional polymeric film is used as a substrate of a Josephson junction of the Josephson junction device, a protective film is previously formed over the functional polymeric film, so that a wetting of the functional polymeric film, which is caused by water or organic solvents being used repeatedly during the manufacturing process, can be prevented and a dimensional stability of the film can be increased.Type: GrantFiled: April 14, 1994Date of Patent: July 25, 1995Assignee: Fujitsu LimitedInventor: Hiromasa Hoko
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Patent number: 5424281Abstract: An oxide-superconducting device comprises first and second electrodes of oxide-superconductor which are connected through a tunnel barrier layer. The oxide-superconductor is formed on a substrate having a recess, and it includes grain boundaries along the recess. The tunnel barrier layer is formed along the grain boundaries, and it is made of any material of an element F, Cl, Br, I, C, O, S, P or N, a mixture consisting of such elements, and a compound containing such an element, the material being introduced into the grain boundaries and/or lattice interstices near the grain boundaries.Type: GrantFiled: January 26, 1993Date of Patent: June 13, 1995Assignee: Hitachi, Ltd.Inventors: Yoshinobu Tarutani, Ushio Kawabe
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Patent number: 5422497Abstract: A superconducting device includes a first thin film of oxide superconductor material formed on a substrate, a second thin film of insulator material stacked on the first thin film of oxide superconductor material, and a third thin film of oxide superconductor material formed on the second thin film of insulator material. The second thin film of insulator material is formed of an amorphous oxide including the same constituent elements as those of the oxide superconductor material of the first thin film. The second thin film of insulator material is formed by heat-treating the first thin film of oxide superconductor material in a gaseous atmosphere bringing a surface of the oxide superconductor material into an amorphous condition, after the first thin film of oxide superconductor material has been formed on the substrate.Type: GrantFiled: December 22, 1993Date of Patent: June 6, 1995Assignee: Sumitomo Electric Industries, Ltd.Inventors: Mitsuchika Saitoh, Sou Tanaka, Michitomo Iiyama
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Patent number: 5422336Abstract: A superconducting transistor with superior withstand voltage having source region and a drain region formed of oxide superconductors 3, a PrBa.sub.2 Cu.sub.3 O.sub.7-x layer 2 or an ScBa.sub.2 Cu.sub.3 O.sub.7-x layer 2 forming an intermediate region sandwiched by the source and drain regions. The regions are disposed on a substrate 1. An insulation layer 4 is disposed on the intermediate region. A transistor uses the intermediate region as an insulator when the gate is turned off, and as a superconductor when the gate is turned on.Type: GrantFiled: September 22, 1993Date of Patent: June 6, 1995Assignee: Fuji Electric Co., Ltd.Inventors: Koichi Tsuda, Toshiyuki Matsui, Takeshi Suzuki, Hiroshi Kimura, Takashi Ishii, Akihiko Ohi, Kazuo Mukae
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Patent number: 5407903Abstract: For manufacturing a superconducting device, a first c-axis orientated oxide superconductor thin film having a very thin thickness is formed on a principal surface of a substrate, and a stacked structure of a gate insulator and a gate electrode is formed on a portion of the first oxide superconductor thin film. An a-axis orientated oxide superconductor thin film is grown, using the gate electrode as a mask, so that second and third superconducting regions having a relatively thick thickness are formed at both sides of the gate electrode, electrically isolated from the gate electrode. The superconducting device thus formed can functions as a super-FET.Type: GrantFiled: September 27, 1991Date of Patent: April 18, 1995Assignee: Sumitomo Electric Industries, Ltd.Inventors: Takao Nakamura, Hiroshi Inada, Michitomo Iiyama