Semiconductor Is An Oxide Of A Metal (e.g., Cuo, Zno) Or Copper Sulfide Patents (Class 257/43)
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Patent number: 11973092Abstract: The present disclosure discloses a detection substrate, a manufacturing method thereof and a flat panel detector. The detection substrate includes: a base substrate, as well as a plurality of transistors, an oxide layer, a plurality of read electrodes and a plurality of photoelectric conversion structures sequentially on the base substrate, wherein a first electrode of each of the transistors is electrically connected with each of the photoelectric conversion structures in a one-to-one correspondence mode via each of the read electrodes; a material of an active layer includes an oxide; each of the photoelectric conversion structures includes an N-type semiconductor layer, an intrinsic semiconductor layer, and a P-type semiconductor layer; and the oxide layer at least covers channel regions of the transistors and is insulated from the read electrodes.Type: GrantFiled: July 22, 2020Date of Patent: April 30, 2024Assignees: Beijing BOE Sensor Technology Co., Ltd., BOE Technology Group Co., Ltd.Inventors: Xuecheng Hou, Jianxing Shang, Xiaobin Shang
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Distinct chip identifier sequence utilizing unclonable characteristics of resistive memory on a chip
Patent number: 11967376Abstract: Stochastic or near-stochastic physical characteristics of resistive switching devices are utilized for generating data distinct to those resistive switching devices. The distinct data can be utilized for applications related to electronic identification. As one example, data generated from physical characteristics of resistive switching devices on a semiconductor chip can be utilized to form a distinct identifier sequence for that semiconductor chip, utilized for verification applications for communications with the semiconductor chip or utilized for generating cryptographic keys or the like for cryptographic applications.Type: GrantFiled: August 30, 2022Date of Patent: April 23, 2024Assignee: Crossbar, Inc.Inventors: Sung Hyun Jo, Hagop Nazarian, Sang Nguyen, Jeremy Guy, Zhi Li -
Patent number: 11967491Abstract: The present invention provides a method and apparatus for cleaning parts used in substrate processing. In a method for cleaning parts of a substrate processing, plasma generated from cleaning gas is supplied together with a cooling medium to clean the parts, but the cooling medium may be provided at a lower temperature than the plasma.Type: GrantFiled: February 16, 2021Date of Patent: April 23, 2024Assignee: SEMES CO., LTD.Inventors: Soon-Cheon Cho, Su Hyung Lee, Youngran Ko, Juyong Jang
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Patent number: 11968865Abstract: A display substrate and a display device are provided. The display substrate includes a display region, at least one first signal line, and at least one connecting wire. The display region includes a first display region and a second display region; the first display region includes at least one first light emitting element, and the second display region includes at least one first pixel circuit; the first signal line includes a first main body portion and a first winding portion; the first main body portion extends along a first direction, and at least part of the first winding portion extends along a direction intersecting with the first direction; at least one first signal line is electrically connected to at least one first pixel circuit; and at least one first pixel circuit is configured to respectively drive at least one first light emitting element.Type: GrantFiled: March 19, 2020Date of Patent: April 23, 2024Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Weiyun Huang, Yao Huang, Chi Yu, Xingliang Xiao, Bo Shi, Benlian Wang
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Patent number: 11967649Abstract: The semiconductor device includes a first conductor and a second conductor; a first insulator to a third insulator; and a first oxide to a third oxide. The first conductor is disposed to be exposed from a top surface of the first insulator. The first oxide is disposed over the first insulator and the first conductor. A first opening reaching the first conductor is provided in the first oxide. The second oxide is disposed over the first oxide. The second oxide comprises a first region, a second region, and a third region positioned between the first region and the second region. The third oxide is disposed over the second oxide. The second insulator is disposed over the third oxide. The second conductor is disposed over the second insulator. The third insulator is disposed to cover the first region and the second region and to be in contact with the top surface of the first insulator.Type: GrantFiled: August 25, 2022Date of Patent: April 23, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Toshihiko Takeuchi, Naoto Yamade, Yutaka Okazaki, Sachiaki Tezuka, Shunpei Yamazaki
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Patent number: 11961848Abstract: Disclosed are a display substrate and a manufacturing method therefor, and a display device. The display substrate comprises: a substrate base, and an active layer, a gate insulating layer, a first metal film layer, an interlayer insulating layer, a second metal film layer, and a passivation layer stacked in sequence on the substrate base. The first metal film layer comprises a pattern of a gate and a gate line. The second metal film layer comprises a pattern of a source/drain and a data line. The gate line and the data line are partially arranged opposite to each other. An oxide metal layer is provided on the surface of the side of the region of the gate line opposite to the data line facing the data line.Type: GrantFiled: May 14, 2020Date of Patent: April 16, 2024Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Jun Liu, Liangchen Yan, Bin Zhou, Yadong Liang, Ning Liu, Leilei Cheng, Jingang Fang
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Patent number: 11956948Abstract: A memory device includes a substrate, a first transistor and a second transistor, a first word line, a second word line, and a bit line. The first transistor and the second transistor are over the substrate and are electrically connected to each other, in which each of the first and second transistors includes first semiconductor layers and second semiconductor layers, a gate structure, and source/drain structures, in which the first semiconductor layers are in contact with the second semiconductor layers, and a width of the first semiconductor layers is narrower than a width of the second semiconductor layers. The first word line is electrically connected to the gate structure of the first transistor. The second word line is electrically connected to the gate structure of the second transistor. The bit line is electrically connected to a first one of the source/drain structures of the first transistor.Type: GrantFiled: April 1, 2022Date of Patent: April 9, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Hsin-Wen Su, Yu-Kuan Lin, Shih-Hao Lin, Lien-Jung Hung, Ping-Wei Wang
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Patent number: 11955557Abstract: A semiconductor device includes an oxide semiconductor layer, a source electrode and a drain electrode electrically connected to the oxide semiconductor layer, a gate insulating layer covering the oxide semiconductor layer, the source electrode, and the drain electrode, and a gate electrode over the gate insulating layer. The source electrode and the drain electrode include an oxide region formed by oxidizing a side surface thereof. Note that the oxide region of the source electrode and the drain electrode is preferably formed by plasma treatment with a high frequency power of 300 MHz to 300 GHz and a mixed gas of oxygen and argon.Type: GrantFiled: August 31, 2022Date of Patent: April 9, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama
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Patent number: 11955538Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first conductor, a second conductor over the first conductor, a first insulator covering the second conductor, a first oxide over the first insulator, and a second oxide over the first oxide, an opening overlapping with at least part of the first conductor is provided in the first oxide and the first insulator, and the second oxide is electrically connected to the first conductor through the opening.Type: GrantFiled: April 18, 2023Date of Patent: April 9, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toshihiko Takeuchi, Naoto Yamade, Hiroshi Fujiki, Tomoaki Moriwaka, Shunsuke Kimura
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Patent number: 11949021Abstract: A semiconductor device having a structure which can prevent a decrease in electrical characteristics due to miniaturization is provided. The semiconductor device includes, over an insulating surface, a stack in which a first oxide semiconductor layer and a second oxide semiconductor layer are sequentially formed, and a third oxide semiconductor layer covering part of a surface of the stack. The third oxide semiconductor layer includes a first layer in contact with the stack and a second layer over the first layer. The first layer includes a microcrystalline layer, and the second layer includes a crystalline layer in which c-axes are aligned in a direction perpendicular to a surface of the first layer.Type: GrantFiled: April 11, 2023Date of Patent: April 2, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Masayuki Sakakura, Hideomi Suzawa
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Patent number: 11950455Abstract: A transistor substrate may include a substrate including a first region and a second region, a first buffer layer disposed in the first region on the substrate and including silicon nitride, a second buffer layer disposed in the first region and the second region on the first buffer layer and including silicon oxide, a first transistor disposed in the first region on the second buffer layer and including a first oxide semiconductor layer and a first gate electrode overlapping the first oxide semiconductor layer, and a second transistor disposed in the second region on the second buffer layer and including a second oxide semiconductor layer and a second gate electrode overlapping the second oxide semiconductor layer.Type: GrantFiled: February 20, 2019Date of Patent: April 2, 2024Assignee: Samsung Display Co., Ltd.Inventors: Yeonkeon Moon, Joonseok Park, Kwang-suk Kim, Myounghwa Kim, Taesang Kim, Geunchul Park, Kyungjin Jeon
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Patent number: 11942545Abstract: A semiconductor device of an embodiment includes a substrate, a first electrode, a second electrode, the first electrode provided between the substrate and the second electrode, the oxide semiconductor layer in contact with the first electrode, an oxide semiconductor layer between the first electrode and the second electrode, the oxide semiconductor layer contains Zn and at least one first element selected from In, Ga, Si, Al, and Sn; a conductive layer between the oxide semiconductor layer and the second electrode, the conductive layer in contact with the second electrode, the conductive layer contains O and at least one second element selected from the group consisting of In, Ga, Si, Al, Sn, Zn, and Ti, a gate electrode; and a gate insulating layer between the oxide semiconductor layer and the gate electrode.Type: GrantFiled: July 27, 2022Date of Patent: March 26, 2024Assignee: Kioxia CorporationInventors: Yuta Sato, Tomomasa Ueda, Nobuyoshi Saito, Keiji Ikeda
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Patent number: 11943975Abstract: A display panel includes: a substrate including an opening area, a display area, and a non-display area, the display area surrounding the opening area, and the non-display area being between the opening area and the display area; a plurality of display elements at the display area of the substrate, each of the display elements including a pixel electrode, an emission layer on the pixel electrode, and an opposite electrode on the emission layer; a thin-film encapsulation layer covering the plurality of display elements; a dam at the non-display area, and protruding from a top surface of a first insulating layer; and a recess between the opening area and the dam, and recessed in a depth direction of the first insulating layer. A lateral wall of the dam meets a first lateral wall from among lateral walls of the recess, the first lateral wall being adjacent to the display area.Type: GrantFiled: January 30, 2023Date of Patent: March 26, 2024Assignee: Samsung Display Co., Ltd.Inventor: Chungi You
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Patent number: 11942520Abstract: Provided is a semiconductor film having a corundum-type crystal structure composed of ?-Ga2O3 or an ?-Ga2O3 solid solution and the crystal defect density on at least one surface of the semiconductor film is 1.0×106/cm2 or less.Type: GrantFiled: October 13, 2021Date of Patent: March 26, 2024Assignee: NGK INSULATORS, LTD.Inventors: Morimichi Watanabe, Hiroshi Fukui
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Patent number: 11940702Abstract: A novel composite oxide semiconductor which can be used in a transistor including an oxide semiconductor film is provided. In the composite oxide semiconductor, a first region and a second region are mixed. The first region includes a plurality of first clusters containing In and oxygen as main components. The second region includes a plurality of second clusters containing Zn and oxygen as main components. The plurality of first clusters have portions connected to each other. The plurality of second clusters have portions connected to each other.Type: GrantFiled: November 28, 2022Date of Patent: March 26, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Shunpei Yamazaki
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Patent number: 11935966Abstract: A transistor device includes a first source/drain region and a second source/drain region spaced apart from each other; a channel layer electrically connected to the first and second source/drain regions; a gate insulator layer; a gate electrode isolated from the channel layer by the gate insulator layer; and a UV-attenuating layer disposed on the channel layer to protect the channel layer from characteristic degradation caused by UV light.Type: GrantFiled: April 28, 2021Date of Patent: March 19, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Katherine H. Chiang, Neil Quinn Murray, Ming-Yen Chuang, Chung-Te Lin
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Patent number: 11935967Abstract: The purpose of the invention is to form the TFT of the oxide semiconductor, in which influence of variation in mask alignment is suppressed, thus, manufacturing a display device having a TFT of stable characteristics. The concrete measure is as follows. A display device including plural pixels, each of the plural pixels having a thin film transistor (TFT) of an oxide semiconductor comprising: a width of the oxide semiconductor in the channel width direction is wider than a width of the gate electrode in the channel width direction.Type: GrantFiled: August 4, 2021Date of Patent: March 19, 2024Assignee: Japan Display Inc.Inventors: Takeshi Sakai, Yuichiro Hanyu, Masahiro Watabe
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Patent number: 11937471Abstract: A display substrate and a display device are provided. The display substrate includes a display region, at least one first signal line, and at least one connecting wire. The display region includes a first display region and a second display region; the first display region includes at least one first light emitting element, and the second display region includes at least one first pixel circuit; the first signal line includes a first main body portion and a first winding portion; the first main body portion extends along a first direction, and at least part of the first winding portion extends along a direction intersecting with the first direction; at least one first signal line is electrically connected to at least one first pixel circuit; and at least one first pixel circuit is configured to respectively drive at least one first light emitting element.Type: GrantFiled: March 19, 2020Date of Patent: March 19, 2024Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Weiyun Huang, Yao Huang, Chi Yu, Xingliang Xiao, Bo Shi, Benlian Wang
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Patent number: 11935964Abstract: A semiconductor device having high reliability is provided. The semiconductor device includes a transistor and an insulator placed so as to surround the transistor; the insulator has a barrier property against hydrogen; the transistor includes an oxide and a conductor; the conductor includes nitrogen and a metal; the conductor has a physical property of extracting hydrogen; the conductor includes a region having a hydrogen concentration higher than or equal to 2.0×1019 atoms/cm3 and lower than or equal to 1.0×1021 atoms/cm3; and at least part of hydrogen atoms included in the region is bonded to a nitrogen atom.Type: GrantFiled: October 1, 2019Date of Patent: March 19, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yoshihiro Komatsu, Toshikazu Ohno
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Patent number: 11935897Abstract: A display device capable of performing proper display without image signal conversion is provided. In the case of high-resolution display, individual data is supplied to each pixel through a first signal line and a first transistor included in each pixel. In the case of low-resolution display, the same data is supplied to a plurality of pixels through a second signal line and a second transistor electrically connected to the plurality of pixels. When the number of image signals to be displayed is more than one and the image signals support different resolutions, display can be performed without up conversion or down conversion by switching an image signal supply path as described above.Type: GrantFiled: June 5, 2023Date of Patent: March 19, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Susumu Kawashima, Naoto Kusumoto
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Patent number: 11937458Abstract: A display device includes a driving transistor and an organic EL element. The driving transistor includes an oxide semiconductor layer; a first gate electrode that includes a region overlapping the oxide semiconductor layer; a first insulating layer between the first gate electrode and the oxide semiconductor layer; a second gate electrode that includes a region overlapping the oxide semiconductor layer and the first gate electrode; a second insulating layer between the second gate electrode and the oxide semiconductor layer; and a first and a second transparent conductive layer that are provided between the oxide semiconductor layer and the first insulating layer and each include a region contacting the oxide semiconductor layer. The organic EL element includes a first electrode; a second electrode; a light emitting layer between the first electrode and the second electrode; and an electron transfer layer between the light emitting layer and the first electrode.Type: GrantFiled: March 27, 2023Date of Patent: March 19, 2024Assignee: MIKUNI ELECTRON CORPORATIONInventor: Sakae Tanaka
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Patent number: 11935898Abstract: A semiconductor device including: a first gate electrode; a first gate insulating layer on the first gate electrode; a first oxide semiconductor layer on the first insulating layer; source and drain electrodes connected to the first oxide semiconductor layer; a second gate insulating layer on the first oxide semiconductor layer; a second oxide semiconductor layer on the second gate insulating layer; a second gate electrode on the second oxide semiconductor layer, the second gate electrode being in contact with the second oxide semiconductor layer; a first insulating layer on the second gate electrode, the first insulating layer having a part of a first aperture overlapping with the second oxide semiconductor layer in a planar view; and a first connecting electrode electrically connecting the first gate electrode and the second gate electrode via the first aperture.Type: GrantFiled: September 25, 2020Date of Patent: March 19, 2024Assignee: Japan Display Inc.Inventors: Tatsuya Toda, Toshinari Sasaki, Masayoshi Fuchi
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Patent number: 11929416Abstract: A semiconductor device with favorable reliability is provided. The semiconductor device includes a first oxide, a second oxide over the first oxide, a first insulator over the second oxide, a first conductor over the first insulator, and a second conductor and a third conductor over the second oxide. The second conductor includes a first region and a second region, the third conductor includes a third region and a fourth region, the second region is positioned above the first region, the fourth region is positioned above the third region, and each of the second conductor and the third conductor contains tantalum and nitrogen. The atomic ratio of nitrogen to tantalum in the first region is higher than the atomic ratio of nitrogen to tantalum in the second region, and the atomic ratio of nitrogen to tantalum in the third region is higher than the atomic ratio of nitrogen to tantalum in the fourth region.Type: GrantFiled: September 2, 2019Date of Patent: March 12, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Ryo Tokumaru, Shinya Sasagawa, Tomonori Nakayama
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Patent number: 11929412Abstract: A semiconductor device with favorable electrical characteristics is provided. A semiconductor device with stable electrical characteristics is provided. The semiconductor device includes a first insulating layer, a second insulating layer, a third insulating layer, a fourth insulating layer, a semiconductor layer, and a first conductive layer. The second insulating layer is positioned over the first insulating layer and the island-shaped semiconductor layer is positioned over the second insulating layer. The second insulating layer has an island shape having an end portion outside a region overlapping with the semiconductor layer. The fourth insulating layer covers the second insulating layer, the semiconductor layer, the third insulating layer, and the first conductive layer, is in contact with part of a top surface of the semiconductor layer, and is in contact with the first insulating layer outside the end portion of the second insulating layer.Type: GrantFiled: July 18, 2022Date of Patent: March 12, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Masami Jintyou, Takahiro Iguchi, Yukinori Shima, Kenichi Okazaki
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Patent number: 11929426Abstract: A semiconductor device with high reliability is provided. The present invention relates to a method for manufacturing a transistor including an oxide semiconductor. A stacked-layer structure of an oxide semiconductor and an insulator functioning as a gate insulator is subjected to microwave-excited plasma treatment, whereby the carrier concentration of the oxide semiconductor is reduced and the barrier property of the gate insulator is improved. In addition, a conductor functioning as an electrode and the insulator functioning as a gate insulator are formed in contact with the oxide semiconductor and then the microwave-excited plasma treatment is performed, whereby a high-resistance region and a low-resistance region can be formed in the oxide semiconductor in a self-aligned manner. Moreover, the microwave-excited plasma treatment is performed under an atmosphere containing oxygen with a high pressure, whereby a transistor having favorable electrical characteristics can be provided.Type: GrantFiled: August 26, 2019Date of Patent: March 12, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Naoki Okuno, Hiroki Komagata
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Patent number: 11927869Abstract: According to one embodiment, a semiconductor substrate, comprising, a first semiconductor layer and a second semiconductor layer that overlap a scanning line, an insulating layer that covers the first semiconductor layer and the second semiconductor layer, and a signal line, wherein the insulating layer has a first opening including a pair of long sides and a pair of short sides, the long sides of the first opening are parallel to the second direction, and the short sides of the first opening are parallel to the first direction, and the signal line is connected to the first semiconductor layer and the second semiconductor layer via the first opening.Type: GrantFiled: October 19, 2021Date of Patent: March 12, 2024Assignee: Japan Display Inc.Inventor: Hirotaka Hayashi
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Patent number: 11929437Abstract: A transistor includes oxide semiconductor stacked layers between a first gate electrode layer and a second gate electrode layer through an insulating layer interposed between the first gate electrode layer and the oxide semiconductor stacked layers and an insulating layer interposed between the second gate electrode layer and the oxide semiconductor stacked layers. The thickness of a channel formation region is smaller than the other regions in the oxide semiconductor stacked layers. Further in this transistor, one of the gate electrode layers is provided as what is called a back gate for controlling the threshold voltage. Controlling the potential applied to the back gate enables control of the threshold voltage of the transistor, which makes it easy to maintain the normally-off characteristics of the transistor.Type: GrantFiled: October 13, 2021Date of Patent: March 12, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Daisuke Matsubayashi, Keisuke Murayama
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Patent number: 11923371Abstract: Described herein are apparatuses, systems, and methods associated with a voltage regulator circuit that includes one or more thin-film transistors (TFTs). The TFTs may be formed in the back-end of an integrated circuit. Additionally, the TFTs may include one or more unique features, such as a channel layer treated with a gas or plasma, and/or a gate oxide layer that is thicker than in prior TFTs. The one or more TFTs of the voltage regulator circuit may improve the operation of the voltage regulator circuit and free up front-end substrate area for other devices. Other embodiments may be described and claimed.Type: GrantFiled: September 29, 2017Date of Patent: March 5, 2024Assignee: Intel CorporationInventors: Abhishek A. Sharma, Van H. Le, Seung Hoon Sung, Ravi Pillarisetty, Marko Radosavljevic
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Patent number: 11923459Abstract: A thin film transistor and method of making the same, the thin film transistor including: a substrate; a word line disposed on the substrate; a semiconductor layer disposed on the substrate, the semiconductor layer having a source region, a drain region, and a channel region disposed between the source and drain regions and overlapping with the word line in a vertical direction perpendicular to a plane of the substrate; a hydrogen diffusion barrier layer overlapping with the channel region in the vertical direction; a gate dielectric layer disposed between the channel region and the word line; and source and drain electrodes respectively electrically coupled to the source and drain regions.Type: GrantFiled: April 12, 2021Date of Patent: March 5, 2024Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Hung Wei Li, Mauricio Manfrini, Sai-Hooi Yeong, Yu-Ming Lin
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Patent number: 11923390Abstract: A detection module for a display device includes: a substrate; a detector disposed on the substrate to detect an external signal; a sensor driving circuit disposed on the substrate to drive the detector; and a light shielding layer to block an external light from entering the sensor driving circuit and to receive a light blocking voltage.Type: GrantFiled: January 12, 2021Date of Patent: March 5, 2024Assignee: Samsung Display Co., Ltd.Inventors: Junghak Kim, Youngsik Kim, Kyowon Ku, Jaehyung Jo
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Patent number: 11923423Abstract: A novel metal oxide is provided. One embodiment of the present invention is a crystalline metal oxide. The metal oxide includes a first layer and a second layer; the first layer has a wider bandgap than the second layer; the first layer and the second layer form a crystal lattice; and in the case where a carrier is excited in the metal oxide, the carrier is transferred through the second layer. Furthermore, the first layer contains an element M (M is one or more selected from Al, Ga, Y, and Sn) and Zn, and the second layer contains In.Type: GrantFiled: May 26, 2022Date of Patent: March 5, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Shunpei Yamazaki
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Patent number: 11916178Abstract: A display device includes a first electrode and a second electrode that are spaced apart from and facing each other; a light-blocking layer disposed above the first electrode and the second electrode; and at least one light-emitting element disposed between the first electrode and the second electrode. The light-blocking layer includes a light-blocking portion absorbing light and an opening pattern. The light-blocking portion includes an area partially overlapping the first electrode and the second electrode. The at least one opening pattern exposes portions of the first and second electrodes facing each other and at least a portion of an area between the first and second electrodes facing each other. The at least one light-emitting element overlaps the at least one opening pattern.Type: GrantFiled: August 23, 2019Date of Patent: February 27, 2024Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Jin Oh Kwag, Dae Hyun Kim, Keun Kyu Song, Sung Chan Jo, Hyun Min Cho
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Patent number: 11916097Abstract: A display apparatus with a detection device comprising: a substrate having a first principal surface and a second principal surface opposite to the first principal surface; a plurality of inorganic light-emitting elements provided on the first principal surface in a display region of the substrate; a first electrode facing the first principal surface of the substrate with the inorganic light-emitting elements interposed between the first electrode and the first principal surface; a first planarizing layer provided between the substrate and the first electrode and covering at least a side surface of the inorganic light-emitting elements; and a second electrode facing the second principal surface of the substrate and configured to output a signal corresponding to a change in distance between the second electrode and the first electrode.Type: GrantFiled: January 26, 2021Date of Patent: February 27, 2024Assignee: Japan Display Inc.Inventors: Masanobu Ikeda, Yasuhiro Kanaya
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Patent number: 11916121Abstract: A semiconductor device includes a metal oxide semiconductor channel layer, a first gate dielectric layer contacting a first portion of a major surface of the metal oxide semiconductor channel layer, a first gate electrode overlying the first gate dielectric layer and contacting a second portion of the major surface of the metal oxide semiconductor channel layer, a drain region and a backside gate dielectric layer contacting another major surface of the metal oxide semiconductor channel layer, a backside gate electrode contacting the backside gate dielectric layer, a second gate dielectric layer contacting an end surface of the metal oxide semiconductor channel layer, a second gate electrode contacting a surface of the second gate dielectric layer, and a source region contacting another end surface of the metal oxide semiconductor channel layer.Type: GrantFiled: April 13, 2021Date of Patent: February 27, 2024Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Katherine H. Chiang, Chung-Te Lin
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Patent number: 11916113Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device has a semiconductor layer and a gate structure located on the semiconductor layer. The semiconductor device has source and drain terminals disposed on the semiconductor layer, and a binary oxide layer located between the semiconductor layer and the source and drain terminals.Type: GrantFiled: July 31, 2022Date of Patent: February 27, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Georgios Vellianitis, Gerben Doornbos, Marcus Johannes Henricus Van Dal
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Patent number: 11908913Abstract: A semiconductor device is disclosed. The semiconductor device includes a transistor including a source contact, a drain contact, and a channel region including an oxide semiconductor material as the channel material. At least one of the drain contact or the source contact includes a conductive material, such as ruthenium, to reduce the Schottky effects at the interface with the channel material.Type: GrantFiled: April 28, 2022Date of Patent: February 20, 2024Assignee: Micron Technology, Inc.Inventors: Durai Vishak Nirmal Ramaswamy, Ramanathan Gandhi, Scott E. Sills
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Patent number: 11910729Abstract: A superconducting current limiter having at least one superconducting conductor (3) wound so as to form a coil (2) extending in a single plane and connecting a first electrical connection terminal to a second electrical connection terminal, an electrically insulating spacer (8) being arranged between two turns of the coil. The superconducting conductor (3) consists of at least two separate superconducting cables (5) wound in parallel and whose ends are electrically connected by the first electrical connection terminal and by the second electrical connection terminal, respectively. An electrically conductive spacer (12) is arranged between two of said separate superconducting cables (5), this electrically conductive spacer (12) being able to be traversed by a cooling fluid.Type: GrantFiled: May 16, 2019Date of Patent: February 20, 2024Assignees: Supergrid Institute, Institut Polytechnique De GrenobleInventors: Pierre Legendre, Pascal Tixador
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Patent number: 11908949Abstract: A semiconductor device with a high on-state current is provided. The semiconductor device includes a first oxide, a second oxide over the first oxide, a third oxide over the second oxide, a first insulator over the third oxide, a conductor over the first insulator, a second insulator in contact with the second oxide and the third oxide, and a third insulator over the second insulator; the second oxide includes first region to fifth regions; the resistance of the first region and the resistance of the second region are lower than the resistance of the third region; the resistance of the fourth region and the resistance of the fifth region are lower than the resistance of the third region and higher than the resistance of the first region and the resistance of the second region; and the conductor is provided over the third region, the fourth region, and the fifth region to overlap with the third region, the fourth region, and the fifth region.Type: GrantFiled: December 8, 2022Date of Patent: February 20, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yuki Hata, Katsuaki Tochibayashi, Junpei Sugao, Shunpei Yamazaki
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Patent number: 11901420Abstract: The present application discloses a manufacturing method for a gate electrode and a thin film transistor, and a display panel, including: depositing an aluminum film on a substratum by physical vapor deposition; depositing a molybdenum film over the aluminum film by atomic layer deposition; and etching the aluminum film and the molybdenum film to form the gate electrode of a predetermined pattern.Type: GrantFiled: July 22, 2021Date of Patent: February 13, 2024Assignees: BEIHAI HKC OPTOELECTRONICS TECHNOLOGY CO., LTD., HKC CORPORATION LIMITEDInventors: En-Tsung Cho, Yuming Xia, Wei Li
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Patent number: 11901431Abstract: A field-effect transistor including: a source electrode and a drain electrode; a gate electrode; a semiconductor layer; and a gate insulating layer, wherein the gate insulating layer is an oxide insulator film including A element and B element, the A element being one or more selected from the group consisting of Zr and Hf and the B element being one or more selected from the group consisting of Be and Mg.Type: GrantFiled: July 19, 2019Date of Patent: February 13, 2024Assignee: RICOH COMPANY, LTD.Inventors: Naoyuki Ueda, Yuki Nakamura, Yukiko Abe, Shinji Matsumoto, Yuji Sone, Ryoichi Saotome, Sadanori Arae, Minehide Kusayanagi
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Patent number: 11901461Abstract: Disclosed are a thin film transistor, a display apparatus comprising the thin film transistor, and a method for manufacturing the thin film transistor. The thin film transistor comprises an active layer, and a gate electrode spaced apart from the active layer and configured to have at least a portion overlapped with the active layer, wherein the active layer includes a silicon semiconductor layer, and an oxide semiconductor layer which contacts the silicon semiconductor layer, wherein at least a portion of the silicon semiconductor layer and at least a portion of the oxide semiconductor layer are overlapped with the gate electrode.Type: GrantFiled: September 30, 2022Date of Patent: February 13, 2024Assignee: LG Display Co., Ltd.Inventors: Jaeman Jang, PilSang Yun, Jiyong Noh, InTak Cho
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Patent number: 11894393Abstract: An embodiment of the present invention provides a display device including a substrate and a transistor on the substrate. The transistor includes: a lower layer having conductivity and including a body portion and a plurality of protrusions; an oxide semiconductor layer including a channel region, a first conductive region disposed at a first side of the channel region, and a second conductive region disposed at a second side of the channel region, where the second side is opposite the first side; a gate electrode overlapping the channel region in a plan view; a first electrode electrically connected to the first conductive region; and a second electrode electrically connected to the second conductive region. The plurality of protrusions protrudes from the body portion, and the body portion overlaps the channel region in the plan view.Type: GrantFiled: April 16, 2021Date of Patent: February 6, 2024Assignees: SAMSUNG DISPLAY CO., LTD., INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY ERICA CAMPUSInventors: Hye Lim Choi, Saeroonter Oh, Kihwan Kim, Joon Seok Park, Ji Hwan Lee, Jun Hyung Lim
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Patent number: 11887537Abstract: A driving circuit includes a first transistor, a second transistor and a third transistor. The first transistor has a first terminal connected to a first voltage level, a second terminal, and a third terminal. The second transistor has a first terminal connected to the second terminal of the first transistor, a second terminal connected to a second voltage level, and a third terminal connected to the third terminal of the first transistor. The third transistor has a first terminal connected to the first terminal of the second transistor. The first transistor and the second transistor are low temperature poly-silicon transistors, and the third transistor is an oxide semiconductor transistor.Type: GrantFiled: August 10, 2022Date of Patent: January 30, 2024Assignee: INNOLUX CORPORATIONInventors: Lien-Hsiang Chen, Kung-Chen Kuo, Ming-Chun Tseng, Cheng-Hsu Chou, Kuan-Feng Lee
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Patent number: 11887991Abstract: A display apparatus includes a base substrate, a polysilicon active pattern disposed on the base substrate, including polycrystalline silicon, including a source region and a drain region each doped with impurities and a channel region between the source region and the drain region, and including indium, a first gate electrode overlapping the channel region, and a source electrode electrically connected to the source region and a drain electrode electrically connected to the drain region.Type: GrantFiled: May 16, 2022Date of Patent: January 30, 2024Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Kyoung Seok Son, Myounghwa Kim, Jaybum Kim, Yeon Keon Moon, Masataka Kano
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Patent number: 11881522Abstract: A semiconductor device having favorable electrical characteristics is provided. A first oxide is formed over a substrate; a first insulator is formed over the first oxide; an opening reaching the first oxide is formed in the first insulator; a first oxide film is deposited in contact with the first oxide and the first insulator in the opening; a first insulating film is deposited over the first oxide film; microwave treatment is performed from above the first insulating film; heat treatment is performed on one or both of the first insulating film and the first oxide; a first conductive film is deposited over the first insulating film; and part of the first oxide film, part of the first insulating film, and part of the first conductive film are removed until a top surface of the first insulator is exposed, so that a second oxide, a second insulator, and a first conductor are formed.Type: GrantFiled: September 24, 2019Date of Patent: January 23, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Naoki Okuno, Yasuhiro Jinbo
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Patent number: 11876082Abstract: A backlight circuit includes a lamp panel and a plurality of electron microscope assemblies. The lamp panel includes a driving substrate and a plurality of light-emitting chips on one side of the driving substrate. The electron microscope assemblies are disposed on first sides, away from the driving substrate, of the light-emitting chips in a one-to-one correspondence manner. Each electron microscope assembly includes a transparent electrode shield, an electrolyte, and an electrode plate. The transparent electrode shields are disposed on a first side of the driving substrate. The light-emitting chips are positioned in the transparent electrode shields. The electrode plates are disposed on first sides, away from the driving substrate, of the transparent electrode shields. The electrolytes are filled between the transparent electrode shields and the electrode plates.Type: GrantFiled: July 6, 2023Date of Patent: January 16, 2024Assignee: HKC CORPORATION LIMITEDInventors: Guangping Wei, Yaohui Qin, Yiyao Xu, Caiyu Song, Rongrong Li
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Patent number: 11874981Abstract: A display device with excellent visibility can be provided. The display device includes a display region displayed by a light-emitting element. In the display region, a point touched by a user is a first point, a point which has been touched by the user prior to the first point is a second point, a vector that starts at the first point and ends at the second point is a first vector, a vector obtained by multiplying the first vector by k (k is a real number) is a second vector, and a point that is the second vector away from the first point is a third point, the display region includes a first region and a second region obtained by excluding the first region from the display region. The first region includes a first circle and a second circle, the center of the first circle is the first point, and the center of the second circle is the third point. The luminance in the first region is higher than the luminance in the second region.Type: GrantFiled: November 29, 2021Date of Patent: January 16, 2024Inventors: Takayuki Ikeda, Yuki Okamoto, Kei Takahashi, Shunpei Yamazaki
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Patent number: 11869981Abstract: The field-effect mobility and reliability of a transistor including an oxide semiconductor film are improved. One embodiment of the present invention is a semiconductor device which includes a gate electrode, an insulating film over the gate electrode, an oxide semiconductor film over the insulating film, and a pair of electrodes over the oxide semiconductor film. The oxide semiconductor film includes a first oxide semiconductor film, a second oxide semiconductor film over the first oxide semiconductor film, and a third oxide semiconductor film over the second oxide semiconductor film. The first oxide semiconductor film, the second oxide semiconductor film, and the third oxide semiconductor film include the same element. The second oxide semiconductor film includes a region having lower crystallinity than one or both of the first oxide semiconductor film and the third oxide semiconductor film.Type: GrantFiled: January 20, 2022Date of Patent: January 9, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Junichi Koezuka, Kenichi Okazaki, Yasutaka Nakazawa
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Patent number: 11862476Abstract: A semiconductor device can include a semiconductor substrate and an active region in the semiconductor substrate, where the active region can include an oxide semiconductor material having a variable atomic concentration of oxygen. A first source/drain region can be in the active region, where the first source/drain region can have a first atomic concentration of oxygen in the oxide semiconductor material. A second source/drain region can be in the active region spaced apart from first source/drain region and a channel region can be in the active region between the first source/drain region and the second source/drain region, where the channel region can have a second atomic concentration of oxygen in the oxide semiconductor material that is less than the first atomic concentration of oxygen. A gate electrode can be on the channel region and extend between the first source/drain region and the second source/drain region.Type: GrantFiled: October 21, 2020Date of Patent: January 2, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Minhee Cho, Junsoo Kim, Ho Lee, Chankyung Kim, Hei Seung Kim, Jaehong Min, Sangwuk Park, Woo Bin Song, Sang Woo Lee
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Patent number: 11855104Abstract: A display device includes: a first electrode layer; a semiconductor layer including a source region, a drain region, and a channel region, wherein at least a portion of the source region or the drain region overlaps the first electrode layer; a second electrode layer arranged adjacent to the channel region; a third electrode layer overlapping the second electrode layer and at least a portion of the source region or the drain region; and a power line electrically connected to the first electrode layer and the third electrode layer.Type: GrantFiled: November 16, 2020Date of Patent: December 26, 2023Assignee: Samsung Display Co., Ltd.Inventors: Youngin Hwang, Elly Gil, Sungho Kim, Eungtaek Kim, Yongho Yang, Seongmin Wang, Jina Lee, Joohyeon Jo, Seongbaik Chu