Abstract: This is an electron emission with a semiconductor substrate having a p-type semiconductor layer whose impurity concentration falls within a concentration range for causing an avalanche breakdown in a least a portion of a surface of the semiconductor layer. A Schottky electrode is connected to the semiconductor layer. There are a means for applying a reverse bias voltage between the Schottky electrode and the p-type semiconductor layer to cause the Schotty electrode to emit electrons, and a lead electrode, formed at a proper position, for externally guiding the emitted electrons. At least a portion of the Schottky electrode is formed of a thin film of a material selected from metals of Group 1A, Group 2A, Group 3A, and lanthanoids, metal silicides of Group 1A, Group 2A, Group Group 3A, and lanthanoids, and metal borides of Group 1A, Group 2A, Group 3A, and lanthanoids, and metal carbides of Group 4A. A film thickness of the Schotty electrode is set to be not more than 100 .ANG..

Abstract: A Schottky gate electrode of a refractory metal silicide is formed on a compound semiconductor, by which the barrier height is maintained satisfactorily even after heat treatment above 800.degree. C. Accordingly, it is possible to form an impurity diffused region using the Schottky gate electrode as a mask and then to effect the recrystallization of the semiconductor or the activation of the impurity by heat treatment, so that source and drain regions can be positioned by self-alignment relative to the gate electrode.

Abstract: A MOSFET device is constructed with an integrated Schottky diode clamp connected between the source or drain terminal and the bulk terminal. In an illustrative implementation, one or more MOSFETs are formed in an n-well located in a p-type silicon substrate. Each drain is formed by a p+ region underlying a portion of a metal-silicide layer. In one embodiment, the p+ region underlies an edge of the metal-silicide; in another embodiment, the p+ region underlies opposing edges of the metal-silicide, such that a portion of the metal-silicide contacts the n-well. Each source is formed by a p+ region underlying a layer of metal-silicide. Each gate includes a layer of p+ or n+ polycrystalline silicon clad with a layer of metal-silicide, the gates being separated from the n-well by a layer of oxide. In comparison to p-n junction diodes, the integrated Schottky diodes more effectively limit excess voltages applied to MOSFETs.

Abstract: Gold, which is the commonly used metallization on .beta.-silicon carbide, is known to degrade at temperatures above 450.degree. C. It also exhibits poor adhesion to silicon carbide. Schottky contacts with platinum metallization have rectifying characteristics similar to contacts with gold metallization. The platinum Schottky contacts remain stable up to 800.degree. C. Adhesion of the platinum deposited at slightly elevated temperatures is also superior to that for gold. Platinum provides a metallization that is physically more rugged and thermally more stable than conventional gold metallization.

Abstract: A high electron mobility transistor (HEMT) includes a diffusion barrier (22) to prevent gate metal (20) diffusion into the substrate (12) during fabrication and a sacrificial platinum alloy layer (30) forms the Schottky barrier. A method of forming a HEMT includes forming a diffusion barrier of titanium nitride on a platinum layer and applying sufficient heat to cause the platinum layer to alloy with the gallium arsenide layer forming a platinum gallium and platinum arsenide alloy layer and Schottky barrier. Since all platinum is consumed, this method permits precise control of the thickness of the gate layer and eliminates diffusion of the platinum gate layer into the gallium arsenide layer during later processing steps.

Abstract: In a field effect transistor including a Schottky gate electrode disposed on an active region in a compound semiconductor substrate, a compressive stress of the gate electrode and a tensile stress of an insulating film serving as a passivation are concentrated on the lower edges of the gate electrode, whereby positive piezoelectric charges are produced in the compound semiconductor substrate in the vicinity of the gate electrode. The positive piezoelectric charges increase the effective donor concentration, reducing the thickness of the surface depletion layer. As the result, channel narrowing due to the surface depletion layer is suppressed.

Abstract: A semiconductor device is provided having a first semiconductor region comprising an n-type semiconductor and a second semiconductor region of an n-type semiconductor having a higher resistivity than the first semiconductor region. An insulation film is provided adjacent to the semiconductor region having an aperture therein, and an electrode region is provided in the aperture. A third semiconductor region comprising a p-type semiconductor is provided at a junction between the insulation film and the electrode region. The electrode comprises a monocrystalline metal and constitutes a Schottky junction with the semiconductor region. An ohmic electrode comprising aluminum is arranged on the electrode region.

Abstract: A semiconductor circuit device is disclosed in which an impurity ion implanted region is formed in a substrate, a Schottky junction type gate electrode is formed above the impurity ion implanted region, and a source electrode and a drain electrode are formed on both sides of the gate electrode. In this device, an InGaP barrier layer is formed between the substrate and the electrodes, a cap layer comprising a semiconductor free from In as a constituent is formed between the InGaP barrier layer and the electrodes, and the gate electrode is formed of a refractory metal.

Abstract: A doped or undoped photoresponsive material having metallic precipitates, and a PiN photodiode utilizing the material for detecting light having a wavelength of 1.3 micrometers. The PiN photodiode includes a substrate having a first compound semiconductor layer disposed thereon. The PiN photodiode further includes an optically responsive compound semiconductor layer disposed above the first compound semiconductor layer. The optically responsive layer includes a plurality of buried Schottky barriers, each of which is associated with an inclusion within a crystal lattice of a Group III-V material. The PiN device also includes a further compound semiconductor layer disposed above the optically responsive layer. For a transversely illuminated embodiment, waveguiding layers may also be disposed above and below the PiN structure. In one example the optically responsive layer is comprised of GaAs:As.

Abstract: A high-cut-off frequency, high-speed HBT is obtained by suppressing the diffusion of impurities to the utmost by lowering a heat treatment temperature in the step subsequent to the formation of a high concentration base layer. A base electrode for a base layer is made of a metal or an intermetallic compound which extends the emitter layer to reach at least a part of the base layer. The metal or intermetallic compound forms Schottky barrier with an emitter layer having a wide forbidden width ,and ohmic contacts with the base layer with a narrow forbidden band. The barrier potential of the Schottky junction formed between the intermetallic compound or metal and the emitter layer is higher than the diffusion potential of a pn junction between the base layer and the emitter layer.

Abstract: A Schottky barrier diode includes a semiconductor substrate, an ohmic electrode formed on a first region of the semiconductor substrate, and a Schottky metal electrode formed on a second region spaced apart from the first region on the semiconductor substrate. The Schottky electrode includes at least one ohmic portion forming an ohmic contact with the semiconductor substrate, whereby rectifying characteristics of the Schottky barrier diode are improved.

Abstract: A HACT device which propagates charge packets 21 along a charge transport channel 17 by a surface acoustic wave (SAW) 14 is provided with an interdigital electrode grid 30 disposed on the upper surface of the HACT, near the charge transport channel 17, having electrodes 30 spaced a distance of one-half wavelength of the SAW. A hold voltage Vh is applied across alternating electrodes to store (i.e., stop and hold) each charge packet. When a charge packet is to be released, the hold voltage Vh is removed and the electrodes 30 are shorted together or alternatively connected through a maximum allowable impedance, thereby allowing each charge packet 21 to be stored and released by the device without having the electrodes 30 absorb the SAW electric fields. Because the electrodes 30 are spaced one-half a SAW wavelength apart, the HACT memory can store each and every charge packet 21, thereby providing a Nyquist bandwidth device.

Abstract: An oxide superconducting device has a junction structure composed of at least one oxide superconductor and at least one insulator in which carriers have been generated. As the insulator in which carriers have been generated, there can be used, for example, SrTiO.sub.3 doped with Nb. With such a device, rectifying characteristics can be attained in the junction.

Abstract: A rectifying contact for use at high temperatures including a monocrystalline semiconducting diamond layer on a substrate and a heteroepitaxial metal layer thereon. The metal layer has a lattice match with the diamond and is deposited on the diamond substantially in atomic registry therewith. The metal and diamond form a rectifying contact which has good mechanical adhesion and provides stable rectifying operation at elevated temperatures. The metal layer may be formed by deposition in an ultra-high vacuum. In alternate embodiments, the metal layer may be formed on a monocrystalline semiconducting diamond substrate or on at least one monocrystalline diamond area of a textured polycrystalline layer.

Abstract: A tunnel injection type semiconductor device having an MIS structure comprising a semiconductor region, a source, a drain and a gate electrode, wherein said source and said drain are composed of a metal or metal compound member, respectively, and wherein both have an overlapping portion with said gate electrode. A first conductivity type high impurity concentration semiconductor layer is formed in said semiconductor region in contact with and contiguous to said metalic member at the drain side. The source provides a Schottky barrier junction to said semiconductor region while said drain provides an ohmic contact to said semiconductor region. Using this structure a tunneling current flowing across a Schottky barrier junction between said source and said drain is controlled by a gate voltage.