Abstract: The invention comprises a diode in a well having trench isolation that has an edge. Both the well contact of the diode and the rectifying contact of the diode are silicided, but the silicide on the rectifying contact is spaced from the trench isolation edge. The spacing is provided by a gate stack or other mask. In one embodiment, the gate stack alone spaces the two diode contacts from each other, eliminating the need for trench isolation therebetween. The structure reduces diode series resistance and silicide junction penetration. It significantly improves heat flow in trench isolation technologies, increasing the level of ESD protection. The invention also comprises an SOI diode having a lightly doped region in the thin layer of semiconductor under a gate stack with an ohmic contact to the lightly doped region self-aligned to an edge of the gate stack.

Abstract: A substantial portion of the material at the pn junction (27) of the photodiode (37, 41) having an implanted region extending to a surface thereof is selectively removed (39), leaving a very small junction region (35, 43) with the remainder of the p-type (23) and n-type (25) material of each photodiode being spaced apart or electrically isolated at what was originally the junction. In the ion implanted n-type on p-type approach, the majority of the signal is created in the implanted n-type region while the majority of the noise is generated in the p-type region. By selectively removing p-type material, n-type material or both from the pn junction of the diode or otherwise electrically isolating most of the p-type and n-type regions from each other at the pn junction and thereby minimizing the pn junction area, noise is greatly reduced without affecting the signal response of the photodiode.

Abstract: Single-electron devices useful as diodes, transistors or other electronic components are prepared by anodizing a metal substrate in sheet or foil form electrolytically in an acid bath, to deposit thereon an oxide film having axially disposed micropores of substantially uniform diameter in the range of from about 1 to about 500 nanometers and substantially uniform depth less than the thickness of the oxide film, leaving an ultra thin oxide layer between the bottom of each pore in the metal substrate. The conductive material is deposited in the pores to form nanowires contacting the oxide layer at the bottom of the pores. Macro metal is deposited over the ends of the nanowires for external electrical contact purposes. Devices can be made according to the present invention which are suitable to exhibit single-electron tunnelling effects and arrays of tunnel junction devices can be prepared having a density up to the order of 10.sup.10 per square cm.

Abstract: A mesa-type PIN diode and method for making same are disclosed. A diode made according to the present invention includes a junction formed in the top surface of the mesa-shaped structure, having an area that is less than (and preferrably, approximately half) the area of the top surface. A highly-doped, N-type conducting layer is formed in the side-walls of the mesa-shaped structure. The resulting diode is subject to greatly reduced charge carrier recombination effects and suffers from much less carrier-to-carrier scattering than conventional diodes. Thus, a diode made according to the present invention is capable of achieving much higher stored charge, lower resistance, lower capacitance, better switching characteristics, and lower power consumption than one made according to the prior art. Particular utility is found, inter alia, in the areas of high-frequency microwave and monolithic circuits.

Abstract: Rather than being separated along a single cleavage line between their adjacent ends, diode arrays are spaced apart on a fabrication wafer to allow parallel cleavage lines to be established between the ends of each adjacent pair of arrays by scribed grooves located along opposite sides of a narrow disposable strip of wafer material. A cleaving technique substantially insures that any projecting lip along the cleavage plane will be on the disposable strip rather than on a diode chip, so that such a defect cannot interfere with proper end-to-end spacing of the chips when they are subsequently assembled to provide a continuous row of chips with uniformly spaced individual light-emitting sites.

Abstract: A Schottky barrier rectifier includes regions of different Schottky barrier heights. Preferably, alternating regions of relatively high and relative low barrier heights are provided on a semiconductor substrate and are electrically connected in parallel to form a single Schottky barrier rectifier. The alternating regions may be provided by laterally spaced apart regions of a first metal on the semiconductor substrate and a layer of a second metal on the regions of the first metal and on the semiconductor substrate between the regions of first metal. Alternatively, a plurality of spaced apart barrier altering regions, such as a plurality of shallow implants, are formed in the semiconductor substrate, and a continuous metal layer is formed on the semiconductor substrate. In yet another embodiment, plurality of laterally spaced apart trenches are formed in the semiconductor substrate.

Abstract: A high efficiency, high density light-emitting diode array which provides improved light output efficiency and suppression of crosstalk between adjacent light-emitting elements without loss of reliability or reproducibility is disclosed. The array includes isolated light-emitting elements on a substrate. Each light-emitting element has a light-emitting layer between a pair of cladding layers with heterojunctions being formed between the light-emitting layer and the cladding layers. Each light-emitting element has a light-emitting surface and the light-emitting layer of each light-emitting element is of an area no greater than the area of the light-emitting surface.

Abstract: A method for fabricating a plurality of semiconductor photodetectors and an array of same produced by the method. The method includes a first step of selectively removing semiconductor material to form a channel within a semiconductor material for physically isolating a first photodetector from a second photodetector, the semiconductor material having a characteristic energy bandgap. The method includes a second step of selectively increasing the carrier concentration of the semiconductor material within a bottom region of the channel for preventing minority charge carriers from diffusing under the channel from a region associated with the first photodetector to a region associated with the second photodetector. The step of selectively removing is accomplished by the steps of providing a patterned mask upon the semiconductor material and selectively removing the underlying semiconductor material through an opening within the mask.