Avalanche Diode (e.g., So-called "zener" Diode Having Breakdown Voltage Greater Than 6 Volts) Patents (Class 257/603)
  • Patent number: 8236625
    Abstract: In one embodiment, a two terminal multi-channel ESD device is configured to include a zener diode and a plurality of P-N diodes. In another embodiment, the ESD devices has an asymmetrical, characteristic.
    Type: Grant
    Filed: November 17, 2011
    Date of Patent: August 7, 2012
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Ali Salih, Mingjiao Liu
  • Patent number: 8222115
    Abstract: In one embodiment, high doped semiconductor channels are formed in a semiconductor region of an opposite conductivity type to increase the capacitance of the device.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: July 17, 2012
    Assignee: Semiconductor Components Industries, LLC
    Inventors: David D. Marreiro, Sudhama C. Shastri, Gordon M. Grivna, Earl D. Fuchs
  • Patent number: 8217416
    Abstract: Provided are a light emitting device package and a method for fabricating the same. The light emitting device package comprises a substrate; a light emitting device on the substrate; a zener diode comprising a first conductive type impurity region and two second conductive type impurity regions, the first conductive type impurity region being disposed in the substrate, the two second conductive type impurity regions being separately disposed in two areas of the first conductive type impurity region; and a first electrode layer and a second electrode layer, each of them being electrically connected to the second conductive type impurity regions and the light emitting device.
    Type: Grant
    Filed: November 3, 2008
    Date of Patent: July 10, 2012
    Assignee: LG Innotek Co., Ltd.
    Inventors: Geun Ho Kim, Yong Seon Song, Yu Ho Won
  • Patent number: 8217419
    Abstract: Provided is a semiconductor device in which on-resistance is largely reduced. In a region (2a) of an N type epitaxial layer (2) of the semiconductor device 20, each region between neighboring trenches (3) is blocked with a depletion layer (14) formed around a trench (3) so that a current passage (12) is interrupted, while a part of the depletion layer (14) formed around the trench (3) is deleted so that the current passage (12) is opened. In a region (2b), a junction portion (8) between the N type epitaxial layer (2) and a P+ type diffusion region (7) makes a Zener diode (8).
    Type: Grant
    Filed: June 13, 2008
    Date of Patent: July 10, 2012
    Assignee: Rohm Co., Ltd.
    Inventor: Masaru Takaishi
  • Patent number: 8212327
    Abstract: The present disclosure provides systems and methods for configuring and constructing a single photo detector or array of photo detectors with all fabrications circuitry on a single side of the device. Both the anode and the cathode contacts of the diode are placed on a single side, while a layer of laser treated semiconductor is placed on the opposite side for enhanced cost-effectiveness, photon detection, and fill factor.
    Type: Grant
    Filed: August 9, 2010
    Date of Patent: July 3, 2012
    Assignee: SiOnyx, Inc.
    Inventors: Neal T. Kurfiss, James E. Carey, Xia Li
  • Patent number: 8212282
    Abstract: A power supply device is disclosed that is able to satisfy the power requirements of a device in service and has high efficiency. The power supply device includes a first power supply; a voltage step-up unit that steps up an output voltage of the first power supply; a voltage step-down unit that steps down an output voltage of the voltage step-up unit; and a load that is driven to operate by an output voltage of the voltage step-down unit. The voltage step-up unit steps up the output voltage of the first power supply to a lower limit of an operating voltage of the voltage step-down unit.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: July 3, 2012
    Assignee: Ricoh Company, Ltd.
    Inventors: Masaya Ohtsuka, Yoshinori Ueda
  • Patent number: 8198703
    Abstract: A Zener diode is fabricated on a semiconductor substrate having semiconductor material thereon. The Zener diode includes a first well region having a first conductivity type, formed in the semiconductor material. The Zener diode also includes a first region having a second conductivity type, formed in the first well region (the second conductivity type is opposite the first conductivity type). The Zener diode also includes a second region having the first conductivity type, wherein the second region is formed in the first well region and overlying the first region. An electrode is formed in the first region, and the electrode is electrically coupled to the second region.
    Type: Grant
    Filed: January 18, 2010
    Date of Patent: June 12, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Xin Lin, Daniel J. Blomberg, Jiang-Kai Zuo
  • Patent number: 8188507
    Abstract: Provided are a light emitting device package and a method for fabricating the same. The light emitting device package comprises a substrate; a light emitting device on the substrate; a zener diode comprising a first conductive type impurity region and two second conductive type impurity regions, the first conductive type impurity region being disposed in the substrate, the two second conductive type impurity regions being separately disposed in two areas of the first conductive type impurity region; and a first electrode layer and a second electrode layer, each of them being electrically connected to the second conductive type impurity regions and the light emitting device.
    Type: Grant
    Filed: November 3, 2008
    Date of Patent: May 29, 2012
    Assignee: LG Innotek Co., Ltd.
    Inventors: Geun Ho Kim, Yong Seon Song, Yu Ho Won
  • Patent number: 8188572
    Abstract: In one embodiment, a plurality of ESD devices are used to form an integrated semiconductor filter circuit. Additional diodes are formed in parallel with the ESD structures in order to increase the input capacitance.
    Type: Grant
    Filed: April 26, 2011
    Date of Patent: May 29, 2012
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Steven M. Etter, Mingjiao Liu, Ali Salih, David D. Marreiro, Sudhama C. Shastri
  • Publication number: 20120080773
    Abstract: An embodiment of the present memory cell a first layer of a chosen conductivity type, and a second layer which includes ferroelectric semiconductor material of the opposite conductivity type, the layers forming a pn junction. The first layer may be a conjugated semiconductor polymer, or may also be of ferroelectric semiconductor material. The layers are provided between first and electrodes. In another embodiment, a single layer of a composite of conjugated semiconductor polymer and ferroelectric semiconductor material is provided between first and second electrodes. The various embodiments may be part of a memory array.
    Type: Application
    Filed: December 9, 2011
    Publication date: April 5, 2012
    Inventor: Juri H. KRIEGER
  • Publication number: 20120074522
    Abstract: The present invention discloses a vertical zener diode structure, in which a deep N-sinker region and a P-implantation region of the zener diode are formed in an N-well within an epitaxial layer; the P-implantation region is closer to a silicon surface than the deep N-sinker region in a vertical direction. In this structure, as zener breakdown occurs at a position away from the silicon surface, the problem of a drift in the zener breakdown value can be improved. The present invention also discloses a manufacturing method of a vertical zener diode.
    Type: Application
    Filed: September 21, 2011
    Publication date: March 29, 2012
    Inventors: Shuai Zhang, Ke Dong
  • Patent number: 8143701
    Abstract: In one embodiment, high doped semiconductor channels are formed in a semiconductor region of an opposite conductivity type to increase the capacitance of the device.
    Type: Grant
    Filed: December 3, 2009
    Date of Patent: March 27, 2012
    Assignee: Semiconductor Components Industries, LLC
    Inventors: David D. Marreiro, Sudhama C. Shastri, Gordon M. Grivna, Earl D. Fuchs
  • Patent number: 8138520
    Abstract: In one embodiment, a bi-directional diode structure is formed to have a substantially symmetrical current-voltage characteristic.
    Type: Grant
    Filed: July 7, 2011
    Date of Patent: March 20, 2012
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Mark Duskin, Suem Ping Loo, Ali Salih
  • Publication number: 20120061803
    Abstract: An asymmetrical bidirectional protection component formed in a semiconductor substrate of a first conductivity type, including: a first implanted area of the first conductivity type; a first epitaxial layer of the second conductivity type on the substrate and the first implanted area; a second epitaxial layer of the second conductivity type on the first epitaxial layer, the second layer having a doping level different from that of the first layer; a second area of the first conductivity type on the outer surface of the epitaxial layer, opposite to the first to area; a first metallization covering the entire lower surface of the substrate; and a second metallization covering the second area.
    Type: Application
    Filed: August 16, 2011
    Publication date: March 15, 2012
    Applicant: STMicroelectronics (Tours) SAS
    Inventor: Benjamin Morillon
  • Patent number: 8115231
    Abstract: A semiconductor device includes an insulating film formed over a semiconductor substrate, a Zener diode formed above the insulating film, an interlayer film formed above the Zener diode, and a gate aluminum and a source aluminum formed above the interlayer film. The Zener diode is connected between the gate aluminum and the source aluminum. The Zener diode is formed by alternately joining an N type region and a P type region concentrically. The gate electrode includes a gate pad section. A planar shape of the Zener diode is substantially similar to a planer shape of the gate pad section. The gate pad section extends for a predetermined distance from an outermost edge of the P type region of the Zener diode to outside.
    Type: Grant
    Filed: July 24, 2009
    Date of Patent: February 14, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Hirohiko Uno, Naoki Matsuura
  • Patent number: 8097896
    Abstract: A light emitting device package capable of achieving an enhancement in light emission efficiency and a reduction in thermal resistance, and a method for manufacturing the same are disclosed. The method includes forming a mounting hole in a first substrate, forming through holes in a second substrate, forming a metal film in the through holes, forming at least one pair of metal layers on upper and lower surfaces of the second substrate such that the metal layers are electrically connected to the metal film, bonding the first substrate to the second substrate, and mounting at least one light emitting device in the mounting hole such that the light emitting device is electrically connected to the metal layers formed on the upper surface of the second substrate.
    Type: Grant
    Filed: February 15, 2007
    Date of Patent: January 17, 2012
    Assignees: LG Electronics Inc., LG Innotek., Ltd.
    Inventors: Geun Ho Kim, Seung Yeob Lee, Yu Ho Won
  • Patent number: 8093599
    Abstract: A silicon carbide Zener diode is a bipolar semiconductor device that has a mesa structure and includes a silicon carbide single crystal substrate of a first conductivity type, formed thereon, a silicon carbide conductive layer of a first conductivity type, and a silicon carbide conductive layer of a second conductivity type formed on the silicon carbide conductive layer of a first conductivity type, wherein a depletion layer that is formed under reverse bias at a junction between the silicon carbide conductive layer of a first conductivity type and the silicon carbide conductive layer of a second conductivity type does not reach a mesa corner formed in the silicon carbide conductive layer of a first conductivity type.
    Type: Grant
    Filed: April 25, 2008
    Date of Patent: January 10, 2012
    Assignee: Central Research Institute of Electric Power Industry
    Inventors: Ryosuke Ishii, Koji Nakayama, Yoshitaka Sugawara, Hidekazu Tsuchida
  • Publication number: 20110266591
    Abstract: In one embodiment, a bi-directional diode structure is formed to have a substantially symmetrical current-voltage characteristic.
    Type: Application
    Filed: July 7, 2011
    Publication date: November 3, 2011
    Inventors: Mark Duskin, Suem Ping Loo, Ali Salih
  • Patent number: 8044485
    Abstract: A semiconductor device made of a group-III nitride semiconductor having excellent properties is provided. The semiconductor device has a horizontal diode structure of Schottky type or P-N junction type, or combined type thereof having a main conduction pathway in the horizontal direction in a conductive layer with unit anode portions and unit cathode electrodes being integrated adjacently to each other in the horizontal direction. The conductive layer is preferably formed by depositing a group-III nitride layer and generating a two-dimensional electron gas layer on the interface. Forming the conductive layer of the group-III nitride having high breakdown field allows the breakdown voltage to be kept high while the gap between electrodes is narrow, which achieves a semiconductor device having high output current per chip area.
    Type: Grant
    Filed: March 28, 2007
    Date of Patent: October 25, 2011
    Assignee: NGK Insulators, Ltd.
    Inventors: Makoto Miyoshi, Yoshitaka Kuraoka
  • Patent number: 8039359
    Abstract: In one embodiment, the ESD device uses highly doped P and N regions deep within the ESD device to form a zener diode that has a controlled breakdown voltage.
    Type: Grant
    Filed: February 27, 2009
    Date of Patent: October 18, 2011
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Thomas Keena, Ki Chang, Francine Y. Robb, Mingjiao Liu, Ali Salih, John Michael Parsey, Jr., George Chang
  • Patent number: 8035195
    Abstract: A semiconductor element includes a semiconductor layer having a first doping density, a metallization, and a contact area located between the semiconductor layer and the metallization. The contact area includes at least one first semiconductor area that has a second doping density higher than the first doping density, and at least one second semiconductor area in the semiconductor layer. The second semiconductor area is in contact with the metallization and provides lower ohmic resistance to the metallization than a direct contact between the semiconductor layer and the metallization provides or would provide.
    Type: Grant
    Filed: May 23, 2008
    Date of Patent: October 11, 2011
    Assignee: Infineon Technologies AG
    Inventors: Franz Josef Niedernostheide, Manfred Pfaffenlehner, Hans-Joachim Schulze
  • Patent number: 8026576
    Abstract: There is provided a wiring board. The wiring board includes: a semiconductor substrate having a through hole and covered with an insulating film; a through electrode formed in the through hole; a first wiring connected to one end of the through electrode; and a second wiring connected to the other end of the through electrode. The semiconductor substrate includes: a semiconductor element and a first guard ring formed to surround the through hole. The semiconductor element includes a first conductivity-type impurity diffusion layer having a different conductivity-type from that of the semiconductor substrate and is electrically connected to the first wiring and the second wiring.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: September 27, 2011
    Assignees: Shinko Electric Industries Co., Ltd., Asahi Kasei Microdevices Corporation
    Inventors: Kei Murayama, Shinji Nakajima
  • Patent number: 8018028
    Abstract: A semiconductor device includes a semiconductor substrate, a cell region, an outer peripheral region, a field plate, an outermost peripheral ring, outer peripheral region layer, an insulator film, and a Zener diode. The semiconductor substrate has a superjunction structure. The outer peripheral region is disposed at an outer periphery of the cell region. The Zener diode is disposed on the insulator film for electrically connecting the field plate with the outermost peripheral ring. The Zener diode has a first conductivity type region and a second conductivity type region that are alternately arranged in a direction from the cell region to the outer peripheral region.
    Type: Grant
    Filed: December 29, 2010
    Date of Patent: September 13, 2011
    Assignee: DENSO CORPORATION
    Inventor: Takeshi Miyajima
  • Publication number: 20110198728
    Abstract: In one embodiment, a plurality of ESD devices are used to form an integrated semiconductor filter circuit. Additional diodes are formed in parallel with the ESD structures in order to increase the input capacitance.
    Type: Application
    Filed: April 26, 2011
    Publication date: August 18, 2011
    Inventors: Steven M. Etter, Mingjiao Liu, Ali Salih, David D. Marreiro, Sudhama C. Shastri
  • Publication number: 20110175199
    Abstract: A Zener diode is fabricated on a semiconductor substrate having semiconductor material thereon. The Zener diode includes a first well region having a first conductivity type, formed in the semiconductor material. The Zener diode also includes a first region having a second conductivity type, formed in the first well region (the second conductivity type is opposite the first conductivity type). The Zener diode also includes a second region having the first conductivity type, wherein the second region is formed in the first well region and overlying the first region. An electrode is formed in the first region, and the electrode is electrically coupled to the second region.
    Type: Application
    Filed: January 18, 2010
    Publication date: July 21, 2011
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Xin Lin, Daniel J. Blomberg, Jiang-Kai Zuo
  • Patent number: 7955941
    Abstract: In one embodiment, a plurality of ESD devices are used to form an integrated semiconductor filter circuit. Additional diodes are formed in parallel with the ESD structures in order to increase the input capacitance.
    Type: Grant
    Filed: September 11, 2008
    Date of Patent: June 7, 2011
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Steven M. Etter, Mingjiao Liu, Ali Salih, David D. Marreiro, Sudhama C. Shastri
  • Publication number: 20110121429
    Abstract: A vertical bidirectional protection diode including, on a heavily-doped substrate of a first conductivity type, first, second, and third regions of the first, second, and first conductivity types, these regions all having a doping level greater than from 2 to 5×1019 atoms/cm3 and being laterally delimited by an insulated trench, each of these regions having a thickness smaller than 4 ?m.
    Type: Application
    Filed: November 16, 2010
    Publication date: May 26, 2011
    Applicant: STMicroelectronics (Tours) SAS
    Inventor: Benjamin Morillon
  • Publication number: 20110115055
    Abstract: To provide a technique that can decrease the leak current due to the photoelectric effect in a semiconductor device with a Zener diode. In a bidirectional Zener diode IZD having a trench structure in the invention, an upper electrode UE extends from an inside of an opening OP to cover a trench TR (isolation region). As shown in FIG. 8, in the bidirectional Zener diode IZD of the invention, the upper electrode UE is formed to cover the inner walls of the trenches TRs. Thus, even when light is applied to the bidirectional Zener diode IZD, the light can be prevented from entering the p-n junction formed at the boundary between the n-type semiconductor region NR and the p-type semiconductor region PR from the inner wall of the trench TR.
    Type: Application
    Filed: November 18, 2010
    Publication date: May 19, 2011
    Inventors: Ryo NIIDE, Toshiya Nozawa
  • Publication number: 20110095399
    Abstract: A method is for manufacturing semiconductor chips from a wafer which includes a plurality of semiconductor chips. Defects in the crystal structure of the chips may be substantially reduced by producing rupture joints in the surface of the wafer after the wafer has been produced, and by breaking the wafer along the rupture joints to separate the semiconductor chips.
    Type: Application
    Filed: November 7, 2005
    Publication date: April 28, 2011
    Inventors: Richard Spitz, Alfred Goerlach, Friderike Hahn
  • Patent number: 7932525
    Abstract: A semiconductor light-emitting device includes: a light-emitting semiconductor element arranged on a lead frame; a transparent resin mold covering the light-emitting semiconductor element and the lead frame except a terminal portion of the lead frame; and a reflective surface formed on a bent portion of part of the lead frame. The terminal portion of the lead frame has a terminal structure, which can serve as a combination of a top-view type and a side-view type.
    Type: Grant
    Filed: January 25, 2008
    Date of Patent: April 26, 2011
    Assignees: Iwatani Corporation, Iwatani Electronics Corporation
    Inventor: Abe Osamu
  • Patent number: 7928533
    Abstract: An avalanche photodiode with a nano-scale reach-through structure comprising n-doped and p-doped regions, formed on a silicon island on an insulator, so that the avalanche photodiode may be electrically isolated from other circuitry on other silicon islands on the same silicon chip as the avalanche photodiode. For some embodiments, multiplied holes generated by an avalanche reduces the electric field in the depletion region of the n-doped and p-doped regions to bring about self-quenching of the avalanche photodiode. Other embodiments are described and claimed.
    Type: Grant
    Filed: August 14, 2008
    Date of Patent: April 19, 2011
    Assignee: California Institute of Technology
    Inventors: Xinyu Zheng, Bedabrata Pain, Thomas J. Cunningham
  • Patent number: 7919790
    Abstract: A semiconductor substrate and a method of its manufacture has a semiconductor substrate having a carbon concentration in a range of 6.0×1015 to 2.0×1017 atoms/cm3, both inclusively. One principal surface of the substrate is irradiated with protons and then heat-treated to thereby form a broad buffer structure, namely a region in a first semiconductor layer where a net impurity doping concentration is locally maximized. Due to the broad buffer structure, lifetime values are substantially equalized in a region extending from an interface between the first semiconductor layer and a second semiconductor layer formed on the first semiconductor layer to the region where the net impurity doping concentration is locally maximized. In addition, the local minimum of lifetime values of the first semiconductor layer becomes high.
    Type: Grant
    Filed: February 8, 2009
    Date of Patent: April 5, 2011
    Assignee: Fuji Electric Systems Co., Ltd.
    Inventor: Michio Nemoto
  • Patent number: 7902570
    Abstract: A single-photon detector is disclosed that provides reduced afterpulsing without some of the disadvantages for doing so in the prior art. An embodiment of the present invention provides a stimulus pulse to the active area of an avalanche photodetector to stimulate charges that are trapped in energy trap states to detrap. In some embodiments of the present invention, the stimulus pulse is a thermal pulse.
    Type: Grant
    Filed: October 9, 2009
    Date of Patent: March 8, 2011
    Assignee: Princeton Lightwave, Inc.
    Inventors: Mark Allen Itzler, Rafael Ben-Michael, Sabbir Sajjad Rangwala
  • Patent number: 7898001
    Abstract: A semiconductor device includes a semiconductor substrate, a photon avalanche detector in the semiconductor substrate. The photon avalanche detector includes an anode of a first conductivity type and a cathode of a second conductivity type. A guard ring is in the semiconductor substrate and at least partially surrounds the photon avalanche detector. A passivation layer of the first conductivity type is in contact with the guard ring to reduce an electric field at an edge of the photon avalanche detector.
    Type: Grant
    Filed: December 3, 2008
    Date of Patent: March 1, 2011
    Assignees: STMicroelectronics (Research & Development) Limited, The University Court of the University of Edinburgh, Ecole Polytechnique Federale De Lausanne
    Inventors: Justin Richardson, Lindsay Grant, Marek Gersbach, Edoardo Charbon, Cristiano Niclass, Robert Henderson
  • Patent number: 7875905
    Abstract: A semiconductor optical receiver device is provided, which a mesa comprising a plurality of semiconductor crystal layers formed on a semiconductor substrate including a pn junction having a first conductive semiconductor crystal layer and a second conductive semiconductor crystal layer and including a first contact layer on the semiconductor substrate, a plurality of electrodes to apply electric field to the pn junction are coupled on the semiconductor substrate, a second contact layer is formed on a buried layer in which the mesa is buried, and the electric field is applied to the pn junction through the first and second contact layers.
    Type: Grant
    Filed: April 15, 2008
    Date of Patent: January 25, 2011
    Assignee: Opnext Japan, Inc.
    Inventors: Takashi Toyonaka, Hiroyuki Kamiyama, Kazuhiro Komatsu
  • Patent number: 7859083
    Abstract: A semiconductor device is provided with Zener diodes which are formed by using a polysilicon gate layer(s) so as to be connected to each other in parallel. Parallel-connected rectangular Zener diodes are formed outside an active region or parallel-connected striped Zener diodes are formed inside the active region. The Zener diodes increase the ESD capability of the semiconductor device.
    Type: Grant
    Filed: August 8, 2008
    Date of Patent: December 28, 2010
    Assignee: Fuji Electric Systems Co., Ltd.
    Inventors: Takeyoshi Nishimura, Takashi Kobayashi, Yasushi Niimura, Tadanori Yamada
  • Patent number: 7851823
    Abstract: A transmitted light absorption/recombination layer, a barrier layer, a wavelength selection/absorption layer, and an InP window layer having a p-type region are supported by an n-type substrate and arranged in that order. Light with a wavelength of 1.3 ?m reaches the wavelength selection/absorption layer through the InP window layer. Then, the light is absorbed by the wavelength selection/absorption layer and drawn from the device as an electric current signal. Light with a wavelength of 1.55 ?m reaches the transmitted light absorption/recombination layer through the barrier layer. Then, the light is absorbed by the transmitted light absorption/recombination layer, generating electrons and holes. These electrons and holes recombine with each other and, hence, disappear.
    Type: Grant
    Filed: April 7, 2008
    Date of Patent: December 14, 2010
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Eitaro Ishimura
  • Patent number: 7842967
    Abstract: A power supply device is disclosed that is able to satisfy the power requirements of a device in service and has high efficiency. The power supply device includes a first power supply; a voltage step-up unit that steps up an output voltage of the first power supply; a voltage step-down unit that steps down an output voltage of the voltage step-up unit; and a load that is driven to operate by an output voltage of the voltage step-down unit. The voltage step-up unit steps up the output voltage of the first power supply to a lower limit of an operating voltage of the voltage step-down unit.
    Type: Grant
    Filed: June 8, 2007
    Date of Patent: November 30, 2010
    Assignee: Ricoh Company, Ltd.
    Inventors: Masaya Ohtsuka, Yoshinori Ueda
  • Publication number: 20100252912
    Abstract: A method of manufacturing a semiconductor device, comprising the steps of preparing a structure including a semiconductor substrate, an element formed therein, a through hole formed to penetrate the semiconductor substrate, and an insulating layer formed on both surface sides of the semiconductor substrate and an inner surface of the through hole, and covering the element, forming a penetrating electrode in the through hole, forming a first barrier metal pattern layer covering the penetrating electrode, forming a contact hole reaching a connection portion of the element in the insulating layer, removing a natural oxide film on the connection portion of the element in the contact hole, and forming a wiring layer connected to the first barrier metal pattern layer and connected to the element through the contact hole.
    Type: Application
    Filed: April 1, 2010
    Publication date: October 7, 2010
    Applicant: Shinko Electric Industries Co., Ltd.
    Inventor: Kei MURAYAMA
  • Patent number: 7781786
    Abstract: Impurity concentration of a second semiconductor region is set such that when a predetermined reverse bias is applied to a heterojunction diode configured by a first semiconductor region and the second semiconductor region, a breakdown voltage at least in a heterojunction region other than outer peripheral ends of the heterojunction diode is a breakdown voltage of a semiconductor device.
    Type: Grant
    Filed: April 10, 2007
    Date of Patent: August 24, 2010
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Tetsuya Hayashi, Masakatsu Hoshi, Yoshio Shimoida, Hideaki Tanaka, Shigeharu Yamagami
  • Patent number: 7772600
    Abstract: Disclosed are a light emitting device having a zener diode therein and a method of fabricating the light emitting device. The light emitting device comprises a P-type silicon substrate having a zener diode region and a light emitting diode region. A first N-type compound semiconductor layer is contacted to the zener diode region of the P-type silicon substrate to exhibit characteristics of a zener diode together with the P-type silicon substrate. Further, a second N-type compound semiconductor layer is positioned on the light emitting diode region of the P-type silicon substrate. The second N-type compound semiconductor layer is spaced apart from the first N-type compound semiconductor layer. Meanwhile, a P-type compound semiconductor layer is positioned on the second N-type compound semiconductor layer, and an active layer is interposed between the second N-type compound semiconductor layer and the P-type compound semiconductor layer.
    Type: Grant
    Filed: March 20, 2007
    Date of Patent: August 10, 2010
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Duck Hwan Oh, Sang Joon Lee, Kyung Hae Kim
  • Patent number: 7750439
    Abstract: An ESD protection device includes: a semiconductor substrate of a first conductivity type having a first major surface and a second major surface; a signal input electrode formed on the first major surface of the semiconductor substrate; a base region of a second conductivity type formed on a surface region of the second major surface of the semiconductor substrate; a diffusion region of the first conductivity type; a resistor layer formed on the second major surface of the semiconductor substrate of the first conductivity type; a signal output electrode electrically connected to the diffusion region of the first conductivity type; and a ground electrode electrically connected to the resistor layer. The diffusion region is selectively formed on a surface region of the base region of the second conductivity type in the semiconductor substrate of the first conductivity type. The resistor layer is electrically connected to the diffusion region of the first conductivity type.
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: July 6, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tomoki Inoue
  • Patent number: 7719029
    Abstract: A single-photon avalanche detector is disclosed that is operable at wavelengths greater than 1000 nm and at operating speeds greater than 10 MHz. The single-photon avalanche detector comprises a thin-film resistor and avalanche photodiode that are monolithically integrated such that little or no additional capacitance is associated with the addition of the resistor.
    Type: Grant
    Filed: May 17, 2007
    Date of Patent: May 18, 2010
    Assignee: Princeton Lightwave, Inc.
    Inventor: Mark Allen Itzler
  • Patent number: 7709924
    Abstract: A semiconductor structure and a method for operating the same. The method includes providing a semiconductor structure. The semiconductor structure includes first, second, third, and fourth doped semiconductor regions. The second doped semiconductor region is in direct physical contact with the first and third doped semiconductor regions. The fourth doped semiconductor region is in direct physical contact with the third doped semiconductor region. The first and second doped semiconductor regions are doped with a first doping polarity. The third and fourth doped semiconductor regions are doped with a second doping polarity. The method further includes (i) electrically coupling the first and fourth doped semiconductor regions to a first node and a second node of the semiconductor structure, respectively, and (ii) electrically charging the first and second nodes to first and second electric potentials, respectively. The first electric potential is different from the second electric potential.
    Type: Grant
    Filed: July 16, 2007
    Date of Patent: May 4, 2010
    Assignee: International Business Machines Corporation
    Inventor: Steven Howard Voldman
  • Publication number: 20100102408
    Abstract: An electron tube of the present invention includes: a vacuum vessel including a face plate portion made of synthetic silica and having a surface on which a photoelectric surface is provided, a stem portion arranged facing the photoelectric surface and made of synthetic silica, and a side tube portion having one end connected to the face plate portion and the other end connected to the stem portion and made of synthetic silica; a projection portion arranged in the vacuum vessel, extending from the stem portion toward the photoelectric surface, and made of synthetic silica; and an electron detector arranged on the projection portion, for detecting electrons from the photoelectric surface, and made of silicon.
    Type: Application
    Filed: October 23, 2008
    Publication date: April 29, 2010
    Applicants: HAMAMATSU PHOTONICS K.K., THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Motohiro SUYAMA, Atsuhito FUKASAWA, Katsushi ARISAKA, Hanguo WANG
  • Publication number: 20100084663
    Abstract: A silicon carbide Zener diode is a bipolar semiconductor device that has a mesa structure and includes a silicon carbide single crystal substrate of a first conductivity type, formed thereon, a silicon carbide conductive layer of a first conductivity type, and a silicon carbide conductive layer of a second conductivity type formed on the silicon carbide conductive layer of a first conductivity type, wherein a depletion layer that is formed under reverse bias at a junction between the silicon carbide conductive layer of a first conductivity type and the silicon carbide conductive layer of a second conductivity type does not reach a mesa corner formed in the silicon carbide conductive layer of a first conductivity type.
    Type: Application
    Filed: April 25, 2008
    Publication date: April 8, 2010
    Applicant: Central Research Institute of Electric Power
    Inventors: Ryosuke Ishii, Koji Nakayama, Yoshitaka Sugawara, Hidekazu Tsuchida
  • Patent number: 7687891
    Abstract: A semiconductor device includes a first layer having a first conductivity type, a second layer having a second conductivity type, a third layer having the second conductivity type, one or more first zones having the first conductivity type and located within the second layer, wherein each one of the one or more first zones is adjacent to the third layer, and one or more second zones having the second conductivity type and located within the second layer, wherein each one of the one or more second zones is adjacent to one or more of the one or more first zones.
    Type: Grant
    Filed: May 14, 2007
    Date of Patent: March 30, 2010
    Assignee: Infineon Technologies AG
    Inventors: Hans-Joachim Schulze, Hans-Peter Felsl
  • Patent number: 7666751
    Abstract: In one embodiment, high doped semiconductor channels are formed in a semiconductor region of an opposite conductivity type to increase the capacitance of the device.
    Type: Grant
    Filed: September 21, 2007
    Date of Patent: February 23, 2010
    Assignee: Semiconductor Components Industries, LLC
    Inventors: David D. Marreiro, Sudhama C. Shastri, Gordon M. Grivna, Earl D. Fuchs
  • Patent number: 7663090
    Abstract: A biasing circuit for a photodiode. The novel biasing circuit includes a first system for setting a reference gain threshold, a second system for setting an operating gain threshold, and a third system for adjusting a bias of the photodiode until a ratio of the operating gain threshold to the reference gain threshold is equal to a predetermined factor Z. In an illustrative embodiment, the reference gain threshold corresponds to a given probability of an output of the photodiode crossing the reference gain threshold when the photodiode is operating at a reference gain bias, and the operating gain threshold corresponds to a given probability of the photodiode output crossing the operating gain threshold when the photodiode is operating at an operating gain bias. The predetermined factor Z is a ratio of noise at a desired operating gain of the photodiode to noise at the reference gain of the photodiode.
    Type: Grant
    Filed: August 14, 2008
    Date of Patent: February 16, 2010
    Assignee: Raytheon Company
    Inventor: Robert W. Byren
  • Patent number: 7638857
    Abstract: A silicon controlled rectifier structure is provided in a substrate having a first conductive type. A well region formed within the substrate has a second conductive type. A first dopant region formed within the substrate and the well region has the first conductive type. A second dopant region formed within the substrate and a portion of the well region has the second conductive type. A third dopant region formed under the second dopant region has the first conductive type, in which the second and the third regions form a vertical Zener diode. A fourth dopant region formed within the substrate and separated from the second dopant region by a separation structure has the second conductive type. A fifth dopant region is formed within the substrate in a manner that the fourth dopant region is between the isolation structure and the fifth dopant region, and has the first conductive type.
    Type: Grant
    Filed: May 7, 2008
    Date of Patent: December 29, 2009
    Assignee: United Microelectronics Corp.
    Inventors: Hsin-Yen Hwang, Shu-Hsuan Su, Tien-Hao Tang