Abstract: Disposal and replacement of bonding pads is conducted easily and accurately. A semiconductor chip that includes bonding pads is fixed on a die pad. A relay chip is fixed on the semiconductor chip via an insulating material. The relay chip includes bonding pads that are interconnected via a wiring pattern, which includes a single-layer or multi-layer interconnection structure, and convert the disposition of the bonding pads of the semiconductor chip to a different direction. The bonding pads of the semiconductor chip are connected to the bonding pads of the relay chip via wires, and the bonding pads of the relay chip are connected to bonding pads of a lead frame via wires.

Abstract: An opto-electronic package is provided for mounting on a module base. The package comprises a generally rectangular package. An optical connector extends from a first side of the package body along an optical axis, generally parallel to the module base. A radio frequency connector extends from a second side of the package body along a RF axis, generally parallel to the module base. A plurality of electronic leads and mounting tabs each extend from at least one of the second side and a third side of the package body. A fourth side of the package body is adjacent the first side and free of connectors, leads, and mounting tabs for mounting the package in a corner of the module formed by first and second module walls. The fourth wall of the package body is positioned adjacent the first module wall and the optical connector extends through the second module wall.

Abstract: A surface mounted electronic component includes a case and a board mounting part. The board mounting part includes a leg bent in parallel with a printed circuit board at its tip, an outer frame soldered to a land of a mounted part on the board, and a projection disposed in the outer frame and inserted into a hole in the mounted part. The electronic component is mounted on a surface of the printed circuit board in various electronic instruments, and can keep to be mounted on the board tightly even when an external force is applied.

Abstract: A semiconductor device for supplying a signal to an electro-optical device which displays a two-dimensional image, includes first terminals which are formed along a first side of the semiconductor device in a longitudinal direction and have a length L1 in a direction intersecting the longitudinal direction at right angles; and second terminals which are formed along a second side intersecting the first side at right angles and have a length L2 which is greater than the length L1 in the longitudinal direction.

Abstract: A power semiconductor module with a connection structure in which an electrode terminal whose one end is connected with an electric power semiconductor device which is resin sealed inside of the case, is exposed along an outer surface of a case for taking out electrode from the semiconductor device, and is electrically connected to an electrode for external connection disposed on the electrode terminal, wherein a female screw hole for screwing is provided on side of the outer surface of the case, a male screw member formed at its opposite ends with screw threads is threadedly engaged with the female screw hole through the electrode terminal.

Abstract: A semiconductor package contains a plurality of sheet metal leads that are attached to one or more terminals on a top side of a semiconductor die. A heat sink is attached to a terminal on a bottom side of the die. Each of the leads extends across the die and beyond opposite edges of the die and is symmetrical about an axis of the die. At the locations where the leads pass over the edges of the die notches are formed on the sides of the leads which face the die, thereby assuring that there is no contact between the leads and the peripheral portion of the top surface of the die. Particularly in power MOSFETs the peripheral portion of the top surface normally contains an equipotential ring which is directly connected to the backside (drain) of the MOSFET, and hence a short between the leads on the top of the die and the equipotential ring would destroy the device. The result is a package that is extremely rugged and that is symmetrical about the axis of the die.

Abstract: There is provided is a semiconductor laser device capable of simplifying fabricating processes with a simple construction and easily mounting two semiconductor laser elements and a monitoring PD on a compact package and a wire bonding method for the semiconductor laser device. There are provided a stem 100 provided with a plurality of lead pins 121 through 124, a sub-mount 160 that is die-bonded onto the stem 100 and has its surface formed integrally with a monitoring PD 140 and two semiconductor laser elements 131 and 132 that are die-bonded onto the sub-mount 160 and have emission light monitored by the monitoring PD 140. A first bonding surface i.e. anode electrode 183 of the monitoring PD 140 and a second bonding surface i.e. end surface 123a of a lead pin 123 that is approximately perpendicular to the first bonding surface are wire-bonded to each other.

Abstract: A semiconductor device comprising: a substrate (30) including a plurality of holes (36) and a surface over which an interconnecting pattern (32) is formed, part of the interconnecting pattern (32) being superposed over the holes (36); a semiconductor chip (10) including a plurality of electrodes (12) which are disposed over another surface of the substrate (30) to correspond to the holes (36); and conductive members provided within the holes (36) for electrically connecting the electrodes (12) to the interconnecting pattern (32)

Abstract: An adhesive film for semiconductor comprises a support film, and adhesive layers formed on both surfaces of the support film, in which each adhesive layer comprises an adhesive having a glass transition temperature of 200° C. or less, a coefficient of linear expansion of 70 ppm or less, and a storage elastic modulus of 3 GPa or less, and the adhesive film has a total thickness of between 43 and 57 &mgr;m. A lead frame for semiconductor comprises a lead frame and an adhesive film for semiconductor according to the present invention. A semiconductor device comprises a lead frame and a semiconductor element, in which the lead frame and the semiconductor element are adhered to each other via an adhesive film for semiconductor according to the present invention.

Abstract: A modular semiconductor die package is provided. The semiconductor die package includes a polymer base for mounting at least one semiconductor die. A polymer cap is operatively secured over the base forming a cavity. The cap includes a light transmissive member operatively positioned to allow light of predetermined wavelengths to pass between at least a portion of the surface of the die and the light transmissive member. A plurality of conductive leads extend through the base to form connections with the semiconductor die(s) positioned in the cavity.

Abstract: The electronic component has semiconductor chips that are stacked on one another. On their active top sides, the chips having interconnects for rewiring to contact areas through contacts formed on the sawn edges of the semiconductor chip. The electronic components of overlying and underlying semiconductor chips are thus connected to one another via the through contacts.

Abstract: Disposal and replacement of bonding pads is conducted easily and accurately. A semiconductor chip that includes bonding pads is fixed on a die pad. A relay chip is fixed on the semiconductor chip via an insulating material. The relay chip includes bonding pads that are interconnected via a wiring pattern, which comprises a single-layer or multi-layer interconnection structure, and convert the disposition of the bonding pads of the semiconductor chip to a different direction. The bonding pads of the semiconductor chip are connected to the bonding pads of the relay chip via wires, and the bonding pads of the relay chip are connected to bonding pads of a lead frame via wires.

Abstract: The leadframe has a perforation to form, between a central platform and a peripheral part located a certain distance apart, radiating elongate leads. The leadframe has, on its rear face that comes into contact with a bearing surface of a mold, at least one recess and a groove for connecting this recess to the perforation.

Abstract: The rectifier diode includes a press-fit base (12) including an axially extending substantially securing region (14) for a semiconductor chip (20); a head wire (24) attached to the semiconductor chip (20); an encapsulation (40) for at least an end portion (26) of the head wire (24) connected to the semiconductor chip (20); a collar (44) extending from a peripheral end portion (42) of the securing region (14), which extends axially beyond a securing face (16) of the securing region (14) and is inclined to an axis (50) of the securing region (14). The securing face (16) is closer to the head wire (24) than is an outer edge region (12′) of the press-fit base (12).

Abstract: A molded electronic component has numerous connection pins protruding on a single plane from a side surface area of an essentially cuboid housing, and a circumferential ridge of molded housing material protrudes from the other side area surfaces on the plane of the connection pins. The thickness of this ridge essentially corresponds to the thickness of the connection pins. On the side surface area located opposite the side surface area from which the connection pins protrude, in the plane of the connection pins, the ridge passes or transitions into a groove such that there is no ridge protruding outwardly beyond the side surface in this area. Thus, the component can be better placed by a tool such as a suction needle onto a printed circuit board without interference from such a ridge. The invention is particularly suitable for the production of molded electronic components whose separation plane runs through that housing surface which serves as a docking surface for a suction needle.

Abstract: A modularly expandable semiconductor component includes at least one carrier layer, at least one intermediate layer, at least one coverlayer, at least one semiconductor chip, external contacts and a conductor configuration. The intermediate layer is provided with at least one opening, into which the at least one semiconductor chip is inserted. The carrier layer, the intermediate layer and the coverlayer are connected one above another and form a submodule. If a plurality of submodules are installed above one another, a semiconductor component is provided in which the semiconductor chips are located in several mutually overlying planes. The semiconductor chips can be interconnected. A method for producing a semiconductor component is also provided.

Abstract: A semiconductor device includes an insulating substrate, a cutout formed in side surfaces of the substrate, a conductive pad formed on the obverse surface of the substrate, an electrode formed on the reverse surface of the substrate, a semiconductor chip mounted on the substrate, and a connector which connects the pad to the electrode. The connector is arranged in the cutout.

Abstract: The present invention relates to an electronic component formed of an electrically conductive plate and including a plurality of leads 1, 2 each having an island 10 for mounting of a semiconductor chip 3 or having a connecting portion 20 for connection with a wire 4. According to an electronic component X offered by the present invention, at least a set of mutually adjacent leads 1, 2 have their respective mutually facing side surfaces 10a, 20a made non-parallel to each other. Preferably, at least one side surface 20a (10a) of the leads 1, 2 is at least partially curved, folded and/or slanted.

Abstract: A semiconductor wafer is disclosed for avoiding probed marks while testing. The wafer has a plurality of metal interconnects, each metal interconnect connecting underlying bonding pad, corresponding contact pad and test pad. Each contact pad being outer electrical connection terminal is connected in series by a metal interconnect between test pad and bonding pad, so that the section of the metal interconnect between bonding pad and contact pad enable be tested during probing the test pad. Furthermore, there is no probing mark on the contact pad.

Abstract: The present invention provides a resin-sealed semiconductor IC package of a large integration size having a size substantially equal to that of its component semiconductor IC chip. The resin-sealed semiconductor IC package comprises a semiconductor IC chip, a plurality of leads arranged on the semiconductor IC chip and having end portions bent so as to extend perpendicularly to the major surface of the semiconductor IC chip, a resin molding sealing the semiconductor IC chip and the leads therein so that the tips of the end portions of the leads are exposed on one surface thereof, and conductive elements connected respectively to the exposed tips of the leads.

Abstract: A case for an integrated-circuit mounted on a substrate provides electrical conducting contacts between the integrated circuit and contact elements on an external circuit, e.g., a printed circuit, connected to the case. The case includes contact pins and planar contact leads have free ends that are electrically connected by pressure, without bonding, to corresponding contact areas on the substrate. The substrate carries leads connecting the substrate contact areas with the integrated circuit contacts. At least some of the planar contact leads are configured as a lead structure having a predetermined impedance.

Abstract: An embedded type package of power semiconductor device comprises a semiconductor device and a cup. One side of the semiconductor device is connected to a leader and another side of the semiconductor device is connected to the cup. The cup has guiding bevel and annulus groove on bottom side thereof. The cup further has an embedding part on outer side thereof and having two slantingly planes. The cup further comprises a heatsink connected to the semiconductor device; and a cone-shaped inner wall bordered to the heatsink and having a mold lock.

Abstract: A semiconductor package contains a plurality of sheet metal leads that are attached to one or more terminals on a top side of a semiconductor die. A heat sink is attached to a terminal on a bottom side of the die. Each of the leads extends across the die and beyond opposite edges of the die and is symmetrical about an axis of the die. At the locations where the leads pass over the edges of the die notches are formed on the sides of the leads which face the die, thereby assuring that there is no contact between the leads and the peripheral portion of the top surface of the die. Particularly in power MOSFETs the peripheral portion of the top surface normally contains an equipotential ring which is directly connected to the backside (drain) of the MOSFET, and hence a short between the leads on the top of the die and the equipotential ring would destroy the device. The result is a package that is extremely rugged and that is symmetrical about the axis of the die.

Abstract: A semiconductor device, e.g. power transistor (1, FIG. 1), has a gate or other electrode (4) connected via a test pad (15B) to a set of parallel fingers (21A-21F) in a first portion of a bond pad (12). An ESD protection device (13) is connected via a test pad (15C) to a set of parallel fingers (22A-22C) in a second portion of the bond pad (12). A voltage clamping protection device (14) is connected via a test pad (15A) to a set of parallel fingers (23A-23C) in a third portion of the bond pad (12). The three sets of fingers overlap in an interdigitated pattern defining a bond pad area (24). The transistor (1) and the protection devices (13, 14) may be independently tested and then connected to a same terminal (7C) by a wire (16) bonded over a rectangular bonded region (25) extending across the bond pad area (24). This arrangement allows for a large misalignment in the bond process while still achieving connection of the three bond pad portions.

Abstract: A method of increasing the packaging density of input/output interconnections between the semiconductor chip and substrate is described. Fine insulated wire is utilized for the connections to bonding pads provided selectively on the semiconductor chip without limiting to locating them along the periphery of the chip. The connections are made easily and quickly with the ball bonding process.

Abstract: A leaded semiconductor device package for nonsoldering assembling is disclosed. In the package of the invention, both leads of a semiconductor device package are flattened, cut and bent by automatic machines on the bais of conventional packaging process. Unlike a conventional semiconductor device package which is electrically connected to a circuit by soldering, the flattened and bent parts of both leads of the semiconductor device package can be electrically connected to a circuit by elastically contacting and directly assembling without soldering.

Abstract: The side of one of the source electrodes 7a and 7b of two semiconductor modules Q1 and Q2 corresponding to a pair of upper and lower arms are installed parallel with the outer side of the other source electrode inside packages 8a and 8b. Both the modules are arranged parallel to one another in such a way that both the sides are opposed, an inter-module electrode terminal 15 for connecting the source electrode 7a of the module Q1 and the drain electrode (base substrate) 6b of the module Q2 is formed in a block shape, and one end of the inter-module electrode terminal 15 is vertically installed parallel and close to the side of the source electrode 7b on the base substrate of the module Q2.

Abstract: An object is to suppress resonance phenomenon. A pair of reinforcing members (18) are fixed on a gate drive substrate (7) with spacers (37) interposed therebetween and upright portions (40) of the pair of reinforcing members (18) are fastened with screws on a side wall of a cathode flange. A spacer (118) is fixed on the gate drive substrate (7) and a projection (118a) of the spacer (118) is inserted in an engaging member (119) fixed on the bottom of the cathode fin electrode (5) and thus fixed on the bottom of the cathode fin electrode (5). The pair of upright portions (40) as the first and second supporting points and the projection (118a) as the third supporting point stably support the gate drive substrate (7) on the cathode fin electrode (5) without freedom of rotation at the three positions arranged to surround an opening (49).

Abstract: A semiconductor device according to the present invention includes a first semiconductor chip having a semiconductor substrate area and a transistor forming area, at least one first electrode formed on the periphery of the semiconductor substrate area, at least one second electrode formed on the periphery of the transistor forming area, a second semiconductor chip mounted on the semiconductor substrate area of the first semiconductor chip, at least one third electrode formed on the second semiconductor chip, a plurality of leads disposed around the first semiconductor chip, at least one first metal wire which connects the first electrode of the first semiconductor chip and the third electrode of the second semiconductor chip, at least one second metal wire which connects the second electrode of the first semiconductor chip and each of the leads, and an encapsulating resin for sealing the first and second semiconductor chips, the first and second metal wires and some of the leads.

Abstract: The present invention provides a lead frame for use in packaging a circuit having a discrete component, and a method of manufacture thereof. In one embodiment, the lead frame includes a lead support structure and a plurality of severable leads that are coupled to the lead support structure. The plurality of severable leads extend inward from the lead support structure to predetermined locations corresponding to terminals of the discrete component.

Abstract: The present invention relates to a packaged semiconductor that includes a semiconductor having a plurality of leads extending therefrom. The leads are formed by mounting the semiconductor device in a lead frame and punching and sealing the leads in the semiconductor device using a resin, wherein the leads have been bent to a predetermined configuration. A connector is further provided to connect leads to the frame, and the connector is bent at substantially the same time as when the leads are bent to the predetermined configuration. According to the packaged semiconductor, a lead is not cut off from a lead frame, and the connection between the two can be maintained even after a bending process is finished.

Abstract: The semiconductor device includes a semiconductor chip and tapes. The tape includes insulating layers with the conductive layers which are sandwiched between the insulating layers. The tapes extend from the front surface to the back surface of the semiconductor chip and are fixed to the chip. Each of the conductive layers is exposed at the front and the back sides of the chip, respectively.

Abstract: A configuration for a conventional lead frame for conserving limited leads and for allowing the location of bond pads anywhere on the periphery of the semiconductor device and for reducing the cost of tooling changes by permitting the use of current tooling. The present invention utilizes an extended lead finger that extends along the periphery of a semiconductor device to provide a power source or ground so that any number of bond pads may be used in any position without requiring additional leads or tooling changes.

Abstract: A semiconductor element has electrodes on its periphery, leads for making external connections respectively in correspondence with the electrodes and connected to the electrodes through wires, and a package body in which a semiconductor element and leads are encapsulated with a resin material. The leads extend toward the bottom side of the package body for insertion into a socket and are bent alternately in a raised shape and a recessed shape, with the tops of the raised parts and the bottoms of the recessed parts exposed at side surfaces of the package body. The parts serving as the external connection electrodes (i.e., the tops of the raised parts and the bottoms of the recessed parts) are arranged at a large pitch, so that the area of the external connection electrodes can be enlarged to enhance the reliability of the contact.

Abstract: A semiconductor device assembly according to the present invention may comprise a semiconductor die having at least one contact pad thereon and a package substrate having at least one lead pad thereon. The package substrate is sized to receive the semiconductor die so that the contact pad on the semiconductor die is substantially aligned with the lead pad on the package substrate when the semiconductor die is positioned on the package substrate. A coil spring is positioned between the contact pad on the semiconductor die and the lead pad on the package substrate so that the axis of the coil spring is substantially parallel to the contact pad contained on the semiconductor die and the lead pad contained on the package substrate.

Abstract: In a stacked-type semiconductor unit having a plurality of semiconductor devices stacked on a base board including a base electrode, each semiconductor device has a wiring board including an external electrode provided in an end portion thereof. The semiconductor devices are stacked on the base board such that the external electrodes are aligned with one another. Then, the external electrodes are electrically connected to the base board by solder.

Abstract: There is provided a ball-grid-array semiconductor device. The semiconductor device has a semiconductor element sealed with a resin material. In addition, a lead frame is connected to the semiconductor element in the resin material. The lead frame is provided with terminal portions that protrude through the surface of the resin material.

Abstract: A semiconductor device includes a substrate having a first surface, a second surface and at least one conductor part which are exposed at both the first and second surfaces of the substrate, a semiconductor chip provided on the first surface of the substrate and having a plurality of electrode pads, a plurality of leads, a plurality of bonding-wires electrically connecting the leads and the conductor parts to corresponding ones of the electrode pads of the semiconductor chip, and a resin package encapsulating the semiconductor chip, a part of the leads, and the substrate so that the conductor parts are exposed at the second surface of the substrate.

Abstract: A bearer strip having components arranged in several parallel rows with variable spacing between the rows so as to increase packing density while providing sufficient empty space for introducing free flowing plastic on the bearer strip.

Abstract: A connection component for a microelectronic device such as a semiconductor chip incorporates a support layer and conductive structures extending across a surface of the support layer. The conductive structures have anchors connecting them to the support layer, and releasable or unanchored portions.

Abstract: A semiconductor package, and a method for fabricating the package are provided. The package includes a semiconductor die, a lead frame, and a metal foil die mounting plate adapted to mount the die to the lead frame. In addition, the die mounting plate provides a thermally conductive path from the die to terminal leads of the package. Further, the die mounting plate can be configured to perform electrical functions, such as providing ground/power planes for the package, and adjusting an impedance of signal paths through the package. In a first embodiment the package can be fabricated using a tape under frame lead frame. In a second embodiment the package can be fabricated using a lead under chip lead frame.

Abstract: A press-fit package, such as a press-fit rectifier, includes an improved cup design which incorporates a mold lock formed within the inner wall of the cavity. a well is provided between the inner cavity wall and the die bond area to assist in mechanical decoupling of the press-fit force and the semiconductor die. An insert profile is formed along the outer surface of the cup to assist in proper alignment of the press-fit package during assembly, and a small lip is formed around the perimeter of the die bond area.

Abstract: A resin-encapsulated semiconductor package and a packaging structure, make it possible to provide for a high density mounting arrangement. Specifically, outer leads protrude from the two long sides of a rectangular package. The inner leads in the package, connected to the outer leads protruding from one long side, are connected through wires to the bonding pads of a semiconductor chip encapsulated in the package, whereas the inner leads in the package, connected to the outer leads protruding from the other long side, are in an electrically floating state in the package. The semiconductor packages are arranged in a direction on a card-shaped mounting board, and the opposed outer leads of adjoining semiconductor packages are electrically connected by wiring on the mounting board. The wirings are laid below the semiconductor packages so that they extend generally linearly.

Abstract: A semiconductor device 10 enables efficient use of semiconductor wafer and higher productivity by splitting an electric circuit function into a plurality of semiconductor chip portions 12 and interconnecting the plurality of semiconductor chip portions 12 on a single carrier tape.

Abstract: Integrated circuit chips and method of routing the interface pads from the face of the chip or die to one or more sidewall surfaces of the die. The interconnection is routed from the face of the die to one or more edges of the die, then routed over the edge of the die and onto the side surface. A new pad is then formed on the sidewall surface, which allows multiple die or chips to be stacked in a three-dimensional array, while enabling follow-on signal routing from the sidewall pads. The routing of the interconnects and formation of the sidewall pads can be carried out in an L-connect or L-shaped routing configuration, using a metalization process such as laser pantography.

Abstract: A DBS receiver front end which includes a tuner chip and a demodulator/decoder chip. The tuner chip converts a receive signal to a baseband signal using a tuning frequency signal generated from a tank circuit. The design of a package for the tuner chip maximally spaces the pins associated with high frequency signals by placing them on opposite sides of the chip (in the case of two high frequency signal sources) or (in the case of three high frequency signal sources) in a triangle formation with widely spaced vertices wherein at least two of the pins are adjacent to corners of the package. For two or more high frequency signal sources, a good determination of pin locations can be determined according to the formula P.sub.i =C+i.multidot..left brkt-bot.N/M.right brkt-bot., i=1, . . . , M, where P.sub.i are the pin numbers, N is a total number of pins around the perimeter of the package, M is a total number of the high frequency signal sources, and C is an offset number.

Abstract: Aspects for topside analysis of an integrated circuit die mounted in a flip-chip orientation are described. In an exemplary method aspect, the method includes isolating the multi-layer integrated circuit die from the flip-chip package, and exposing the multilayer integrated circuit die. The method further includes testing selected areas of the multi-layer integrated circuit die from a topside utilizing critical paths placed in a predetermined arrangement around edges of the multi-layer integrated circuit die.

Abstract: A molded plastic package incorporates a lead frame which includes a plurality of leads radially aligned around a central opening. A die is mounted in the central opening and is electrically connected to the leads by wire bonding. A molded plastic casing is formed over the die, wiring and lead frame to encapsulate the package. The lower surfaces of the die and lead frame are exposed through the package. A method for making the molded plastic package includes mounting the die and lead frame onto an adhesive tape, electrically connecting the die to the leads by wire bonding, forming a molded plastic casing over the die, wire bonding and lead frame, and then removing the adhesive tape to expose the lower surfaces of the die and the lead frame.

Abstract: A bottom lead semiconductor package includes a plurality of outer leads, wherein an outer portion of each of the outer leads is downwardly bent, and inner leads extend from a corresponding one of the outer leads respectively and are bent at least once upwardly and folded over onto a corresponding upper surface of the outer leads. A semiconductor chip is attached to an upper surface of each of the inner leads by a nonconductive adhesive, and a plurality of conductive wires or bumps electrically couples the chip to the inner leads. A molding compound seals a portion of the package including the chip, the inner leads and the wires, but externally exposes a downwardly bent portion of each of the outer leads.

Abstract: A semiconductor device of the present invention in which a plurality of lead terminals are provided for only one side, comprising a plurality of leads connected to the lead terminals, a semiconductor chip provided on an island and having a plurality of pads electrically connected to the leads on one side, a first extension lead which is connected to one lead terminal among the leads and at least a part of which is provided along a side of the semiconductor chip perpendicular to the side of it having the pads, a second extension lead at least a part of which is provided for a side of the semiconductor chip opposite to the side of it having the pads, and a suspension pin provided between one end of the first extension lead and one end of the second extension lead and connected to the island.