Liquid Coolant Patents (Class 257/714)
  • Patent number: 11967536
    Abstract: An electronic power unit has a substrate with a perpendicular direction and a flat insulating molded body has a metal layer on a first main face and conductor tracks on a second main face. The substrate is in a non-positive locking or materially-bonded manner on a base plate of the electronic power unit. A first fastening device is on the base plate in a non-positive locking manner on a cooling device or a housing section has a second fastening device provided to arrange the substrate in a non-positive locking manner on a cooling device.
    Type: Grant
    Filed: September 22, 2021
    Date of Patent: April 23, 2024
    Assignee: SEMIKRON ELEKTRONIK GMBH CO., KG
    Inventors: Valeriano Cardi, Stefan Hopfe, Maurilio Giovannantonio Muscolino, Matteo Santoro, Werner Obermaier
  • Patent number: 11961784
    Abstract: A first heat sink has a first inner surface and a first outer surface, and has a first through hole. A second heat sink has a second inner surface disposed with a clearance left from the first inner surface of the first heat sink, and a second outer surface opposite to the second inner surface, and has a second through hole. A semiconductor element is disposed within a clearance between the first inner surface of the first heat sink and the second inner surface of the second heat sink. A sealing member seals the semiconductor element within the clearance between the first inner surface and the second inner surface. A first hollow tube is made of metal, and connects the first through hole and the second through hole.
    Type: Grant
    Filed: November 19, 2018
    Date of Patent: April 16, 2024
    Assignee: Mitsubishi Electric Corporation
    Inventors: Arata Iizuka, Korehide Okamoto, Ryoya Shirahama
  • Patent number: 11942709
    Abstract: A terminal blade for a header assembly includes a first end defining a first axis and being partially coated with an anti-tarnish material and defining an adhesion region spaced from the anti-tarnish material coating. The terminal blade also includes a second end defining a second axis. The terminal blade further includes a bridge extending between the first end and the second end such that the first axis is substantially perpendicular to the second axis.
    Type: Grant
    Filed: April 16, 2020
    Date of Patent: March 26, 2024
    Assignee: Steering Solutions IP Holding Corporation
    Inventors: David L. Berg, Trenton R. Townsend
  • Patent number: 11903164
    Abstract: A heat dissipation apparatus includes a heat-conducting plate, where a liquid channel is disposed on a first surface of the heat-conducting plate; a mounting base, where an accommodation cavity configured to accommodate a partial area that is in the heat-conducting plate and that includes a second surface is disposed on the mounting base. The first surface and the second surface are disposed opposite to each other. A pressing plate is configured to fasten the heat-conducting plate in the accommodation cavity. The pressing plate is detachably and firmly connected to the mounting base, a sealing cavity is formed between the pressing plate and the first surface of the heat-conducting plate, and the sealing cavity is configured to accommodate the liquid channel A liquid inlet connector and a liquid outlet connector that are connected to the liquid channel are disposed on the pressing plate.
    Type: Grant
    Filed: December 16, 2021
    Date of Patent: February 13, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Xinhu Gong, Gaoliang Xia
  • Patent number: 11854936
    Abstract: A semiconductor device including a substrate, a semiconductor package, a thermal conductive bonding layer, and a lid is provided. The semiconductor package is disposed on the substrate. The thermal conductive bonding layer is disposed on the semiconductor package. The lid is attached to the thermal conductive bonding layer and covers the semiconductor package to prevent coolant from contacting the semiconductor package.
    Type: Grant
    Filed: January 17, 2023
    Date of Patent: December 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Chun-Hui Yu, Jeng-Nan Hung, Kuo-Chung Yee, Po-Fan Lin
  • Patent number: 11853133
    Abstract: A siphon-based heat sink for a server comprises a heat absorbing mechanism, a siphon mechanism, and a heat sink. The heat absorbing mechanism comprises a base plate and a cover plate. The base plate comprises a bottom plate and multiple sets of heat dissipating fins, and is in contact with the central processing unit. The heat sink comprises a cooling cavity and cooling fins. The evaporation cavity is communicated with the cooling cavity via two siphon tubes to enable heat transfer and circulation of a thermal conductive medium. Lower ends of the two fin plates are positioned close to and fixed to the bottom plate, while upper ends thereof are bent outward to form a curved mechanism, and an included angle between the two fin plates continuously increases from bottom to top.
    Type: Grant
    Filed: May 30, 2019
    Date of Patent: December 26, 2023
    Assignee: ZHENGZHOU YUNHAI INFORMATION TECHNOLOGY CO., LTD.
    Inventor: Bin Zong
  • Patent number: 11841393
    Abstract: Provided is a cooling unit to be used in an inspection of a semiconductor device. The cooling unit includes a jacket for dissipating heat of the semiconductor device. The jacket is provided with a light passing portion for passing light from the semiconductor device. The jacket has a space defining surface that faces the semiconductor device and defines a space between the space defining surface and the semiconductor device in a state where the light passing portion faces the semiconductor device. The jacket is provided with a supply flow path through which a fluid to be supplied to the space flows.
    Type: Grant
    Filed: October 9, 2019
    Date of Patent: December 12, 2023
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Tomonori Nakamura, Hirotaka Nonaka, Hiroyuki Matsuura, Hirotoshi Terada
  • Patent number: 11837514
    Abstract: According to an aspect of the first disclosure, a semiconductor device includes a base plate, a case that surrounds a region immediately above the base plate, a semiconductor chip provided in the region, a sealing resin that fills the region and a barrier layer provided on the sealing resin, wherein the barrier layer has a first surface facing the base plate, a second surface opposite to the first surface, and a convex part protruding upward from the second surface, the first surface has a longer distance to the base plate as getting farther from the center, the convex part is provided avoiding the center, and a height of the convex part is greater than a distance in a thickness direction of the barrier layer between a portion of the first surface immediately below the convex part and a portion of the first surface provided at the center.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: December 5, 2023
    Assignee: Mitsubishi Electric Corporation
    Inventor: Yusuke Kaji
  • Patent number: 11805620
    Abstract: A thermal management system and method for cooling a CT detector assembly of a CT imaging system. The thermal management system uses a combination of air cooling for the readout electronics of the CT detector assembly and liquid cooling for the X-ray sensors of the CT detector assembly. The hybrid air and liquid cooling systems and methods may be coupled together in the thermal management system and method to create a cooler temperature in the CT detector assembly. The CT detector assembly components may include CT detector modules, which may include X-ray sensors, readout electronics and other components.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: October 31, 2023
    Assignees: GE Precision Healthcare LLC, Prismatic Sensors AB
    Inventors: Nicholas Konkle, Eric Aasen, Scott Slavic, Kyle Reiser, Michael Boehm, Mats Hedberg
  • Patent number: 11804418
    Abstract: A heat exchange module, comprising an array of microchannels, where the array of microchannels extends in a first direction, and are separated from one another by a first sidewall. The array of microchannels is over a cold plate. A first array of fluid distribution channels is stacked over the array of microchannels and extend in a second direction that is substantially orthogonal to the first direction. The first array of fluid distribution channels extends from the first manifold and terminate between a first manifold and a second manifold. A second array of fluid distribution channels is stacked over the array of microchannels. The first array of fluid distribution channels and the second array of the fluid distribution channels are fluidically coupled to the microchannel array. A wall extends into the microchannel array below a second sidewall separating ones of the first array and ones of the second array of fluid distribution channels.
    Type: Grant
    Filed: January 11, 2019
    Date of Patent: October 31, 2023
    Assignee: Intel Corporation
    Inventors: Nicholas Neal, Je-Young Chang, Jae Kim, Ravindranath Mahajan
  • Patent number: 11804785
    Abstract: A power electronic arrangement has a plurality of single-phase power semiconductor modules and one multi-phase power semiconductor module, wherein each single-phase power semiconductor module has a first, at least frame-like housing, two first DC voltage terminal elements, a first AC voltage terminal element, first auxiliary terminal elements and a first switching device. The multi-phase power semiconductor module has a second, at least frame-like housing, two second DC voltage terminal elements, at least two second AC voltage terminal elements, second auxiliary terminal elements and a second switching device. The first and second DC voltage terminal elements each form a stack in a section of their length and on the terminal sections are designed identically. All the power semiconductor modules are arranged in a row in the direction of the normal vectors of the respective first longitudinal side.
    Type: Grant
    Filed: April 14, 2021
    Date of Patent: October 31, 2023
    Assignee: SEMIKRON ELEKTRONIK GMBH & CO. KG
    Inventors: Jürgen Steger, Andreas Maul
  • Patent number: 11716835
    Abstract: A thermal management module includes a fluid system in fluid communication with a main cooling fluid source; a first cooling fluid manifold, and a second cooling fluid manifold. The first cooling fluid manifold is in fluid communication with the fluid system and provides a cooling fluid between the fluid system and a first server rack adjacent to the thermal management module. The second cooling fluid manifold is in fluid communication with the fluid system and provides the cooling fluid between the fluid system and a second server rack adjacent to the thermal management module. The manifold is in internal position when no rack liquid is needed adjacently, and it is extended to the adjacent rack once fluid distribution is needed from the rack.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: August 1, 2023
    Assignee: BAIDU USA LLC
    Inventor: Tianyi Gao
  • Patent number: 11688665
    Abstract: An integrated circuit assembly may be formed having a substrate, a first integrated circuit device electrically attached to the substrate, a second integrated circuit device electrically attached to the first integrated circuit device, and a heat dissipation device defining a fluid chamber, wherein at least a portion of the first integrated circuit device and at least a portion of the second integrated circuit device are exposed to the fluid chamber. In further embodiments, at least one channel may be formed in an underfill material between the first integrated circuit device and the second integrated circuit device, between the first integrated circuit device and the substrate, and/or between the second integrated circuit device and the substrate, wherein the at least one channel is open to the fluid chamber.
    Type: Grant
    Filed: June 13, 2018
    Date of Patent: June 27, 2023
    Assignee: Intel Corporation
    Inventors: Feras Eid, Adel Elsherbini, Johanna Swan
  • Patent number: 11672106
    Abstract: A chassis includes top rails extending along a top side of the chassis, bottom rails extending along a bottom side of the chassis, a fluid inlet connected to the chassis that is configured to receive a thermal transfer fluid, and a fluid outlet connected to the chassis that is configured to discharge the thermal transfer fluid. The chassis further includes a thermal transfer fluid path extending between and fluidly coupled to the fluid inlet and the fluid outlet, wherein the thermal transfer fluid is configured to flow through the thermal transfer fluid path, and wherein the thermal transfer fluid path extends in a serpentine pattern through at least one of the top rails and through at least one of the bottom rails.
    Type: Grant
    Filed: June 28, 2021
    Date of Patent: June 6, 2023
    Assignee: Hamilton Sundstrand Corporation
    Inventors: Jason C. Duffy, Kenneth J. Trotman
  • Patent number: 11670569
    Abstract: Disclosed herein are channeled lids for integrated circuit (IC) packages, as well as related methods and devices. For example, in some embodiments, an IC package may include a die between a lid and a package substrate. A bottom surface of the lid may include a channel that at least partially overlaps the die.
    Type: Grant
    Filed: June 11, 2019
    Date of Patent: June 6, 2023
    Assignee: Intel Corporation
    Inventors: Manish Dubey, Amitesh Saha, Marco Aurelio Cartas, Peng Li, Bamidele Daniel Falola
  • Patent number: 11557874
    Abstract: Methods, devices, and systems for double-sided cooling of laser diodes are provided. In one aspect, a laser diode assembly includes a first heat sink, a plurality of submounts spaced apart from one another on the first heat sink, a plurality of laser diodes, and a second heat sink on top sides of the plurality of laser diodes. Each laser diode includes a corresponding active layer between a first-type doped semiconductor layer and a second-type doped semiconductor layer. A bottom side of each laser diode is positioned on a different corresponding submount of the plurality of submounts. The plurality of laser diode are electrically connected in series.
    Type: Grant
    Filed: May 18, 2021
    Date of Patent: January 17, 2023
    Assignee: Trumpf Photonics, Inc.
    Inventors: Prasanta Modak, Stefan Heinemann, Berthold Schmidt
  • Patent number: 11520389
    Abstract: Disclosed herein are systems and methods of determining a maximum allowable air temperature limit for closed loop (CL) control of the inlet boundary or threshold temperature of a given computer expansion slot that contains a particular mating expansion card. The maximum allowable air temperature limit may be determined for closed loop control of the expansion slot inlet boundary temperature by using reverse correlation of an open loop (OL) cooling tier curve that has been designated for open loop control of cooling air velocity provided to the particular expansion card of the given expansion slot. The reverse correlation may be performed in further view of the particular expansion slot airflow characteristics (e.g., maximum expansion slot airflow velocity capacity or limit) corresponding to a expansion card received in a given expansion slot.
    Type: Grant
    Filed: January 11, 2021
    Date of Patent: December 6, 2022
    Assignee: Dell Products L.P.
    Inventors: Hasnain Shabbir, Hui Chen
  • Patent number: 11497137
    Abstract: A compute device includes a printed circuit board, at least three compute subassemblies disposed on the printed circuit board, and a liquid loop. The compute subassemblies disposed on the printed circuit board and each of the three compute subassemblies includes a thermal control plate defining a respective internal conduit therethrough. A temperature controlled liquid circuit circulates through the liquid loop through to control the temperature of each of compute subassemblies in series during operation, the liquid loop including each of the internal conduits in each of the thermal control plates in each of the compute subassemblies.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: November 8, 2022
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Tahir Cader, Harvey J. Lunsman, Mitchell Johnson
  • Patent number: 11464139
    Abstract: A conformable heat sink interface for an integrated circuit package comprises a mounting plate having a first surface and a deformable membrane having a portion bonded to a second surface of the plate. A cavity is between the second surface of the plate and the deformable membrane. A flowable heat transfer medium is within the cavity. The flowable heat transfer medium has a thermal conductivity of not less than 30 W/m K. The deformable membrane is to conform to a three-dimensional shape of an IC package and the mounting plate has a second surface that is to be adjacent to a heat sink base.
    Type: Grant
    Filed: November 5, 2018
    Date of Patent: October 4, 2022
    Assignee: Intel Corporation
    Inventors: Kelly Lofgreen, Joseph Petrini, Todd Coons, Christopher Wade Ackerman, Edvin Cetegen, Yang Jiao, Michael Rutigliano, Kuang Liu
  • Patent number: 11456235
    Abstract: Embodiments of the present invention are directed to heat transfer arrays, cold plates including heat transfer arrays along with inlets and outlets, and thermal management systems including cold-plates, pumps and heat exchangers. These devices and systems may be used to provide cooling of semiconductor devices and particularly such devices that produce high heat concentrations. The heat transfer arrays may include microjets, microchannels, fins, and even integrated microjets and fins.
    Type: Grant
    Filed: February 11, 2021
    Date of Patent: September 27, 2022
    Assignee: Microfabrica Inc.
    Inventors: Richard T. Chen, Will J. Tan
  • Patent number: 11432440
    Abstract: A power conversion apparatus includes an electric component, a housing, and a flow channel formation unit. The electric component configures at least a part of a power conversion circuit. The housing stores the electric component, and the electric component is fixed to the housing. The flow channel formation unit forms a refrigerant flow channel through which a refrigerant flows, and is thermally connected to the electric component. The flow channel formation unit is a member different from the housing, and an elastically deformable spacer is provided between the flow channel formation unit and the housing.
    Type: Grant
    Filed: February 5, 2020
    Date of Patent: August 30, 2022
    Assignee: DENSO CORPORATION
    Inventors: Hiromi Ichijo, Kazuya Takeuchi
  • Patent number: 11387505
    Abstract: A battery pack thermal management system can include a battery pack including a plurality of battery modules encased within a battery case, a coolant line having an inlet and an outlet each penetrating a perimeter of the battery case and at least one thermally activated valve. The at least one thermally activated valve can be configured to spray coolant onto one or more battery modules responsive to a temperature within the battery pack exceeding a temperature threshold. The temperature threshold can be defined based on the temperature of a thermal event occurring within the battery pack which exceeds a normal operating temperature of the battery pack. The coolant line within the battery pack is biased towards the perimeter of the battery case. The battery pack can power a battery electric or hybrid electric vehicle.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: July 12, 2022
    Assignee: GM Global Technology Operations LLC
    Inventors: Ryan P. Hickey, Cody Demara, Pushpendra Chauhan, Benjamin G. Wroblewski
  • Patent number: 11382242
    Abstract: A power electronics system comprising a environmentally sealed electronics compartment for housing power electronics equipment is provided. The system includes a plenum within the sealed electronic compartment for circulating air. A first liquid cooling loop is configured to cool air flowing through the plenum. A second liquid cooling loop configured to directly cool the power electronics equipment. The system includes a controller configured to independently control the flow rate of the first liquid cooling loop and the second liquid cooling loop.
    Type: Grant
    Filed: June 19, 2017
    Date of Patent: July 5, 2022
    Assignee: SCHNEIDER ELECTRIC SOLAR INVERTERS USA, INC.
    Inventor: David Plecko
  • Patent number: 11355418
    Abstract: A package structure includes a wafer-form semiconductor package and a thermal dissipating system. The wafer-form semiconductor package includes semiconductor dies electrically connected with each other. The thermal dissipating system is located on and thermally coupled to the wafer-form semiconductor package, where the thermal dissipating system has a hollow structure with a fluidic space, and the fluidic space includes a ceiling and a floor. The thermal dissipating system includes at least one inlet opening, at least one outlet opening and a plurality of first microstructures. The at least one inlet opening and the at least one outlet opening are spatially communicated with the fluidic space. The first microstructures are located on the floor, and at least one of the first microstructures is corresponding to the at least one outlet opening.
    Type: Grant
    Filed: July 6, 2020
    Date of Patent: June 7, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Chun-Hui Yu, Jeng-Nan Hung, Kuo-Chung Yee
  • Patent number: 11328976
    Abstract: Some examples described herein provide for three-dimensional (3D) thermal management apparatuses for thermal energy dissipation of thermal energy generated by an electronic device. In an example, an apparatus includes a thermal management apparatus that includes a primary base, a passive two-phase flow thermal carrier, and fins. The thermal carrier has a carrier base and one or more sidewalls extending from the carrier base. The carrier base and the one or more sidewalls are a single integral piece. The primary base is attached to the thermal carrier. The carrier base has an exterior surface that at least a portion of which defines a die contact region. The thermal carrier has an internal volume aligned with the die contact region. A fluid is disposed in the internal volume. The fins are attached to and extend from the one or more sidewalls of the thermal carrier.
    Type: Grant
    Filed: March 3, 2020
    Date of Patent: May 10, 2022
    Assignee: XILINX, INC.
    Inventors: Gamal Refai-Ahmed, Chi-Yi Chao, Suresh Ramalingam, Hoa Lap Do, Anthony Torza, Brian D. Philofsky
  • Patent number: 11310935
    Abstract: Embodiments of this application relate to a heat dissipator including a cover plate, an orifice plate, and a base plate that are stacked in sequence. A distribution cavity is disposed between the orifice plate and the cover plate, a heat exchange cavity is disposed between the orifice plate and the base plate, and the distribution cavity communicates with the heat exchange cavity by using through holes disposed on the orifice plate. A plurality of pin fins facing the orifice plate are disposed on a surface of the base plate in the heat exchange cavity, gaps between the plurality of pin fins constitute a fluid passage, and the pin fins include a combination pin fin in contact with the orifice plate, and a flow guiding pin fin that corresponds to the through hole and that has a gap with the through hole.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: April 19, 2022
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventor: Hui Jia
  • Patent number: 11221376
    Abstract: A load bank for testing power sources includes a load resistor assembly having a plurality of resistors which can be switched between wye and delta configurations for testing a variety of voltages and power sources requiring various load applications. First and second power connections are connected with primary and redundant power sources and a relay alternately connects the first and second power connections with the load resistor assembly for alternately testing the primary and redundant power sources while maintaining the sources electrically isolated. A damper is arranged adjacent the load resistor assembly and is operable between an open position which permits cold air to be delivered to the load resistor assembly to cool the assembly when the load bank is operating and a closed position which prevents hot air from being recirculated when the load bank is not operating.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: January 11, 2022
    Assignee: COMRENT INTERNATIONAL, LLC
    Inventors: Joseph Morin, Brian Kelleher, Lowell Seal, Brett Gidge, Todd Locker, Graham Thompson
  • Patent number: 11201105
    Abstract: Implementations of semiconductor packages may include a first substrate coupled to a first die, a second substrate coupled to a second die, and a spacer included within a perimeter of the first substrate and within a perimeter of a second substrate, the spacer coupled between the first die and the second die, the spacer include a junction cooling pipe therethrough.
    Type: Grant
    Filed: February 14, 2020
    Date of Patent: December 14, 2021
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Seungwon Im, Oseob Jeon, Byoungok Lee, Yoonsoo Lee, Joonseo Son, Dukyong Lee, Changyoung Park
  • Patent number: 11156409
    Abstract: Coolant-cooled heat sinks and methods of fabrication are provided with a coolant-carrying compartment between a cover and a heat transfer base. The heat transfer base includes a heat transfer surface to couple to a component to be cooled, and a plurality of thermally-conductive fins extending into the coolant-carrying compartment from a surface of the heat transfer base opposite to the heat transfer surface. One or more grooves are provided in an interface surface of the cover and fins, and wicking element(s) are positioned within, at least in part, the groove(s). A joining material is provided between the cover and fins to join the plurality of thermally-conductive fins to the cover. The wicking element(s) within, at least in part, the groove(s) facilitate retaining the joining material over the plurality of thermally-conductive fins during joining of the cover and fins.
    Type: Grant
    Filed: January 20, 2020
    Date of Patent: October 26, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Hongqing Zhang, Jay A. Bunt, David J. Lewison, Joyce E. Molinelli Acocella, Frank L. Pompeo, Jeffrey Allen Zitz
  • Patent number: 11129310
    Abstract: A semiconductor module comprises a semiconductor apparatus and a cooling apparatus. The semiconductor apparatus includes a semiconductor chip and a circuit board. The cooling apparatus includes: a top plate; a side wall; a bottom plate; a coolant flow portion for causing a coolant to flow defined by the plates and the wall, where a cross section of the portion parallel to a principal surface of the top plate have a substantially rectangular shape with longer sides and shorter sides; an inlet associated with one direction along the shorter sides for letting a coolant into the portion; an outlet associated with another direction along the shorter sides for letting a coolant out of the portion; and a cooling pin fin arranged in the portion, extending between the top plate and the bottom plate, and having a substantially rhombic shape longer along the shorter sides than along the longer sides.
    Type: Grant
    Filed: October 27, 2019
    Date of Patent: September 21, 2021
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Nobuhide Arai
  • Patent number: 11119129
    Abstract: An improved phasor estimation method for M-class phasor measurement units (PMUs) with a low computational burden is described. The method contains three steps: 1) A phasor measurement filter is designed by selecting parameters of Taylor weighted least square method to prioritize dynamic phasor accuracy and a high level of suppression on high-frequency interferences; 2) A finite impulse response lowpass filter is designed by the equal-ripple method is put forward to suppress low-frequency interferences; and 3) Phasor amplitude is corrected under off-nominal conditions.
    Type: Grant
    Filed: January 25, 2021
    Date of Patent: September 14, 2021
    Assignee: North China Electric Power University
    Inventors: Hao Liu, Tianshu Bi, Sudi Xu
  • Patent number: 11096283
    Abstract: A substrate-on-substrate structure and an electronic device including the same are provided, and the substrate-on-substrate structure includes: a first printed circuit board having a first side and a second side, opposite to the first side; a second printed circuit board disposed on the second side of the first printed circuit board, and having a first side connected to the second side of the first printed circuit board and a second side opposite to the first side connected to the second side of the first printed circuit board; a first structure disposed on the second side of the first printed circuit board, and disposed around the second printed circuit board; a second structure disposed on the second side of the second printed circuit board; and a third structure disposed on the first and second structures, and connected to each of the first and second structures.
    Type: Grant
    Filed: February 20, 2020
    Date of Patent: August 17, 2021
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Yong Hoon Kim, Seung Eun Lee, Young Kwan Lee, Hak Chun Kim
  • Patent number: 11088111
    Abstract: A semiconductor device according to the present invention includes: a through via formed to penetrate a semiconductor substrate; first and second buffer circuits; a wiring forming layer formed in an upper layer of the semiconductor substrate; a connecting wiring portion formed in an upper portion of the through via assuming that a direction from the semiconductor substrate to the wiring forming layer is an upward direction, the connecting wiring portion being formed on a chip inner end face that faces the upper portion of the semiconductor substrate at an end face of the through via; a first path connecting the first buffer circuit and the through via; and a second path connecting the second buffer circuit and the through via. The first path and the second path are electrically connected through the connecting wiring portion.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: August 10, 2021
    Assignee: Renesas Electronics Corporation
    Inventor: Koji Takayanagi
  • Patent number: 11073549
    Abstract: The present application discloses a display panel test circuit and a display panel test device, wherein the test device of the display panel test circuit controls a plurality of switching circuits to be turned on, and a signal generator controls the plurality of switching circuits to be turned off when a first metal layer and the second metal layer are short-circuited.
    Type: Grant
    Filed: January 15, 2019
    Date of Patent: July 27, 2021
    Assignees: HKC Corporation Limited, Chongqing HKC Optoelectronics Technology Co., Ltd.
    Inventor: Chuan Wu
  • Patent number: 11015872
    Abstract: An additively manufactured heat transfer device is disclosed, including an enclosure portion with outer walls. The outer walls contain an inner channel configured to direct a flow of coolant fluid. The heat transfer device further includes a fluid intake port and a fluid outtake port, each connected to the first inner channel. The fluid intake port is configured to direct a flow of coolant fluid through an outer wall of the enclosure portion into the inner channel, and the fluid outtake port is configured to direct a flow of coolant fluid through an outer wall of the enclosure portion out of the inner channel. The inner channel is defined by internal walls, and the enclosure portion and the internal walls form a single additively manufactured unit.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: May 25, 2021
    Assignee: The Boeing Company
    Inventors: Richard W. Aston, Matthew Joseph Herrmann, Michael John Langmack, Nicole M. Hastings, Sumit K. Purohit
  • Patent number: 10985089
    Abstract: The present invention relates to a semiconductor cooling arrangement for cooling semiconductor devices, such as power semiconductors. The semiconductor cooling arrangement comprises one or more semiconductor assemblies located in a chamber within a housing. The housing comprises inlet and outlet ports for receiving and outputting a cooling medium. The chamber is flooded with a cooling medium to cool the assemblies. The assemblies themselves each comprise a heatsink and one or more semiconductor power devices thermally coupled to the heatsink. The heatsink comprises heat exchanging elements in the form of a plurality of holes in the heatsink extending through the heatsink from one surface to another surface such that the cooling medium flows through the holes to extract heat from the heatsink.
    Type: Grant
    Filed: January 30, 2018
    Date of Patent: April 20, 2021
    Assignee: YASA LIMITED
    Inventors: Simon David Hart, Tim Woolmer, Christopher Stuart Malam, Graham Law, Francesca Bernardine Bumpus
  • Patent number: 10957624
    Abstract: Embodiments of the present invention are directed to heat transfer arrays, cold plates including heat transfer arrays along with inlets and outlets, and thermal management systems including cold-plates, pumps and heat exchangers. These devices and systems may be used to provide cooling of semiconductor devices and particularly such devices that produce high heat concentrations. The heat transfer arrays may include microjets, microchannels, fins, and even integrated microjets and fins.
    Type: Grant
    Filed: April 3, 2020
    Date of Patent: March 23, 2021
    Assignee: Microfabrica Inc.
    Inventors: Richard T. Chen, Will J. Tan
  • Patent number: 10950522
    Abstract: An electronic device has an electronic module having an insulating substrate 60, a conductor layer 20 provided on the insulating substrate 60, an electronic element 40 provided on the conductor layer 20 and a heat dissipation layer 10 provided on the insulating substrate in an opposite side of the electronic element 40 and a cooling body 100 which abuts on the heat dissipation layer 10. The cooling body 100 has a divided part 110 being provided at a portion which abuts on the heat dissipation layer 10 and being a plurality of divided regions.
    Type: Grant
    Filed: February 13, 2017
    Date of Patent: March 16, 2021
    Assignee: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.
    Inventors: Junya Yuguchi, Kousuke Ikeda, Kenichi Suzuki
  • Patent number: 10925180
    Abstract: An IT enclosure and immersion cooling unit is disclosed. The unit comprises: an immersion cooling area to accommodate electronic devices that require cooling, the electronic devices being immersed in coolant; an heat exchanger; an coolant supply line to supply cooler coolant from the heat exchanger to the immersion cooling area; and an coolant return line to return warmer coolant from the immersion cooling area to the heat exchanger, wherein the cooler coolant absorbs heat from the electronic devices in the immersion cooling area and turns into the warmer coolant, wherein heat is extracted from the warmer coolant in the heat exchanger and transferred to external coolant, and wherein the heat exchanger, the coolant supply line, and the coolant return line are packaged within the immersion cooling unit.
    Type: Grant
    Filed: March 4, 2019
    Date of Patent: February 16, 2021
    Assignee: BAIDU USA LLC
    Inventor: Tianyi Gao
  • Patent number: 10881019
    Abstract: A cooling apparatus includes an immersion-tank configured to store a refrigerant, a refrigerant suction port formed at a lower portion of the immersion-tank, the refrigerant suction port being configured to suck the refrigerant from an outside of the immersion-tank into an inside of the immersion-tank, an electronic device immersed in the refrigerant, the electronic device including, a first heat-generation portion, a second heat-generation portion having a heat-generation amount smaller than a heat-generation amount of the first heat-generation portion, and a refrigerant inlet positioned below the first heat-generation portion and the second heat-generation portion and being open downward, and a block positioned below the first heat-generation portion and the second heat-generation portion, the block including a through-hole through which a region positioned below the first heat-generation portion in the refrigerant inlet is open, and a closing portion that closes a region positioned below the second heat-ge
    Type: Grant
    Filed: March 4, 2019
    Date of Patent: December 29, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Shinnosuke Fujiwara, Nobumitsu Aoki, Hideo Kubo, Keita Hirai
  • Patent number: 10879151
    Abstract: A semiconductor package includes a lead frame, a semiconductor device, a liquid metal conductor, and an encapsulation material. The semiconductor device is affixed to the lead frame. The liquid metal conductor couples the semiconductor device to the lead frame. The encapsulation material encases the semiconductor device, the liquid metal conductor, and at least a portion of the lead frame.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: December 29, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Dishit Paresh Parekh, Benjamin Stassen Cook, Daniel Lee Revier, Jo Bito
  • Patent number: 10872835
    Abstract: Semiconductor assemblies including thermal management configurations for reducing heat transfer between vertically stacked devices and associated systems and methods are disclosed herein. In some embodiments, the semiconductor assemblies comprise at least one memory device mounted over a logic device with a thermally conductive layer, a thermal-insulator interposer, or a combination thereof disposed between the memory device and the logic device. The thermally conductive layer includes a structure configured to transfer the thermal energy across a horizontal plane. The thermal-insulator interposer includes a structure configured to reduce heat transfer between the logic device and the memory device.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: December 22, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Chan H. Yoo, Owen R. Fay
  • Patent number: 10863643
    Abstract: An implantable medical device including a hermetic housing, at least one electronic board housed in the housing, a module for heat dissipation and shock absorption, housed in the housing and arranged between the electronic board and an internal wall of the housing, the module having a first layer of thermal paste placed in the internal space of the housing and deposited on the electronic board, a second, metal layer of high thermal conductivity deposited on the first layer, a third layer of thermal paste deposited on the second layer and positioned so as to come into contact with the internal wall of the housing, the third layer having a structure with a plurality of cavities distributed over the entire area of contact of the third layer with the internal wall of the housing.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: December 8, 2020
    Assignee: Commissariat A L'Energie Atomique et aux Energies Alternatives
    Inventors: Fabien Sauter-Starace, Alice Siegel
  • Patent number: 10770369
    Abstract: A semiconductor device package includes a substrate, a first electronic component, a second electronic component, a heat dissipation lid and a thermal isolation. The substrate has a surface. The first electronic component and the second electronic component are over the surface of the substrate and arranged along a direction substantially parallel to the surface. The first electronic component and the second electronic component are separated by a space therebetween. The heat dissipation lid is over the first electronic component and the second electronic component. The heat dissipation lid defines one or more apertures at least over the space between the first electronic component and the second electronic component. The thermal isolation is in the one or more apertures of the heat dissipation lid.
    Type: Grant
    Filed: August 24, 2018
    Date of Patent: September 8, 2020
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chih-Pin Hung, Tang-Yuan Chen, Jin-Feng Yang, Meng-Kai Shih
  • Patent number: 10770435
    Abstract: Apparatuses and methods for semiconductor die heat dissipation are described. For example, an apparatus for semiconductor die heat dissipation may include a substrate and a heat spreader. The substrate may include a thermal interface layer disposed on a surface of the substrate, such as disposed between the substrate and the heat spreader. The heat spreader may include a plurality of substrate-facing protrusions in contact with the thermal interface layer, wherein the plurality of substrate-facing protrusions are disposed at least partially through the thermal interface layer.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: September 8, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Sameer S. Vadhavkar, Xiao Li, Anilkumar Chandolu
  • Patent number: 10770334
    Abstract: A substrate holding device includes a base body that has a flat plate-like shape and in which gas holes that open in an upper surface of the base body are formed, and a plurality of protrusions that protrude upward from the upper surface of the base body. A groove that opens in a lower surface of the base body and that is connected to the gas holes is formed in the base body, and a plurality of protrusions that protrude downward are formed in the groove.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: September 8, 2020
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventors: Tomohiro Ishino, Shinya Kikuchi
  • Patent number: 10756001
    Abstract: Provided is a semiconductor module comprising: a semiconductor chip; a cooling portion having a refrigerant passing portion through which a refrigerant passes; and a laminated substrate having: a first metal interconnection layer; a second metal interconnection layer; and an insulation provided between the first metal interconnection layer and the second metal interconnection layer, wherein the cooling portion has: a top plate; a bottom plate; and a plurality of protruding parts which are provided on a surface of the bottom plate, and are separated from each other in a flow direction of the refrigerant, and are respectively provided continuously in a direction orthogonal to the flow direction, wherein the plurality of protruding parts are provided at a position overlapping with one end of the second metal interconnection layer and at a position overlapping with the semiconductor chip in the flow direction.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: August 25, 2020
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Akio Kitamura, Shinichiro Adachi, Nobuhide Arai
  • Patent number: 10665530
    Abstract: Embodiments of the present invention are directed to heat transfer arrays, cold plates including heat transfer arrays along with inlets and outlets, and thermal management systems including cold-plates, pumps and heat exchangers. These devices and systems may be used to provide cooling of semiconductor devices and particularly such devices that produce high heat concentrations. The heat transfer arrays may include microjets, microchannels, fins, and even integrated microjets and fins.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: May 26, 2020
    Assignee: Microfabrica Inc.
    Inventors: Richard T. Chen, Will J. Tan
  • Patent number: 10607919
    Abstract: Implementations of semiconductor packages may include a first substrate coupled to a first die, a second substrate coupled to a second die, and a spacer included within a perimeter of the first substrate and within a perimeter of a second substrate, the spacer coupled between the first die and the second die, the spacer include a junction cooling pipe therethrough.
    Type: Grant
    Filed: September 25, 2017
    Date of Patent: March 31, 2020
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Seungwon Im, Oseob Jeon, Byoungok Lee, Yoonsoo Lee, Joonseo Son, Dukyong Lee, Changyoung Park
  • Patent number: 10561040
    Abstract: Systems and methods are provided for a gasket that allows for a single cooling cold plate to touch one or more devices. These devices may have precise but varying thermal interfaces and mounting pressure requirements; and height and co-planarity tolerances that need to be accommodated. The gasket may be sandwiched in between a top stiffener plate and a floating cold plate along an outer perimeter of the gasket; and a rigid, cold plate base and a bottom stiffener plate along an inner perimeter of the gasket. The resulting seal allows coolant to flow between the rigid and floating cold plates as these plates move (i.e., float) with respect to one another. Thus, the gasket aids in a cooling apparatus achieve an optimum thermal interface with each of the one or more devices simultaneously, while accounting for the individual tolerance variations across each device.
    Type: Grant
    Filed: October 8, 2018
    Date of Patent: February 11, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Harvey Lunsman, Tahir Cader, Michael Scott