Abstract: Semiconductor device assemblies having stacked semiconductor dies and electrically functional heat transfer structures (HTSs) are disclosed herein. In one embodiment, a semiconductor device assembly includes a first semiconductor die having a mounting surface with a base region and a peripheral region adjacent the base region. At least one second semiconductor die can be electrically coupled to the first semiconductor die at the base region. The device assembly can also include an HTS electrically coupled to the first semiconductor die at the peripheral region.

Abstract: The invention provides a pressure sintering method including: a) providing a sintered component arrangement with a workpiece carrier having recesses, with a substrate resting on a main surface of the workpiece carrier, wherein a sintering material to be sintered is arranged between the power semiconductor components and the substrate, a first power semiconductor component and a first region of the substrate arranged above the workpiece carrier in the normal direction of the first main side of the insulation layer flush with a first recess of the workpiece carrier, and a second power semiconductor component and a second region of the substrate are arranged above the workpiece carrier in the normal direction of the first main side of the insulation layer flush with a second recess of the workpiece carrier and a step of b) pressurizing the power semiconductor components and applying a temperature treatment.

Abstract: A semiconductor light-emitting device includes a substrate on which a semiconductor light-emitting element is mounted, the substrate having a first coefficient of thermal expansion, a lid member that covers the semiconductor light-emitting element, the lid member having a second coefficient of thermal expansion smaller than the first coefficient of thermal expansion, and a joining member that joins the lid member to the substrate to seal the semiconductor light-emitting element. The joining member includes a eutectic alloy solder.

Abstract: An electronic component package includes: a frame, including a through-hole and a through-wiring; an electronic component disposed in the through-hole of the frame; a metal plate disposed on a first side of the electronic component and the frame; and a redistribution layer disposed on a second side of the electronic component opposing the first side and electrically connected to the electronic component.

Abstract: A microelectronic device is formed by thinning a substrate of the microelectronic device from a die attach surface of the substrate, and forming a copper-containing layer on the die attach surface of the substrate. A protective metal layer is formed on the copper-containing layer. Subsequently, the copper-containing layer is attached to a package member having a package die mount area. The protective metal layer may optionally be removed prior to attaching the copper-containing layer to the package member. Alternatively, the protective metal layer may be left on the copper-containing layer when the copper-containing layer is attached to the package member. A structure formed by the method is also disclosed.

Abstract: An interposer device comprising an interposer substrate; a plurality of conducting vias extending through the interposer substrate; a conductor pattern on the interposer substrate, and a nanostructure energy storage device. The nanostructure energy storage device comprises at least a first plurality of conductive nanostructures formed on the interposer substrate; a conduction controlling material embedding each nanostructure in the first plurality of conductive nanostructures; a first electrode connected to each nanostructure in the first plurality of nanostructures; and a second electrode separated from each nanostructure in the first plurality of nanostructures by the conduction controlling material, wherein the first electrode and the second electrode are configured to allow electrical connection of the nanostructure energy storage device to the integrated circuit.

Abstract: A semiconductor device comprising: a semiconductor component; a diamond heat spreader; and a metal bond, wherein the semiconductor component is bonded to the diamond heat spreader via the metal bond, wherein the metal bond comprises a layer of chromium bonded to the diamond heat spreader and a further metal layer disposed between the layer of chromium and the semiconductor component, and wherein the semiconductor component is configured to operate at an areal power density of at least 1 kW/cm2 and/or a linear power density of at least 1 W/mm.

Abstract: A printed circuit board according to an embodiment includes: an insulating layer; a first pad disposed on a first surface of the insulating layer; a first conductive layer disposed on the first pad and including gold (Au); a second pad disposed on a second surface of the insulating layer; and a second conductive layer disposed on the second pad and including gold (Au), wherein the first conductive layer is a conductive layer connected to a wire, the second conductive layer is a conductive layer connected to a solder, and the first conductive layer is thicker than the second conductive layer.

Abstract: A downhole tool includes a housing a measurement device disposed in the housing. The measurement device includes a sensor and electronic circuitry configured to detect or process signals detected by the sensor. The housing, the sensor, or the electronic circuitry, or any combination thereof, includes a polymer matrix with integrated boron nitride nanotubes.

Abstract: A semiconductor device includes: a silicon substrate that includes a heat release mechanism formed on a rear surface thereof; and an element layer that includes a transistor element and is formed on a front surface of the silicon substrate, the heat release mechanism including: a carbon material being a high heat-conducting material such as a CNT that is higher in heat conductivity than the silicon substrate and is formed in a plurality of first holes formed in the rear surface of the silicon substrate; and a carbon material being a heat-conductive film such as a multilayer graphene film that is thermally connected to the CNT in a manner to cover a rear surface side of the silicon substrate. This configuration provides a carbon material-embedded silicon substrate realizing very efficient heat release with a relatively simple configuration to obtain a highly-reliable electronic device.

Abstract: A display device includes a display panel, a rear face housing, a light source unit, a reflective sheet, and a fixing member. The rear face housing is disposed rearward with respect to a rear face of the display panel. The light source unit is disposed between the display panel and the rear face housing. The reflective sheet has an opening. A portion of the reflective sheet around the opening is disposed between at least part of the light source unit and the rear face housing in a direction perpendicular to a surface of the display panel. The fixing member attaches the light source unit to the rear face housing.

Abstract: An electronic component package and a method of manufacturing an electronic component package are provided. An electronic component package includes a frame having a cavity, an electronic component disposed in the cavity, a redistribution layer disposed adjacent to the frame and electrically connected to the electronic component, and an encapsulation material encapsulating the electronic component and having an elastic modulus smaller than that of a material constituting the frame.

Abstract: A composite substrate includes a submount substrate of an alternating pattern of electrically insulative portions, pieces, layers or segments and electrically conductive portions, pieces, layers or segments, and a shaft, back or plate for supporting the alternating pattern of electrically insulative portions and electrically conductive portions. An active device having a P-N junction can be mounted on the submount substrate. The electrically insulative portions, pieces, layers or segments can be formed from diamond while the electrically conductive portions, pieces, layers or segments can be formed from a metal or metal alloy.

Abstract: Generally, the present invention provides methods for the production of materials comprising a plurality of nanostructures such as nanotubes (e.g., carbon nanotubes) and related articles. The plurality of nanostructures may be provided such that their long axes are substantially aligned and, in some cases, continuous from end to end of the sample. For example, in some cases, the nanostructures may be fabricated by uniformly growing the nanostructures on the surface of a substrate, such that the long axes are aligned and non-parallel to the substrate surface. The nanostructures may be, in some instances, substantially perpendicular to the substrate surface. In one set of embodiments, a force with a component normal to the long axes of the nanostructures may be applied to the substantially aligned nanostructures. The application of a force may result in a material comprising a relatively high volume fraction or mass density of nanostructures.

Abstract: A method provides a first substrate supporting an insulator layer having trenches formed therein; filling the trenches using an epitaxial growth process with at least semiconductor material; planarizing tops of the filled trenches; forming a first layer of dielectric material on a resulting planarized surface; inverting the first substrate wafer to place the first layer of dielectric material in contact with a second layer of dielectric material on a second substrate; bonding the first substrate to the second substrate through the first and second layers of dielectric material to form a common layer of dielectric material; and removing the first substrate and a first portion of the filled trenches to leave a second portion of the filled trenches disposed upon the common dielectric layer. The removed first portion of the filled trenches contains dislocation defects. The method then removes the insulator layer to leave a plurality of Fin structures.

Abstract: A power module for converting direct current to alternating current, the power module including: a semiconductor switching circuit device, a substrate onto which said switching circuit device is physically and electrically coupled, at least one secondary substrate with the semiconductor switching circuit device being physically and electrically coupled to the at least one secondary substrate such that the semiconductor switching circuit device is formed between the substrate and the at least one secondary substrate, at least one thermal mass attached to a respective secondary substrate of the at least one secondary substrate, and a cover at least partially disposed about said power module, said cover including an opening exposing a bottom side of the substrate.

Abstract: Method for a controlled spalling utilizing vaporizable release layers. For example, a method comprises providing a base substrate, depositing a stressor layer and a vaporizable release layer on the base substrate, forming a flexible support layer on at least one of the stressor layer and the vaporizable release layer, spalling an upper portion of the base substrate, securing the spalled upper portion of the base substrate to a handle substrate, and vaporizing the vaporizable release layer.

Abstract: A display device includes a display panel, a rear face housing, a substrate, at least one light source, a reflective sheet, and a fixing member. The display panel is configured to display an image. The rear face housing is disposed rearward with respect to a rear face of the display panel. The substrate is disposed between the display panel and the rear face housing. The at least one light source is mounted on the substrate and configured to emit light toward the rear face of the display panel. The reflective sheet is partially sandwiched between the substrate and the rear face housing. The reflective sheet has an opening at a location where the substrate is disposed. The fixing member fixedly attaches the substrate to the rear face housing through the opening.

Abstract: An embodiment package includes a first fan-out tier, fan-out redistribution layers (RDLs) over the first fan-out tier, and a second fan-out tier over the fan-out RDLs. The first fan-out tier includes one or more first device dies and a first molding compound extending along sidewalls of the one or more first device dies. The second fan-out tier includes one or more second device dies bonded to fan-out RDLs, a dummy die bonded to the fan-out RDLs, and a second molding compound extending along sidewalls of the one or more second device dies and the dummy die. The fan-out RDLs electrically connects the one or more first device dies to the one or more second device dies, and the dummy die is substantially free of any active devices.

Abstract: A layered structure for use with a high power light emitting diode system comprises an electrically insulating intermediate layer interconnecting a top layer and a bottom layer. The top layer, the intermediate layer, and the bottom layer form an at least semi-flexible elongate member having a longitudinal axis and a plurality of positions spaced along the longitudinal axis. The at least semi-flexible elongate member is bendable laterally proximate the plurality of positions spaced along the longitudinal axis to a radius of at least 6 inches, twistable relative to its longitudinal axis up to 10 degrees per inch, and bendable to conform to localized heat sink surface flatness variations having a radius of at least 1 inch. The top layer is pre-populated with electrical components for high wattage, the electrical components including at least one high wattage light emitting diode at least 1.0 Watt per 0.8 inch squared.

Abstract: An approach for heat dissipation in integrated circuit devices is provided. A method includes forming an isolation layer on an electrically conductive feature of an integrated circuit device. The method also includes forming an electrically conductive layer on the isolation layer. The method additionally includes forming a plurality of nanowire structures on a surface of the electrically conductive layer.

Abstract: A wiring substrate includes a core, a first wiring layer formed on a first surface of the core, a second wiring layer formed on a second surface of the core, and an electronic component partially accommodated in the cavity and including a projected portion projected from the first opening of the core. A first insulating layer covers a side surface of the electronic component and the first surface of the core and fills a portion of the cavity. A second insulating layer covers the first insulating layer. A third insulating layer covers the second surface of the core. The remainder of the cavity that is not filled with the first insulating layer is filled with the third insulating layer.

Abstract: An electronic device that provides thermal feedback to a user is described. In particular, when the user provides a setting via tactile interaction with a surface of a user-interface device in the electronic device, a thermal mechanism in the electronic device establishes a temperature gradient on the surface based on the setting. For example, the thermal mechanism may include a heat source that increases a temperature of the portion of the user-interface device and/or a heat sink that decreases a temperature of another portion of the user-interface device. Moreover, the thermal mechanism may dynamically modify the temperature gradient based on the tactile interaction and an environmental condition (such as the temperature) in an external environment that includes the electronic device. Note that the tactile interaction with the user may occur with a physical control object (such as a knob) and/or with a virtual icon displayed on a multi-touch display.

Abstract: A method of assembling a semiconductor chip device is provided. The method includes providing a first circuit board that has a plurality of thermally conductive vias. A second circuit board is mounted on the first circuit board over and in thermal contact with the thermally conductive vias. The second circuit board includes first side facing the first circuit board and a second and opposite side.

Abstract: An electronic device including a first region belonging to a semiconductor device having a first surface; a second region having a second surface; and an adhesion layer, set between the first and second regions, including first fibrils each having respective first and second ends. The first fibrils extend between the first and second surfaces and are fixed in a chemico-physical way to the first and second surfaces at the respective first and second ends.

Abstract: An electronic device that provides thermal feedback to a user is described. In particular, when the user provides a setting via tactile interaction with a surface of a user-interface device in the electronic device, a thermal mechanism in the electronic device establishes a temperature gradient on the surface based on the setting. For example, the thermal mechanism may include a heat source that increases a temperature of the portion of the user-interface device and/or a heat sink that decreases a temperature of another portion of the user-interface device. Moreover, the thermal mechanism may dynamically modify the temperature gradient based on the tactile interaction and an environmental condition (such as the temperature) in an external environment that includes the electronic device. Note that the tactile interaction with the user may occur with a physical control object (such as a knob) and/or with a virtual icon displayed on a multi-touch display.

Abstract: A method of making a transparent conductive film includes providing a carbon nanotube array and a substrate. At least one carbon nanotube film is extracted from the carbon nanotube array, and stacked on the substrate to form a carbon nanotube film structure. The carbon nanotube film structure is irradiated by a laser beam along a predetermined path to obtain a predetermined pattern. The predetermined pattern is separated from the other portions of the carbon nanotube film, thereby forming the transparent conductive film from the predetermined pattern of the carbon nanotube film.

Abstract: Flip chip packages are described that include two or more thermal interface materials (TIMs). A die is mounted to a substrate by solder bumps. A first TIM is applied to the die, and has a first thermal resistance. A second TIM is applied to the die and/or the substrate, and has a second thermal resistance that is greater than the first thermal resistance. An open end of a heat spreader lid is mounted to the substrate such that the die is positioned in an enclosure formed by the heat spreader lid and substrate. The first TIM and the second TIM are each in contact with an inner surface of the heat spreader lid. A ring-shaped stiffener may surround the die and be connected between the substrate and heat spreader lid by the second TIM.

Abstract: A semiconductor device includes a semiconductor element having a substrate of GaAs, InP, or GaN, and an element securing member bonded to the semiconductor element by solder. The element securing member is a composite material of Cu and carbon or a composite of Al and carbon. A stem is connected to the element securing member, and a cap is secured to the stem. The cap covers the semiconductor element and the element securing member. The stem and the element securing member are made of the same material.

Abstract: In a semiconductor device including a semiconductor element that produces heat and a substrate on which the semiconductor element is mounted, functions of the substrate are divided between a heat dissipating substrate and a wiring substrate. The heat dissipating substrate has a relatively high thermal conductivity, and includes principal surfaces defined by electric insulators, one of which is provided with an outer conductor located thereon. The wiring substrate is mounted on the upper principal surface of the heat dissipating substrate, has a thermal conductivity lower than that of the heat dissipating substrate, and includes a wiring conductor made mainly of silver or copper and located inside the wiring substrate, the wiring conductor being electrically connected to the outer conductor. The semiconductor element is mounted on the upper principal surface of the heat dissipating substrate and disposed in a through hole of the wiring substrate.

Abstract: A conductive thin film including a binder matrix and semiconductor nanowires dispersed therein is disclosed. The semiconductor nanowires are in the range of 30% to 50% by weight percentage of the thin film. The present invention also discloses a method of making such thin film. The method includes the steps of: mixing a plurality of semiconductor nanowires with a polymer binder to obtain a printing ink; thinning the printing ink with a solvent to achieve a predetermined viscosity; printing the printing ink on a substrate to form a conductive thin film thereon and evaporating the solvent at a rate slower than the evaporation rate of water.

Abstract: Methods and apparatuses for improved integrated circuit (IC) packages are described herein. In an aspect, an IC device package includes an IC die having a contact pad, where the contact pad is located on a hotspot of the IC die. The hotspot is thermally coupled to a thermal interconnect member. In an aspect, the package is encapsulated in a mold compound. In a further aspect, a heat spreader is attached to the mold compound, and is thermally coupled to the thermal interconnect member. In another aspect, a thermal interconnect member thermally is coupled between the heat spreader and the substrate.

Abstract: A memory device with die stacking is provided. A plurality of substrates layers are stacked together into a stack. Each substrate layer may include a substrate having a plurality of cavities to receive integrated circuit components within the thickness of the substrate. A plurality of conductive spheres are arranged between at least two adjacent substrate layers and are electrically coupled to the integrated circuit components in at least one of the two adjacent substrates. The two adjacent substrate layers of the stack include: (a) a first substrate having a first plurality of cavities to receive integrated circuit components, and (b) a second substrate having a second plurality of cavities to receive integrated circuit components, wherein the first plurality of cavities is offset from a second plurality of cavities.

Abstract: Systems and methods for improving thermal performance, such as thermal dissipation, of flip chip packages that include one or more flip chip dies are disclosed. In some embodiments, a thermal collection layer can be formed on a surface of a flip chip die. The thermal collection layer can be configured to dissipate heat generated by the flip chip die. In some variations, the thermal collection layer can be constructed using materials having high thermal conductivity.

Abstract: A power semiconductor module includes: a circuit body having a power semiconductor element and a conductor member connected to the power semiconductor element; a case in which the circuit body is housed; and a connecting member which connects the circuit body and the case. The case includes: a first heat dissipating member and a second heat dissipating member which are disposed in opposed relation to each other while interposing the circuit body in between; a side wall which joins the first heat dissipating member and the second heat dissipating member; and an intermediate member which is formed on the periphery of the first heat dissipating member and connected to the side wall, the intermediate member including a curvature that is projected toward a housing space of the case.

Abstract: A semiconductor package includes a wiring board; a semiconductor chip mounted on the wiring board; and a radiation plate mounted on the semiconductor chip, including an insulating member including a resin that is the same as a resin included in the wiring board, as a main constituent, a first metal foil formed on a first surface of the insulating member, a second metal foil formed on a second surface of the insulating member, the second surface being an opposite to the first surface, the radiation plate being provided with a through hole that penetrates the first metal foil, the insulating member and the second metal foil, and a metal layer formed to cover the inner surface of the through hole to thermally connect the first metal foil and the second metal foil by penetrating the insulating member in a thickness direction.

Abstract: Various embodiments relate to a microchip die cooling assembly comprising a circuit board; a microchip having an exposed die attached to the circuit board; a heatspreader having a top side and a bottom side; a heat sink having a bottom side and a top side comprising a cooling structure; a first thermal interface material in contact with the exposed die and the bottom side of the heatspreader; and a second thermal interface material in contact with the top side of the heat spreader and the bottom side of the heat sink.

Abstract: A clad material 1A for insulating substrates is provided with a Ni layer 4 made of Ni or a Ni alloy, a Ti layer 6 made of Ti or a Ti alloy and arranged on one side of the Ni layer, and a first Al layer 7 made of Al or an Al alloy and arranged on one side of the Ti layer 6 that is opposite to a side of the Ti layer 6 on which the Ni layer 4 is arranged. The Ni layer 4 and the Ti layer 6 are joined by clad rolling. A Ni—Ti series superelastic alloy layer 5 formed by alloying at least Ni of constituent elements of the Ni layer 4 and at least Ti of constituent elements of the Ti layer 6 is interposed between the Ni layer 4 and the Ti layer 6. The Ti layer 6 and the first Al layer 7 are joined by clad rolling in an adjoining manner.

Abstract: In a semiconductor device including a semiconductor element that produces heat and a substrate on which the semiconductor element is mounted, functions of the substrate are divided between a heat dissipating substrate and a wiring substrate. The heat dissipating substrate has a relatively high thermal conductivity, and includes principal surfaces defined by electric insulators, one of which is provided with an outer conductor located thereon. The wiring substrate is mounted on the upper principal surface of the heat dissipating substrate, has a thermal conductivity lower than that of the heat dissipating substrate, and includes a wiring conductor made mainly of silver or copper and located inside the wiring substrate, the wiring conductor being electrically connected to the outer conductor. The semiconductor element is mounted on the upper principal surface of the heat dissipating substrate and disposed in a through hole of the wiring substrate.

Abstract: A stackable semiconductor assembly includes a semiconductor device, a heat spreader, an adhesive, a plated through-hole, first build-up circuitry and second build-up circuitry. The heat spreader includes a bump and a flange. The bump defines a cavity. The semiconductor device is mounted on the bump at the cavity, electrically connected to the first build-up circuitry and thermally connected to the bump. The bump extends into an opening in the adhesive and the flange extends laterally from the bump at the cavity entrance. The first build-up circuitry and the second build-up circuitry extend beyond the semiconductor device in opposite vertical directions. The plated through-hole extends through the adhesive and provides signal routing between the first build-up circuitry and the second build-up circuitry. The heat spreader provides heat dissipation for the semiconductor device.

Abstract: An integrated circuit package comprising an active semiconductor device layer and at least one heat-transfer semiconductor layer on the active semiconductor device layer. The heat-transfer semiconductor layer has a coefficient of thermal expansion that substantially matches a coefficient of thermal expansion of the active semiconductor device layer.

Abstract: An electronic component package includes a substrate having a first surface, an electronic component mounted to the substrate, traces on the first surface, a terminal on the first surface, and a solder mask on the first surface. The solder mask includes a solder mask opening exposing the terminal. An electrically conductive coating and/or conductive coating feature is formed on the solder mask and extends into the solder mask opening to contact and be electrically connected to the terminal. The conductive coating may be grounded to shield the electronic component from electromagnetic interference (EMI). Further, the conductive coating provides a ground plane for the traces facilitating impedance matching of signals on the traces. In addition, the conductive coating has a high thermal conductivity thus enhancing heat dissipation from the electronic component.

Abstract: Methods and apparatuses for forming a package for high-power semiconductor devices are disclosed herein. A package may include a plurality of distinct thermal spreader layers disposed between a die and a metal carrier. Other embodiments are described and claimed.

Abstract: A method includes preparing a bonding surface of a heat dissipating member, applying flux to the bonding surface of the heat dissipating member, and removing excess flux from the bonding surface so that minimal flux is provided. The method also includes preparing a die surface of an electronic device package, applying flux to the die surface, and removing excess flux from the die surface so that minimal flux is provided. The method further includes positioning a preform solder component on the die surface, positioning the heat dissipating member over the die surface and the preform solder component such that the flux layer of the bonding surface is in contact with the preform solder component, and reflowing the solder component using a reflow oven. A heat spreader is also described for use in the process.

Abstract: A semiconductor device includes a substrate, a semiconductor element disposed on the substrate, a heat radiating plate disposed on the substrate and covering the semiconductor element, and a connection member connecting an upper surface of the semiconductor element and a lower surface of the heat radiating plate, wherein the connection member includes a first member being in contact with the upper surface of the semiconductor element and having a first melting point, a second member being in contact with the first member, having a larger area than the first member, and having a second melting point higher than the first melting point, and a third member interposed between the second member and the heat radiating plate, having an area smaller than the second member, and having a third melting point lower than the second melting point.

Abstract: A semiconductor module including a cooling unit by which a fine cooling effect is obtained is provided. A plurality of cooling flow paths (21c) which communicate with both of a refrigerant introduction flow path which extends from a refrigerant introduction inlet and a refrigerant discharge flow path which extends to a refrigerant discharge outlet are arranged in parallel with one another in a cooling unit (20). Fins (22) are arranged in each cooling flow path (21c). Semiconductor elements (32) and (33) are arranged over the cooling unit (20) so that the semiconductor elements (32) and (33) are thermally connected to the fins (22). By doing so, a semiconductor module (10) is formed. Heat generated by the semiconductor elements (32) and (33) is conducted to the fins (22) arranged in each cooling flow path (21c) and is removed by a refrigerant which flows along each cooling flow path (21c).

Abstract: A lead frame includes a plurality of leads defined by an opening extending in a thickness direction. An insulating resin layer fills the opening to entirely cover side surfaces of each lead and to support the leads. A first surface of each lead is exposed from a first surface of the insulating resin layer.

Abstract: A semiconductor device and a method of producing the same, wherein a joining member and a joined member are bonded by means of brazing in a way such that no voids are left inside the joining layer. The semiconductor device comprises a joined member and a joining member which is joined to the joined member by means of brazing. The joined member is provided with a through hole which is open on the joining surface with the joining member, and a path communicating with the through hole is provided on at least one of the joining surface of the joining member with the joined member or the joining surface of the member with the joining member.

Abstract: One embodiment of an integrated circuit includes a discrete device that defines a top surface, an integrated circuit substrate, and a heat dissipation structure fully covering the top surface of the discrete device and being thermally connected to the integrated circuit substrate.

Abstract: A semiconductor device is a composite module in which three power semiconductor modules are arranged at a predetermined interval in the same plane and pin-shaped conductors that are drawn from the power semiconductor modules to the outside are connected to three main terminal plates such that they are integrated with each other. When the entire composite module is accommodated in a protective case and a radiation fin is provided, bolts are inserted into through holes to fix the protective case to the radiation fin. In this way, it is possible to accommodate the composite module in the protective case while reliably bringing the bottom of an insulating substrate into close contact with the radiation fin.