Abstract: A Schottky barrier silicon carbide device has a Re Schottky metal contact. The Re contact 27 is thicker than 250 Angstroms and may be between 2000 and 4000 Angstroms. A termination structure is provided by ion milling an annular region around the Schottky contact.

Abstract: In the present invention, there is provided semiconductor devices such as a Schottky UV photodetector fabricated on n-type ZnO and MgxZn1-xO epitaxial films. The ZnO and MgxZn1-xO films are grown on R-plane sapphire substrates and the Schottky diodes are fabricated on the ZnO and MgxZn1-xO films using silver and aluminum as Schottky and ohmic contact metals, respectively. The Schottky diodes have circular patterns, where the inner circle is the Schottky contact, and the outside ring is the ohmic contact. Ag Schottky contact patterns are fabricated using standard liftoff techniques, while the Al ohmic contact patterns are formed using wet chemical etching. These detectors show low frequency photoresponsivity, high speed photoresponse, lower leakage current and low noise performance as compared to their photoconductive counterparts. This invention is also applicable to optical modulators, Metal Semiconductor Field Effect Transistors (MESFETs) and more.

Abstract: A semiconductor device including polysilicon (poly-Si) and method of manufacturing the same are provided. The semiconductor device includes a TaNx material layer and a poly-Si layer formed on the TaNx material layer. The semiconductor device including poly-Si may be manufactured by forming a TaNx material layer and forming a poly-Si layer by depositing silicon formed on the TaNx material layer and annealing silicon.

Abstract: Electron-hole production at a Schottky barrier has recently been observed experimentally as a result of chemical processes. This conversion of chemical energy to electronic energy may serve as a basic link between chemistry and electronics and offers the potential for generation of unique electronic signatures for chemical reactions and the creation of a new class of solid state chemical sensors. Detection of the following chemical species was established: hydrogen, deuterium, carbon monoxide, molecular oxygen. The detector (1b) consists of a Schottky diode between an Si layer and an ultrathin metal layer with zero force electrical contacts.

Abstract: The present invention provides an electronic device having more than two conductive layers that cross but not in contact with each other. At least one of the conductive layers comprises a width change part, a width of which changes in a length direction of at least one of the conductive layer. The width change part is formed away from a region of at least one of the conductive layers that crosses a neighboring conductive layer. The present invention also provides a flat panel display device that includes the electronic device described above and manufactured in accordance with the principles of the present invention. The electronic device of the present invention may comprise a thin film transistor.

Abstract: A TFT, in which source and drain electrodes having concentric circular shapes are formed, reduces an OFF current caused by a leakage current and optimizes an ON current and a stray capacitance between gate and source electrodes. The TFT includes a gate electrode formed on a substrate; and source and drain electrodes obtained by sequentially forming a gate insulating film, an intrinsic amorphous silicon layer, and an n+ amorphous silicon layer on the gate electrode, wherein the source and drain electrodes have circular shapes. One of the source and drain electrodes is disposed at the center, and the other one of the source and drain electrodes having a concentric circular shape surrounds the former. A channel region may be formed between the source and drain electrodes; and an area of an effective stray capacitance may be less than 150 ?m2. A ratio of a width of a channel to a length of the channel may be more than 4.5 and a filling capacity index to the effective stray capacitance may be less than 50.

Abstract: The present invention provides a thin-film transistor offering a higher electron (or hole) mobility, a method for manufacturing the thin-film transistor, and a display using the thin-film transistor. The present invention provides a thin-film transistor having a source region, a channel region, and a drain region in a semiconductor thin film with a crystal grown in a horizontal direction, the thin-film transistor having a gate insulating film and a gate electrode over the channel region, wherein a drain edge of the drain region which is adjacent to the channel region is formed in the vicinity of a crystal growth end position.

Abstract: A phase change memory may be made using an isolation diode in the form of a Schottky diode between a memory cell and a word line. The use of Schottky diode isolation devices may make the memory more scaleable in some embodiments.

Abstract: A small semiconductor display device of low power consumption and with high definition/high resolution/high image quality is provided. The semiconductor display device according to the present invention includes a pixel matrix circuit, a data line driver circuit and scanning line driver circuits, and these components are formed on the same substrate using a polycrystalline TFT. The fabricating method of the device which includes a process for promoting crystallization by a catalytic element and a process for gettering the catalytic element provides the semiconductor display device with high definition/high resolution/high image quality while it is small in size.

Abstract: The invention provides a sheet for optical-semiconductor element encapsulation, which has a multilayer structure including at least two resin layers. The at least two resin layers include: (A) an outermost resin layer (layer A) that is to be brought into contact with one or more optical semiconductor elements; and (B) a resin layer (layer B) disposed on the layer A and having a lower refractive index than that of the layer A. Also disclosed is a process for producing an optical semiconductor device using the sheet.

Abstract: A passive mechanism suppresses injection, into any active guard regions interposed between the edge of a photodiode array chip and the outer photodiode pixels or into the outer pixels themselves, of minority carrier current generated in the physically disrupted region at the edge of the semiconductor die created by cleaving, sawing or otherwise separating the chip from the remainder of the wafer on which the die was fabricated. A thin metallic layer covers all or part of the edge region, thereby creating a Schottky barrier. This barrier generates a depletion region in the adjacent semiconductor material. The depletion region inherently creates an energy band distribution which preferentially accelerates minority carriers generated or near the metal-semiconductor interface towards the metal, thereby suppressing collection of these carriers by any active regions of the guard structure or by the photodiode pixels.

Abstract: A SiC Schottky barrier diode (SBD) is provided having a substrate and two or more epitaxial layers, including at least a thin, lightly doped N-type top epitaxial layer, and an N-type epitaxial layer on which the topmost epitaxial layer is disposed. Multiple epitaxial layers support the blocking voltage of the diode, and each of the multiple epitaxial layers supports a substantial portion of the blocking voltage. Optimization of the thickness and dopant concentrations of at least the top two epitaxial layers results in reduced capacitance and switching losses, while keeping effects on forward voltage and on-resistance low. Alternatively, the SBD includes a continuously graded N-type doped region whose doping varies from a lighter dopant concentration at the top of the region to a heavier dopant concentration at the bottom.

Abstract: It is an object of the present invention to form a TFT which is required to have a high withstanding voltage characteristic as well as to lower an off-current, a TFT which is required to have a high withstanding voltage characteristic as well as to raise an on-current, and a TFT in which a short channel structure and the decline in the threshold voltage arising therefrom are attached importance to, on one and the same substrate. A TFT having gate insulating films with different thickness can be formed on one and the same substrate by providing auxiliary electrodes in addition to the gate electrodes over a semiconductor film as well as laminating the insulating films.

Abstract: A thin-film transistor includes a substrate, and a gate including a double-layered structure having first and second metal layers provided on the substrate, the first metal layer being wider than the second metal layer by 1 to 4 ?m. A method of making such a thin-film transistor includes the steps of: depositing a first metal layer on a substrate, depositing a second metal layers directly on the first metal layer; forming a photoresist having a designated width on the second metal layer; patterning the second metal layer via isotropic etching using the photoresist as a mask; patterning the first metal layer by means of an anisotropic etching using the photoresist as a mask, the first metal layer being etched to have the designated width, thus forming a gate having a laminated structure of the first and second metal layers; and removing the photoresist.

Abstract: Disclosed is a thin film transistor (TFT) for a liquid crystal display (LCD) and a method for manufacturing the same that allows the number of photomasks used in a photolithography process to be decreased as compared to conventional methods. A passivation film is formed as a single layered organic insulating film, and the number of needed exposure steps is reduced, so as to decrease the number of needed photomask sheets and thereby improve the efficiency of the TFT production process. Applications of the disclosed method include reflection and transmission composite type LCDs as well as a reflection type LCD.

Abstract: The present invention provides a thin-film transistor that is formed by using a patterning method capable of forming a semiconductor channel layer in sub-micron order and a method for manufacturing thereof that provides a thin-film transistor with a larger area, and suitable for mass production. These objects are achieved by a thin-film transistor formed on a substrate 1 with a finely processed concavoconvex surface 2, in which a source electrode and a drain electrode are formed on adjacent convex portions of the concavoconvex surface 2, with a channel and a gate being formed on a concave area between the convex portions. A gate electrode 5, a gate insulating film 6 and a semiconductor channel layer 7 are laminated in this order on the concave area from the bottom surface of the concave portion toward the top surface.

Abstract: A semiconductor display device with an interlayer insulating film in which surface levelness is ensured with a limited film formation time, heat treatment for removing moisture does not take long, and moisture in the interlayer insulating film is prevented from escaping into a film or electrode adjacent to the interlayer insulating film. A TFT is formed and then a nitrogen-containing inorganic insulating film that transmits less moisture compared to organic resin film is formed so as to cover the TFT. Next, organic resin including photosensitive acrylic resin is applied and an opening is formed by partially exposing the organic resin film to light. The organic resin film where the opening is formed, is then covered with a nitrogen-containing inorganic insulating film which transmits less moisture than organic resin film does.

Abstract: The invention provides an active matrix display device in which active elements are formed on a first substrate, wiring lines are formed on a second substrate, an element chip having at least one active element is peeled off from the first substrate and is then transferred onto the second substrate, electro-optical elements are formed on a third substrate, and the second substrate adheres to the third substrate. The invention also provides a method of electrically connecting the active elements of the element chip to the wiring lines of the second substrate and of electrically connecting the active elements of the element chip to the electro-optical elements of the third substrate in a thin film transistor display device in which the active elements are thin film transistors.

Abstract: In manufacturing a semiconductor device, static electricity is generated while contact holes are formed in an interlayer insulating film by dry etching. Damage to a pixel region or a driving circuit region due to travel of the static electricity generated is prevented. Gate signal lines are spaced apart from each other above a crystalline semiconductor film. Therefore a first protective circuit is not electrically connected when contact holes are opened in an interlayer insulating film. The static electricity generated during dry etching for opening the contact holes moves from the gate signal line, damages a gate insulating film, passes the crystalline semiconductor film, and again damages the gate insulating film before it reaches the gate signal line. As the static electricity generated during the dry etching damages the first protective circuit. the energy of the static electricity is reduced until it loses the capacity of damaging a driving circuit TFT.

Abstract: An image sensor has a vertically integrated thin-film photodiode.

Abstract: The invention relates to a Schottky diode in which p-doped regions (4, 5) are incorporated in the Schottky contact area. At least one (5) of these regions (4, 5) has a greater minimum extent, in order to initiate a starting current.

Abstract: A process for integrating a Schottky contact inside the apertures of the elementary cells that constitute the integrated structure of the insulated gate power device in a totally self-alignment manner does not requires a dedicated masking step. This overcomes the limits to the possibility of increasing the packing density of the cellular structure of the integrated power device, while permitting improved performances of the co-integrated Schottky diode under inverse polarization of the device and producing other advantages. A planar integrated insulated gate power device with high packing density of the elementary cells that compose it, having a Schottky diode electrically in parallel to the co-integrated device, is also disclosed.

Abstract: An active matrix substrate includes a substrate composed of resin, and a polysilicon thin film diode formed on the substrate. The polysilicon thin film diode may be a lateral diode centrally having a region into which impurity is doped. As an alternative, the polysilicon thin film diode may be comprised of two lateral diodes electrically connected in parallel to each other and arranged in opposite directions.

Abstract: This invention relates to a MOS transistor made in the thin film of silicon of an SOI chip (10), said thin film (13) being slightly doped and of less than 30 nm in thickness, the source (14) and drain (15) contacts being of the Schottky type at the lowest level of Schottky barrier possible for majority carriers, with an accumulation type transistor operation.

Abstract: A phase change memory may be made using an isolation diode in the form of a Schottky diode between a memory cell and a word line. The use of Schottky diode isolation devices may make the memory more scaleable in some embodiments.

Abstract: An active matrix substrate includes a substrate composed of resin, and a polysilicon thin film diode formed on the substrate. The polysilicon thin film diode may be a lateral diode centrally having a region into which impurity is doped. As an alternative, the polysilicon thin film diode may be comprised of two lateral diodes electrically connected in parallel to each other and arranged in opposite directions.

Abstract: In the present invention, there is provided semiconductor devices such as a Schottky UV photodetector fabricated on n-type ZnO and MgxZn1-xO epitaxial films. The ZnO and MgxZn1-xO films are grown on R-plane sapphire substrates and the Schottky diodes are fabricated on the ZnO and MgxZn1-xO films using silver and aluminum as Schottky and ohmic contact metals, respectively. The Schottky diodes have circular patterns, where the inner circle is the Schottky contact, and the outside ring is the ohmic contact. Ag Schottky contact patterns are fabricated using standard liftoff techniques, while the Al ohmic contact patterns are formed using wet chemical etching. These detectors show low frequency photoresponsivity, high speed photoresponse, lower leakage current and low noise performance as compared to their photoconductive counterparts. This invention is also applicable to optical modulators, Metal Semiconductor Field Effect Transistors (MESFETs) and more.

Abstract: The conventional compound semiconductor switching device is prone to have a large chip size as the gate width needs to be large for achieving a low insertion loss and the separation between the connecting pad and the circuit wiring needs to be larger than 20 &mgr;m for obtaining a proper isolation between them. The overall chip size is reduced, first, by reducing the gate width of the switching FET operating at frequencies above 2.4 GHz to 700 &mgr;m or smaller together with the omission of the shunt FET, and, then, by reducing the separation between the connecting pad and the circuit wiring to 20 &mgr;m or smaller. This reduction of the separation is made possible by the introduction of an insulating film and a impurity region between the outermost portion of the connecting pad and the substrate for preventing the extension of the depletion layer.

Abstract: New Group III based diodes are disclosed having a low on state voltage (Vf, and structures to keep reverse current (Irev) relatively low. One embodiment of the invention is Schottky barrier diode made from the GaN material system in which the Fermi level (or surface potential) of is not pinned. The barrier potential at the metal-to-semiconductor junction varies depending on the type of metal used and using particular metals lowers the diode's Schottky barrier potential and results in a Vf in the range of 0.1-0.3V. In another embodiment a trench structure is formed on the Schottky diodes semiconductor material to reduce reverse leakage current. and comprises a number of parallel, equally spaced trenches with mesa regions between adjacent trenches. A third embodiment of the invention provides a GaN tunnel diode with a low Vf resulting from the tunneling of electrons through the barrier potential, instead of over it. This embodiment can also have a trench structure to reduce reverse leakage current.

Abstract: An enhancement mode semiconductor device has a barrier layer disposed between the gate electrode of the device and the semiconductor substrate underlying the gate electrode. The barrier layer increases the Schottky barrier height of the gate electrode-barrier layer-substrate interface so that the portion of the substrate underlying the gate electrode operates in an enhancement mode. The barrier layer is particularly useful ill compound semiconductor field effect transistors, and preferred materials for the barrier layer include aluminum gallium arsenide and indium gallium arsenide.

Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials.

Abstract: New Group III based diodes are disclosed having a low on state voltage (Vf) and structures to keep reverse current (Irev) relatively low. One embodiment of the invention is Schottky barrier diode made from the GaN material system in which the Fermi level (or surface potential) of is not pinned. The barrier potential at the metal-to-semiconductor junction varies depending on the type of metal used and using particular metals lowers the diode's Schottky barrier potential and results in a Vf in the range of 0.1-0.3V. In another embodiment a trench structure is formed on the Schottky diodes semiconductor material to reduce reverse leakage current. and comprises a number of parallel, equally spaced trenches with mesa regions between adjacent trenches. A third embodiment of the invention provides a GaN tunnel diode with a low Vf resulting from the tunneling of electrons through the barrier potential, instead of over it. This embodiment can also have a trench structure to reduce reverse leakage current.

Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. Radio frequency, optical, logic and other circuits in both silicon and compound semiconductor materials may be combined and interconnected in a single semiconductor structure.

Abstract: A Schottky diode includes a semiconductor substrate made of 4H—SiC, an epitaxially grown 4H—SiC layer, an ion implantation layer, a Schottky electrode, an ohmic electrode, and an insulative layer made of a thermal oxide film. The Schottky electrode and the insulative layer are not in contact with each other, with a gap being provided therebetween, whereby an altered layer does not occur. Therefore, it is possible to suppress the occurrence of a leak current.

Abstract: The semiconductor device includes a first semiconductor region made from n-conducting SiC and a second semiconductor region made from p-conducting SiC. A Schottky contact layer electrically contacts the first semiconductor region, and an ohmic p-contact layer electrically contacts the second semiconductor region. Both contact layers consist of a nickel-aluminum material. This allows both contact layers to be annealed together without adversely effecting the Schottky contact behavior.

Abstract: An insulating-gate semiconductor device has a first nitride semiconductor layer formed over a substrate and an insulating oxidation layer obtained by oxidizing a second nitride semiconductor layer formed on the first nitride semiconductor layer. A gate electrode is formed on the insulating oxidation layer.

Abstract: The present invention provides a semiconductor element in which the field-effect transistor and the Schottky diode are arranged such that a depletion layer stemming from the Schottky diode is superimposed on a depletion layer stemming from a junction between a second conductivity type semiconductor constituting the field-effect transistor and a drift region (first conductivity type semiconductor) in an off-state. Furthermore, the present invention provides a semiconductor element in which the field-effect transistor and the Schottky diode are arranged so that a second conductivity type semiconductor other than the second conductivity type semiconductor constituting the field-effect transistor is not interposed between the electric field effect transistor and the Schottky diode. According to preferable embodiments of the present invention, the reverse recovery time due to a parasitic diode can be reduced by providing the Schottky diode such that the element area of the semiconductor element is not increased.

Abstract: A semiconductor device having a barrier film comprising an extremely thin film formed of one or more monolayers each comprised of a two-dimensional array of metal atoms, in which more than one type of metal atom is provided in barrier film. In one exemplary aspect, the barrier film is used for preventing the diffusion of atoms of another material, such as a copper conductor, into a substrate, such as a semiconducting material or an insulating material. In one mode of making the semiconductor device, the barrier film is formed by depositing different types of precursors, such as metal halides (e.g., BaF2 and SrF2), onto the substrate material, and then annealing the resulting film on the substrate material to remove all of the constituents of the temporary heteroepitaxial film except for a monolayer of metal atoms left behind as attached to the surface of the substrate.

Abstract: A diode is provided which includes a first-conductivity-type cathode layer, a first-conductivity-type drift layer placed on the cathode region and having a lower concentration than the cathode layer, a generally ring-like second-conductivity-type ring region formed in the drift layer, second-conductivity-type anode region formed in the drift layer located inside the ring region, a cathode electrode formed in contact with the cathode layer, and an anode electrode formed in contact with the anode region, wherein the lowest resistivity of the second-conductivity-type anode region is at least {fraction (1/100)} of the resistivity of the drift layer, and the thickness of the anode region is smaller than the diffusion depth of the ring region.

Abstract: A microcrystal silicon film is formed on a substrate by using a silicide gas, a hydrogen gas, and a source gas that enables introduction of a metal element for accelerating crystallization of silicon in a capacitance-coupling plasma CVD apparatus. The action of the metal element provides a high film forming rate. Therefore, a technique for forming a microcrystal silicon film with high quality and high film forming rate can be provided.

Abstract: A method for producing a substrate of a reflection type liquid crystal display device is provided. The method includes the steps of: forming the input portion for inputting a signal from outside and the connecting electrode on the substrate on which the reflective electrode is formed; forming a protective film on the connecting electrode; forming an interlayer insulator under the condition that the protective film on the connecting electrode is exposed; patterning the interlayer insulator; forming a reflective electrode film on the interlayer insulator; patterning the reflective electrode film to form the reflective electrode; and removing the protective film on the connecting electrode to expose the connecting electrode.

Abstract: In a IR detector and a fabrication method thereof, the IR detector has a insulating thin film (3) made up of insulating material, many semiconductor layers (1) each having an island shape formed on the insulating thin film (3), a forward bias connection section (5) and a backward bias connection section (6) formed for each semiconductor layer (1) to be forward and backward biases to an external bias voltage, and a metal thin film (2) for electrically connecting the semiconductor layers (1) to each other through both the forward bias connection section and the backward bias connection section (5 and 6).

Abstract: An electron emitting semiconductor device is provided with a P-type semiconductor layer arranged on a semiconductor substrate having an impurity concentration. A Schottky barrier electrode is arranged on a surface of the P-type semiconductor layer. Plural P.sup.+ -type area units are positioned under and facing the Schottky barrier electrode. An N.sup.+ -type area is disposed in the vicinity of the P.sup.+ -type units. The impurity concentration is such as to cause an avalanche breakdown in at least a portion of the surfaces.

Abstract: A method for making a schottky diode structure (10) simultaneously with a polysilicon contact structure (31,33) to a transistor is provided. In a single process step, a polysilicon layer is patterned to expose a single crystal semiconductor region (22a) over one portion of a substrate, while leaving portions the polysilicon layer (31, 33, 29) intact over other portions of the substrate (22b). Multi-layer metal electrodes are deposited and patterned to form a rectifying schottky contact to the exposed single crystal region (22a), and to form an ohmic contact to the exposed polysilicon (31, 33, 29).

Abstract: The rectifying element is comprised of two electrodes, an undoped diamond film, and a B-doped p-type diamond film. The diamond films are formed of highly-oriented diamond films, of which at least 80% of the surface area consists of (100) or (111) crystal planes, and the differences {.DELTA..alpha., .DELTA..beta., .DELTA..gamma.} of Euler angles {.alpha., .beta., .gamma.}, which represent the orientations of crystal planes, simultaneously satisfy .vertline..DELTA..alpha..vertline..ltoreq.5.degree., .vertline..DELTA..bet a..vertline..ltoreq.5.degree. and .vertline..DELTA..gamma..vertline..ltoreq.5.degree. between adjacent crystal planes. The diamond rectifying element thus constructed have an excellent electrical characteristics, and multiple of the elements can be produced on a large area at low cost. The diamond rectifying elements can be used for heat-resistant and high-power rectifying elements.

Abstract: Base regions of a second conductivity type are formed and spaced apart from one another in a first major surface of a semiconductor substrate of a first conductivity type which functions as a drain region. Source regions of the first conductivity type are formed in each of the base regions and spaced apart from one another. Gate insulating films are formed on portions of the drain region which are located between adjacent source regions. Gates are formed on the gate insulating films. Source electrodes are formed such that each electrode short-circuits one-base region to the source regions formed in the base region. A first anode region of the second conductivity type is formed on a second major surface of the semiconductor substrate. A second anode region of the second conductivity type is formed on the first anode region. This second anode region is made of polycrystalline silicon of the second conductivity type and has an impurity concentration higher than that of the first anode region.

Abstract: A diamond Schottky diode including an electrically conductive substrate, a multi-layer structure of a semiconducting diamond layer and an insulating diamond layer, and a metal electrode. This diode has a greater potential barrier under a reversed bias and hence exhibits better rectifying characteristics with a smaller reverse current.

Abstract: Semiconductor device and method of manufacturing same, display device and support plate for same provided with such a semiconductor device. A semiconductor device having an insulating substrate on which a Schottky diode is formed between a metal layer and a semiconductor layer of polycrystalline or amorphous silicon extending over the metal layer is used inter alia in matrix display devices, such as LCDs. The Schottky diode forms part of a switching element of such a device and must have a low reverse current up to a reverse voltage of, for example, approximately 10 V. The known semiconductor device having Schottky diodes, in which the semiconductor material extends over a lateral surface of the Schottky metal, is found not to comply with this requirement. To overcome this deficiency a low leakage current is realized over a wide reverse voltage range due to the presence of a dielectric on the lateral surface of the Schottky metal. The dielectric suppresses the leakage current issuing from the lateral surface.

Abstract: An antifuse memory cell having a P.sup.+ polysilicon doping in a region directly under an intrinsic silicon programming layer. The P.sup.+ polysilicon region is surrounded by an N.sup.- polysilicon doped region, and the two regions are sandwiched between layers of silicon dioxide insulation. The interface between the two regions is a P-N junction, in fact, a diode. The diode does not suffer from a diffusion current that increases with increasing levels of N.sup.- doping, therefore the N.sup.- polysilicon can be heavily doped to yield a very conductive bit line interconnect for a memory matrix. The interconnect line widths can be very narrow, and further microminiaturization is aided thereby. The top metalization is aluminum and serves as a word line interconnect in the memory matrix.

Abstract: A semiconductor device of the present invention capable of obtaining a proper output signal by absorbing an overshoot or an undershoot to reduce internal noises, comprises, a logical circuit portion including a transistor, a first diode disposed between a power line and an electrode of the logical circuit portion communicating with a power supply with its cathode being directed to the power line, and a second diode disposed between a ground line and an electrode of the logical circuit portion communicating with the ground with its anode being directed to the ground line. Another semiconductor device of the present invention includes a MOS transistor. An electrode portion of the device communicating with the power line and that of the device communicating with the ground line are formed by restricting impurity concentration of semiconductor portions in contact with the associated metal electrodes and have diode effect.