Abstract: A semiconductor device includes a semiconductor body having a semiconductor body material with a dopant diffusion coefficient that is smaller than the corresponding dopant diffusion coefficient of silicon, at least one first semiconductor region doped with dopants of a first conductivity type and having a columnar shape that extends into the semiconductor body along an extension direction, wherein a respective width of the at least one first semiconductor region continuously increases along the extension direction; and at least one second semiconductor region included in the semiconductor body. The at least one second semiconductor region is arranged adjacent to the at least one first semiconductor region, and is doped with dopants of a second conductivity type complementary to the first conductivity type.

Abstract: Semiconductor devices and methods for making such devices are described. The UMOS semiconductor devices contain single-crystal gates that have been re-grown or formed at low temperature using microwaves. The devices can be formed by providing a semiconductor substrate, forming a trench in the substrate, forming an insulating layer in the trench, depositing a pre-gate layer on the insulating layer, the pre-gate layer comprising a conductive and/or semiconductive material (Si or SiGe) with a non-single crystal structure, contacting the pre-gate layer with a seed layer with a single-crystal structure, and heating the pre-gate layer using microwaves at low temperatures to recrystallize the non-single crystal structure into a single-crystal structure. These processes can improve the resistance and mobility of the gate either as a single crystal structure, optionally with a silicide contact above the source-well junction, enabling a higher switching speed UMOS device. Other embodiments are described.

Abstract: A method for making a transistor with self-aligned gate and ground plane includes forming a stack, on one face of a semi-conductor substrate, the stack including an organometallic layer and a dielectric layer. The method also includes exposing a part of the organometallic layer, a portion of the organometallic layer different to the exposed part being protected from the electron beams by a mask, the shape and the dimensions of a section, in a plane parallel to the face of the substrate, of the gate of the transistor being substantially equal to the shape and to the dimensions of a section of the organometallic portion in said plane. The method also includes removing the exposed part, and forming dielectric portions in empty spaces formed by the removal of the exposed part of the organometallic layer, around the organometallic portion.

Abstract: In a method for creating a stepped structure on a substrate, which at least includes a first portion with a first thickness and a second portion with a second thickness, at first a layer sequence of a first oxide layer, a first nitride layer, and a second oxide layer is applied onto the substrate. Then a portion of the second oxide layer and a portion of the first nitride layer are removed to expose a portion of the first oxide layer. Then a part of the first nitride layer is removed to establish the first region of the stepped structure. Then the thickness of the first oxide layer is changed at least in the established first region to establish the first thickness of this region. Subsequently, a further part of the first nitride layer is removed to establish a second region of the stepped structure.