Abstract: A transistor and an interconnect structure disposed over the transistor. The interconnect structure includes a first dielectric layer, a first conductive feature in the first dielectric layer, a first etch stop layer (ESL) disposed over the first dielectric layer and the first conductive feature, a dielectric feature disposed in the first ESL, an electrode disposed over the dielectric feature, and a second ESL disposed on the first ESL and the electrode.

Abstract: Methods, apparatus, and systems are provided for forming a resist array on a material to be patterned using chemical-mechanical planarization. The resist array may include an arrangement of two different materials that are adapted to react to activation energy differently relative to each other to enable selective removal of only one of the materials (e.g., one is reactive and the other is not reactive; one is slightly reactive and the other is very reactive; one is reactive in one domain and the other in an opposite domain). The first material may be disposed as isolated nodes between the second material. A subset of nodes may be selected from among the nodes in the array and the selected nodes may be exposed to activation energy to activate the nodes and create a mask from the resist array. Numerous additional aspects are disclosed.

Abstract: A land grid array (LGA) package including a substrate having a plurality of lands formed on a first surface of the substrate, a semiconductor chip mounted on a second surface of the substrate, a connection portion connecting the semiconductor chip and the substrate, and a support layer formed on part of a surface of a first land.

Abstract: The present disclosure provides a method that includes forming a first photoresist layer on a substrate; forming a second photoresist layer over the first photoresist layer; and performing a lithography exposure process to the first photoresist layer and the second photoresist layer, thereby forming a first latent feature in the first photoresist layer and a second latent feature in the second photoresist layer.

Abstract: A method of manufacturing a semiconductor device comprises placing a semiconductor substrate in an ashing chamber, the semiconductor substrate having a gate, a silicon nitride gate sidewall offset spacer or a silicon nitride gate sidewall pacer formed thereon, and a photo resist residue remaining on the semiconductor substrate, introducing a gas mixture including D2 or T2 into the ashing chamber, and ashing the photo resist residue using a plasma that is formed from the gas mixture. The gas mixture can include a deuterium gas or a tritium gas having a volume ratio ranging between about 1% and about 20%. Embodiments can reduce Si recess and the loss of silicon nitride thin film during ashing.

Abstract: A display device and method for fabricating includes patterning a field shield dielectric layer to expose conductors and form a cavity over the conductors. InkJet printing a semiconductor material fills a portion of the cavity in contact with the conductors. An insulation material is deposited on the semiconductor material. A pixel pad is formed over the insulation material and the field shield dielectric layer. A pixel is formed which includes a thin film transistor with an ink jet printed semiconductor layer.

Abstract: It is disclosed an over-coating agent for forming fine patterns which is applied to cover a substrate having photoresist patterns thereon and allowed to shrink under heat so that the spacing between adjacent photoresist patterns is lessened, with the applied film of the over-coating agent being removed to form fine patterns, further characterized by comprising a water-soluble polymer which contains a monomeric component and a dimeric component, wherein the total content of the monomeric component and the dimeric component in the water-soluble polymer is reduced to 10 mass % or less, and a method of forming fine patterns using the same. By the present invention, even in reducing the pattern size on a substrate having thereon patterns having different pitches, the heat shrinkage of the over-coating agent can be controlled, irrespective whether the pitch is dense or isolate, thus achieving the pattern size reduction.

Abstract: A reactive cyclodextrin derivative or a reactive glucose derivative is used as a template derivative for forming an ultra-low dielectric layer. A layer is formed of the reactive cyclodextrin derivative or the reactive glucose derivative capped with Si—H and then cured in an atmosphere of hydrogen peroxide to form the ultra-low dielectric layer.

Abstract: A dual damascene process for forming conductive interconnects on an integrated circuit die. The process includes providing a layer (16) of porous, ultra low-k (ULK) dielectric material in which a via opening (30) is subsequently formed. A thermally degradable polymeric (“porogen”) material (42) is applied to the side wall sidewalls of the opening (30) such that the porogen material penetrates deeply into the porous ULK dielectric material (thereby sealing the pores and increasing the density thereof). Once a conductive material (36) has been provided with the opening (30) and polished back by means of chemical mechanical polishing (CMP), the complete structure is subjected to a curing step to cause the porogen material (44) with the ULK dielectric layer (16) to decompose and evaporate, thereby restoring the porosity (and low-k value) of the dielectric layer (16). Attached are a marked-up copy of the originally filed specification and a clean substitute specification in accordance with 37 C.F.R. §§1.

Abstract: A structure included in a semiconductor device can include a fuse box guard ring that defines an interior region of the fuse box inside the fuse box guard ring and that defines an exterior region of the fuse box outside the fuse box guard ring. The fuse box guard ring can include protruding support members that protruding from an interior sidewall or from an exterior sidewall of the fuse box guard ring.

Abstract: There is provided a micro pattern forming method including forming a thin film on a substrate; forming a film serving as a mask when processing the thin film; processing the film serving as a mask into a pattern including lines having a preset pitch; trimming the pattern including the lines; and forming an oxide film on the pattern including the lines and on the thin film by alternately supplying a source gas and an activated oxygen species. Here, the process of trimming the pattern and the process of forming an oxide film are consecutively performed in a film forming apparatus configured to form the oxide film.

Abstract: A reactive cyclodextrin derivative or a reactive glucose derivative is used as a template derivative for forming an ultra-low dielectric layer. A layer is formed of the reactive cyclodextrin derivative or the reactive glucose derivative capped with Si—H and then cured in an atmosphere of hydrogen peroxide to form the ultra-low dielectric layer.

Abstract: The problem to be solved by the present invention is to provide such an organic surface protective layer composition that a thin and uniform protective layer can be formed on a surface of an organic layer, that the formed protective layer can easily be removed by etching, and that it can inhibit the alteration of the organic compound presenting in the surface of the organic layer exposed by the etching. Means for solving the problem is an organic surface protective layer composition containing (A) a metal alkoxide, (B) a stabilizer for the metal alkoxide and (C) an organic solvent capable of dissolving the metal alkoxide.

Abstract: A reactive cyclodextrin derivative or a reactive glucose derivative is used as a template derivative for forming an ultra-low dielectric layer. A layer is formed of the reactive cyclodextrin derivative or the reactive glucose derivative capped with Si—H and then cured in an atmosphere of hydrogen peroxide to form the ultra-low dielectric layer.

Abstract: An electronic device, such as a thin-film transistor, includes a substrate and a dielectric layer formed from a dielectric composition. The dielectric composition includes a dielectric material, a crosslinking agent, and a thermal acid generator. In particular embodiments, the dielectric material comprises a lower-k dielectric material and a higher-k dielectric material. When deposited, the lower-k dielectric material and the higher-k dielectric material form separate phases. The thermal acid generator allows the dielectric layer to be cured at relatively lower temperatures and/or shorter time periods, permitting the selection of lower-cost substrate materials that would otherwise be deformed by the curing of the dielectric layer.

Abstract: A method for manufacturing an array substrate of liquid crystal display is performed with the following steps: providing a substrate having gate lines, a gate insulating layer and an active layer pattern formed thereon in this order; depositing a first transparent conductive layer and a source/drain metal layer in this order on the substrate; forming a photoresist layer on the source/drain metal layer through a triple-tone mask; performing a wet-etching process on the source/drain metal layer and the first transparent conductive layer exposed from the photoresist layer; performing a first ashing process on the photoresist layer and performing a dry-etching process on the source/drain metal layer, the first transparent conductive layer and the active layer pattern exposed by the first ashing process; performing a second ashing process on the photoresist layer and performing a wet-etching process on the source/drain metal layer exposed by the second ashing process; and removing the remaining photoresist layer.

Abstract: Disclosed are compositions for forming organic insulating films and methods for forming organic insulating films using one or more of the compositions. The compositions include at least one ultraviolet (UV) curing agent, at least one water-soluble polymer and at least one water-soluble fluorine compound, and the method includes applying the composition to a substrate to form a coating layer, irradiating the coating layer with UV light to form an exposed layer and developing the exposed layer with an aqueous developing solution to obtain an organic insulating film and/or pattern. Also disclosed are organic thin film transistors comprising an organic insulating film formed by one of the methods using one of the compositions that may exhibit improved hysteresis performance and/or acceptable surface properties without the need for additional processing, thereby simplifying the fabrication process.

Abstract: Disclosed is a patterning method including: forming a first film on a substrate; forming a first resist film on the first film; processing the first resist film into a first resist pattern having a preset pitch by photolithography; forming a silicon oxide film on the first resist pattern and the first film by alternately supplying a first gas containing organic silicon and a second gas containing an activated oxygen species to the substrate; forming a second resist film on the silicon oxide film; processing the second resist film into a second resist pattern having a preset pitch by the photolithography; and processing the first film by using the first resist pattern and the second resist pattern as a mask.

Abstract: A substrate processing method capable of preventing a substrate rear surface from being scratched when attracted onto an electrostatic chuck. In a coater/developer (11), a photocurable resin is coated onto a rear surface of a wafer (W), the resin is cured to form a resin protective film, and a resist is coated onto a front surface of the wafer. An exposing apparatus (12) subjects the resist to light exposure processing, irradiating ultraviolet light onto a resist portion of a pattern reversed with respect to a mask pattern. The coater/developer uses a washing liquid to remove the resist, thereby forming a resist film. In an etching apparatus (13), the front surface of the wafer is electrostatically attracted onto an electrostatic chuck (49) is subjected to RIE processing. In a washing apparatus (14), the resin protective film is dissolved and removed.

Abstract: A photoresist composition includes an alkali-soluble resin, a dissolution inhibitor including a quinone diazide compound, a first additive including a benzenol compound represented by the following Chemical Formula 1, a second additive including an acrylic copolymer represented by the following Chemical Formula 2 and an organic solvent. Accordingly, heat resistance of a photoresist pattern may be improved, and the photoresist pattern may be readily stripped. As a result, crack formation in the photoresist pattern may be reduced and/or prevented.

Abstract: Methods for forming an ultra thin structure using a method that includes multiple cycles of polymer deposition of photoresist (PDP) process and etching process. The embodiments described herein may be advantageously utilized to fabricate a submicron structure on a substrate having a critical dimension less than 55 nm and beyond. In one embodiment, a method of forming a submicron structure on a substrate may include providing a substrate having a patterned photoresist layer disposed on a film stack into an etch chamber, wherein the film stack includes at least a hardmask layer disposed on a dielectric layer, performing a polymer deposition process to deposit a polymer layer on the pattered photoresist layer, thus reducing a critical dimension of an opening in the patterned photoresist layer, and etching the underlying hardmask layer through the opening having the reduced dimension.

Abstract: A plurality of gate lines are formed on a substrate. After depositing a gate insulating layer, a semiconductor layer and a doped amorphous silicon layer are sequentially formed thereon. A lower insulating layer made of silicon nitride and an upper insulating layer made of a photosensitive organic material are deposited thereon after forming data lines and drain electrodes. The upper insulating layer is patterned to form an unevenness pattern on its surface and contact holes on the drain electrodes. The lower insulating layer is patterned together with the gate insulating layer using a photoresist pattern having apertures located in the contact holes to form other contact holes respectively exposing the drain electrodes, portions of the gate lines, and portions of the data lines.

Abstract: Provided are a composition for organic thin film transistors including a material including an anthracenyl group and a cross-linker including a maleimide group, an organic thin film transistor formed by using the composition, and a method for manufacturing the same.

Abstract: By introducing new concepts into a structure of a conventional organic semiconductor element and without using a conventional ultra thin film, an organic semiconductor element is provided which is more reliable and has higher yield. Further, efficiency is improved particularly in a photoelectronic device using an organic semiconductor. Between an anode and a cathode, there is provided an organic structure including alternately laminated organic thin film layer (functional organic thin film layer) realizing various functions by making an SCLC flow, and a conductive thin film layer (ohmic conductive thin film layer) imbued with a dark conductivity by doping it with an acceptor and a donor, or by the like method.

Abstract: An ashing method of a target substrate is applied after plasma-etching a part of a low-k film by using a patterned resist film as a mask in a vacuum processing chamber. The method includes a process of removing the resist film in the vacuum processing chamber, and a pre-ashing process, performed prior to the main ashing process, for ashing the target substrate for a time period while maintaining the target substrate at a temperature in a range of from about 80 to 150° C.

Abstract: A wall surface of a film forming container is heated to or above a vaporization temperature of a material monomer, which is used to form an organic film, by using an external heater formed along the wall surface of the film forming container, substrates are heated to a thermal polymerization reaction temperature by using an internal heater that is disposed apart from the external heater and near a substrate-supporting container in which the substrates are received, and the organic film is formed through thermal polymerization occurring on the substrates by supplying the material monomer into the film forming container.

Abstract: A method of manufacturing a liquid crystal display at a reduced cost is presented. The method entails: preparing an insulating substrate; forming a gate line and a data line on the insulating substrate to define a pixel area; forming a thin film transistor at an intersection of the gate line and the data line; forming A passivation layer on the thin film transistor; positioning a mold having a concavo-convex pattern on the organic passivation layer, pressing the mold, and forming the concavo-convex pattern on the surface of the organic passivation layer. A pixel electrode on the organic passivation layer is formed.

Abstract: An organic light emitting display device includes a first substrate, an array of organic light emitting pixels formed on the substrate, a second substrate opposing the first substrate. A frit seal interconnects the first and second substrates and surrounds the array of organic light emitting pixels. A film structure interposed between the second substrate and the array of organic light emitting pixels and contacts both the second substrate and the array.

Abstract: By introducing new concepts into a structure of a conventional organic semiconductor element and without using a conventional ultra thin film, an organic semiconductor element is provided which is more reliable and has higher yield. Further, efficiency is improved particularly in a photoelectronic device using an organic semiconductor. Between an anode and a cathode, there is provided an organic structure including alternately laminated organic thin film layer (functional organic thin film layer) realizing various functions by making an SCLC flow, and a conductive thin film layer (ohmic conductive thin film layer) imbued with a dark conductivity by doping it with an acceptor and a donor, or by the like method.

Abstract: A method of reworking a semiconductor substrate and a method of forming a pattern of semiconductor device using the same without damage to an organic anti-reflective coating (ARC) is provided. The method of reworking a semiconductor substrate includes forming a photoresist pattern on a substrate having the organic ARC formed thereon. An entire surface of the substrate having the photoresist pattern formed thereon may be exposed when a defect is present in the photoresist pattern. The entire-surface-exposed photoresist pattern may be removed by performing a developing process without damage to the organic ARC.

Abstract: A method of forming a pattern on a wafer is provided. The method includes applying a photoresist on the wafer and exposing the wafer to define a first pattern on the photoresist. The method also includes exposing the wafer to define a second pattern on the photoresist, wherein each of the first and second patterns comprises unexposed portions of the photoresist and developing the wafer to form the first and second patterns on the photoresist, wherein the first and second patterns are formed by removing the unexposed portions of the photoresist.

Abstract: A method for forming porous insulating film using cyclic siloxane raw material monomer is provided, which method suppresses detachment of hydrocarbon and is able to form a low-density film. In a method where at least cyclic organosiloxane raw material 101 is supplied to a reaction chamber and an insulating film is formed by plasma vapor deposition method, above-mentioned problem is solved by a method for a forming porous insulating film using the mixed gas of a cyclic organosiloxane raw material 101 and a compound raw material 103 including a part of chemical structure comprising the cyclic organosiloxane raw material 101. The compound raw material 103 is preferably a compound including a part of side chain of the cyclic organosiloxane raw material 101.

Abstract: A method of fabricating a semiconductor device includes etching a silicon oxide film, a silicon nitride film, a polycrystalline silicone film, and a gate insulating film in a predetermined pattern including a first opening width corresponding to a first trench and a second opening width corresponding to a second trench, the second opening width being larger than the first opening width, and etching the semiconductor substrate to simultaneously form the first and second trenches so that a first depth of the first trench is equal to a second depth of the second trench, and a first angle between a first side surface and a first bottom surface of the first trench is smaller than a second angle between a second side surface and a second bottom surface of the second trench, and the first trench includes a curved portion at an upper portion of the first side surface.

Abstract: A method of fabricating an array substrate for a liquid crystal display device comprises forming a gate line, a data line that crosses the gate line and a thin film transistor connected to the gate line and the data line on a substrate, and forming an organic insulating material layer on the gate line, the data line and the thin film transistor. The organic insulating material layer has photo curability, flexibility and dynamic stability. The method further comprises forming a passivation layer that has a drain contact hole from the organic insulating material layer by using a stamp that has a convex portion. The drain contact hole exposes a drain electrode of the thin film transistor. The method also comprises forming a pixel electrode on the passivation layer. The pixel electrode is connected to the drain electrode through the drain contact hole.

Abstract: Provided are a composition for organic thin film transistors including a material including an anthracenyl group and a cross-linker including a maleimide group, an organic thin film transistor formed by using the composition, and a method for manufacturing the same.

Abstract: The invention relates to a structure for a semiconductor arrangement. A resist structure for supporting deposition of a solution containing a semiconductor is directly or through intervening layers coupled to a substrate. The resist structure comprises a depression (301) for depositing of the solution containing the semiconductor (309) and a trough (305) aligning at least part of an edge of the depression (309) and separated from the depression (309) by a protrusion (307). The trough (305) preferably surrounds the depression (309). The trough provides a pinning effect on the solution containing the semiconductor thereby improving the wettability and accordingly allowing for increased volume of semiconductor to be applied to a given area.

Abstract: A semiconductor device including a circuit structure and a protective layer is provided. The circuit structure has multiple contacts. The protective layer is located on the circuit structure and has multiple openings and multiple protrusions, wherein the contacts are exposed by the openings and the protrusions are located on the contacts.

Abstract: Before applying a resist on a first gate insulating film, a thinner is provided on an entire surface including a surface of the first gate insulating film to wash the surface of the first gate insulating film. Specifically, while a semiconductor substrate is being rotated, onto a central part thereof the thinner is provided from a nozzle, so that the thinner is spread outward in a radial direction of the semiconductor substrate to be applied on an entire surface of the semiconductor substrate by a centrifugal force.

Abstract: Techniques for removal of photolithographic films used in the manufacture of semiconductor devices are provided. A substrate support member of a first processing chamber includes at least three retractable pins capable of elevating a wafer from a surface of the substrate support member. In addition, the first processing chamber is configured to automatically maintain the substrate support member at a first temperature. The wafer is elevated from the surface of the substrate support member using the at least three retractable pins. Thermal heating of the substrate from the substrate support member is reduced. A photoresist layer of the substrate is etched away while the substrate is in an elevated position. An anti-reflective layer of the substrate can be etched to remove substantially all of the anti-reflective layer. In a specific embodiment, the anti-reflective layer includes a DUO™ Bottom Anti-Reflective Coating by Honeywell International Inc.

Abstract: A method of trimming hard mask is provided. The method includes providing a substrate, a hard mask layer, and a tri-layer stack on the substrate. The tri-layer stack includes a top photo resist layer, a silicon photo resist layer, and a bottom photo resist layer. The top photo resist layer, the silicon photo resist layer, the bottom photo resist layer, and the hard mask layer are patterned sequentially. A trimming process is performed on the hard mask layer. The bottom photo resist layer of the present invention is thinner and loses some height in the etching process, so the bottom photo resist layer will not collapse.

Abstract: A catalyst supporting substrate includes a first region (54) which is formed on a substrate (50); and a second region (55) which is formed covering a part of the first region. The first region (54) includes a catalyst supporting portion (54a) containing a first material. The second region (55) includes a catalyst portion (55) containing a second material which is different from the first material. The first material includes a metal containing at least one of elements selected from the second group to the fourteenth group of the periodic table or a compound thereof. The second material is a catalyst which grows carbon nanotubes in a vapor phase.

Abstract: The present invention relates to dielectric nanostructures useful in semiconductor devices and other electronic devices and methods for manufacturing the dielectric nanostructures. The nanostructures generally comprises an array of isolated pillars positioned on a substrate. The methods of the present invention involve using semiconductor technology to manufacture the nanostructures from a mixture of a crosslinkable dielectric material and an amphiphilic block copolymer.

Abstract: The present invention is a film forming method for an SiOCH film, comprising a unit-film-forming step including: a deposition step of depositing an SiOCH film element by using an organic silicon compound as a raw material and by using a plasma CVD method; and a hydrogen plasma processing step of providing a hydrogen plasma process to the deposited SiOCH film element, wherein the unit-film-forming step is repeated several times so as to form an SiOCH film on a substrate.

Abstract: A method of forming a multi-layered insulation film includes forming a first insulation layer using a first feed gas, the first insulation layer including methyl silsesquioxane (MSQ), forming a second insulation layer using a second feed gas, the second insulation layer including a polysiloxane compound having an Si—H group such that the second insulation layer is in contact with a top of the first insulation layer, and forming a third insulation layer including an inorganic material such that the third insulation layer is in contact with a top of the second insulation layer.

Abstract: A multi-functional cyclic silicate compound, a siloxane-based polymer prepared from the silicate compound and a process of producing an insulating film using the siloxane-based polymer. The silicate compound of the present invention is highly compatible with conventional pore-generating substances and hardly hygroscopic, so it is useful for the preparation of a siloxane-based polymer suitable to a SOG process. Furthermore, a film produced by the use of such siloxane-based polymer is excellent in mechanical properties, thermal stability and crack resistance and enhanced in insulating properties by virtue of its low hygroscopicity. Therefore, in the field of semiconductor production, this film is of great use as an insulating film.

Abstract: A method for forming a patterned photoresist is provided, which is applicable to a substrate. The method includes: performing an implantation process over the substrate; next, performing a surface treatment process; then, forming a photoresist layer over the substrate; and thereafter, patterning the photoresist layer.

Abstract: Methods for high temperature deposition an amorphous carbon film with improved step coverage are provided. In one embodiment, a method for of depositing an amorphous carbon film includes providing a substrate in a process chamber, heating the substrate at a temperature greater than 500 degrees Celsius, supplying a gas mixture comprising a hydrocarbon compound and an inert gas into the process chamber containing the heated substrate, and depositing an amorphous carbon film on the heated substrate having a stress of between 100 mega-pascal (MPa) tensile and about 100 mega-pascal (MPa) compressive.

Abstract: A semiconductor structure is provided that includes a spacer directly abutting a topographic edge of at least one patterned material layer. The spacer is a non-removable polymeric block component of a self-assembled block copolymer. A method of forming such a semiconductor structure including the inventive spacer is also provided that utilizes self-assembled block copolymer technology.

Abstract: A process of making an organic thin film on a substrate by atomic layer deposition is disclosed, the process comprising simultaneously directing a series of gas flows along substantially parallel elongated channels, and wherein the series of gas flows comprises, in order, at least a first reactive gaseous material, an inert purge gas, and a second reactive gaseous material, optionally repeated a plurality of times, wherein the first reactive gaseous material is capable of reacting with a substrate surface treated with the second reactive gaseous material wherein the first reactive gaseous material, the second reactive gaseous material or both is a volatile organic compound. The process is carried out substantially at or above atmospheric pressure and at a temperature under 250° C., during deposition of the organic thin film.

Abstract: A porous SiCOH (e.g., p-SiCOH) dielectric film in which the stress change caused by increased tetrahedral strain is minimized by post treatment in unsaturated Hydrocarbon ambient. The inventive p-SiCOH dielectric film has more —(CHx) and less Si—O—H and Si—H bondings as compared to prior art p-SiCOH dielectric films. Moreover, a stable pSiOCH dielectric film is provided in which the amount of Si—OH (silanol) and Si—H groups at least within the pores has been reduced by about 90% or less by the post treatment. Hence, the inventive p-SiCOH dielectric film has hydrophobicity improvement as compared with prior art p-SiCOH dielectric films. In the present invention, a p-SiCOH dielectric film is produced that is flexible since the pores of the inventive film include stabilized crosslinking —(CHx)— chains wherein x is 1, 2 or 3 therein.