Plurality Of Lead Frames Mounted In One Device (epo) Patents (Class 257/E23.042)
  • Patent number: 7119423
    Abstract: A semiconductor chip is mounted on the substrate so that the first group of electrodes faces the first group of leads and the second group of electrodes faces the second group of leads. The first group of leads extends in a direction away from the second group of electrodes. Each of the second group of leads extends so as to pass between the first group of electrodes and is formed to be bent in the region between first and second straight lines.
    Type: Grant
    Filed: November 23, 2004
    Date of Patent: October 10, 2006
    Assignee: Seiko Epson Corporation
    Inventor: Tatsuhiro Urushido
  • Patent number: 7109063
    Abstract: The present invention provides techniques to fabricate build-up single or multichip modules. In one embodiment, this is accomplished by dispensing die-attach material in one or more pre-etched cavities on a substrate. A semiconductor die is then placed over each pre-etched cavity including the die-attach material by urging a slight downward pressure on the substrate such that an active surface of each placed semiconductor die is disposed across from the substrate and is further substantially coplanar with the substrate. The semiconductor die is then secured to the substrate by curing the die-attach material. A miniature circuit board, including one or more alternating layer of dielectric material and metallization structures, is then formed over the substrate and the active surface of each semiconductor die to electrically interconnect the semiconductor dies.
    Type: Grant
    Filed: December 3, 2004
    Date of Patent: September 19, 2006
    Assignee: Micron Technology, Inc.
    Inventor: Tongbi Jiang
  • Patent number: 7109576
    Abstract: A semiconductor component includes a substrate and multiple stacked, encapsulated semiconductor dice on the substrate. A first die is back bonded to the substrate and encapsulated in a first encapsulant, and a second die is back bonded to the first encapsulant. The first encapsulant has a planar surface for attaching the second die, and can also include locking features for the second die. The component also includes a second encapsulant encapsulating the second die and forming a protective body for the component. A method for fabricating the component includes the steps of attaching the first die to the substrate, forming the first encapsulant on the first die, attaching the second die to the first encapsulant, and forming the second encapsulant on the second die.
    Type: Grant
    Filed: June 4, 2004
    Date of Patent: September 19, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Todd O. Bolken, Chad A. Cobbley