Bidirectional Device (e.g., Triac) (epo) Patents (Class 257/E29.215)
  • Patent number: 7423298
    Abstract: Two operation channels CH1 and CH2 of a bidirectional photothyristor chip 31 are disposed away from each other so as not to intersect with each other. In between a P-gate diffusion region 23 on the left-hand side and a P-gate diffusion region 23? on the right-hand side on an N-type silicon substrate, and in between the CH1 and the CH2, a channel isolation region 29 comprised of an oxygen doped semi-insulating polycrystalline silicon film 35a doped with phosphorus is formed. Consequently, a silicon interface state (Qss) in the vicinity of the channel isolation region 29 on the surface of the N-type silicon substrate increases, so that holes or minority carriers in the N-type silicon substrate are made to disappear in the region. This makes it possible to prevent such commutation failure that when a voltage of the inverted phase is applied to the CH2 side at the point of time when the CH1 is turned off, the CH2 is turned on without incidence of light, and this allows a commutation characteristic to be enhanced.
    Type: Grant
    Filed: March 16, 2005
    Date of Patent: September 9, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Mitsuru Mariyama, Satoshi Nakajima
  • Patent number: 7402845
    Abstract: A semiconductor package that includes a compound component and a diode arranged in a cascode configuration to function as a rectifier.
    Type: Grant
    Filed: January 3, 2007
    Date of Patent: July 22, 2008
    Assignee: International Rectifier Corporation
    Inventors: Chuan Cheah, Kunzhong Hu
  • Publication number: 20080142834
    Abstract: A voltage-controlled vertical bidirectional monolithic switch, referenced with respect to the rear surface of the switch, formed from a lightly-doped N-type semiconductor substrate, in which the control structure includes, on the front surface side, a first P-type well in which is formed an N-type region, and a second P-type well in which is formed a MOS transistor, the first P-type well and the gate of the MOS transistor being connected to a control terminal, said N-type region being connected to a main terminal of the MOS transistor, and the second main terminal of the MOS transistor being connected to the rear surface voltage of the switch.
    Type: Application
    Filed: February 5, 2008
    Publication date: June 19, 2008
    Applicant: STMicroelectronics S.A.
    Inventor: Samuel Menard
  • Patent number: 7274047
    Abstract: An electrostatic discharge (ESD) protection circuit in a semiconductor integrated circuit (IC) having protected circuitry. The ESD protection circuit includes a silicon controlled rectifier (SCR) having at least one first type high dopant region coupled to a first reference potential of the protected circuitry, and at least one second type high dopant region coupled to a second reference potential of the IC. The SCR is triggered by an external on-chip trigger device, which is adapted for injecting a trigger current into at least one gate of the SCR.
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: September 25, 2007
    Assignees: Sarnoff Corporation, Sarnoff Europe BVBA
    Inventors: Cornelius Christian Russ, Markus Paul Josef Mergens, John Armer, Koen Gerard Maria Verhaege
  • Patent number: 7193251
    Abstract: In multiple port chip circuit, an ESD protection circuit and method of protecting the ports of the multiple port circuit, includes providing a plurality of bi-directional snapback devices such as DIACs and connecting only one electrode to ground while connecting the other electrodes to the ports that are to be protected.
    Type: Grant
    Filed: January 9, 2003
    Date of Patent: March 20, 2007
    Assignee: National Semiconductor Corporation
    Inventors: Vladislav Vashchenko, Ann Concannon, Peter J Hopper, Marcel ter Beek
  • Patent number: 7190006
    Abstract: The invention concerns at disc comprising a highly-doped substrate (20) of a first type of conductivity, a lightly-doped epitaxial layer (22) of the second type of conductivity including in the neighbourhood of the substrate (20) a more highly-doped part (21), a highly-doped region (24) of the first type of conductivity on the side of the upper surface of the epitaxial layer, a region (23) of the second type of conductivity more doped than the epitaxial layer beneath the region (24) of the first type of conductivity and not overlapping relative thereto, a channel retaining ring (25) of the second type of conductivity more highly doped than the epitaxial layer, outside the first region, a wall (26) of the first type of conductivity outside said ring, joining the substrate.
    Type: Grant
    Filed: October 12, 2001
    Date of Patent: March 13, 2007
    Assignee: STMicroelectronics S.A.
    Inventor: GĂ©rard Ducreux
  • Patent number: 6914271
    Abstract: A bidirectional switch for switching an A.C. voltage at a load, including a monolithic component, formed in an N-type substrate, including a first vertical thyristor; a second vertical thyristor; a P-type triggering region formed opposite to the cathode of the first thyristor and an N-type triggering region formed in the P-type triggering region, the P-type triggering region being intended to receive a control signal in a negative halfwave of the A.C. voltage to trigger the first thyristor; a resistive element connected to the P-type triggering region and to the anode of the first thyristor; and a capacitor having a terminal connected to the N-type triggering region and its other terminal intended to be connected to the reference voltage.
    Type: Grant
    Filed: December 23, 2003
    Date of Patent: July 5, 2005
    Assignee: STMicroelectronics S.A.
    Inventor: Samuel Menard