Abstract: The present disclosure provides a display substrate and a manufacturing method thereof, and a display device, belongs to the field of display technology. The method includes forming a first thin film transistor, which includes: forming a first gate of the first thin film transistor on a base substrate through a patterning process; forming a first gate insulating layer on a side of the first gate distal to the base substrate; sequentially forming a first semiconductor material layer, a second gate insulating layer and a second gate metal layer on a side of the first gate insulating layer distal to the base substrate, and forming a pattern including an active layer of the first thin film transistor, a pattern of the second gate insulating layer and a second gate of the first thin film transistor through a patterning process.

Abstract: Transistor structures and methods of forming transistor structures are provided. The transistor structures include alternating layers of a first epitaxial material and a second epitaxial material. In some embodiments, one of the first epitaxial material and the second epitaxial material may be removed for one of an n-type or p-type transistor. A bottommost layer of the first epitaxial material and the second epitaxial material may be be removed, and sidewalls of one of the first epitaxial material and the second epitaxial material may be indented or recessed.

Abstract: An extremely thin SOI MOSFET device on an SOI substrate is provided with a back gate layer on a Si substrate superimposed by a thin BOX layer; an extremely thin SOI layer (ETSOI) on top of the thin BOX layer; and an FET device on the ETSOI layer having a gate stack insulated by spacers. The thin BOX is formed under the ETSOI channel, and is provided with a thicker dielectric under source and drain to reduce the source/drain to back gate parasitic capacitance. The thicker dielectric portion is self-aligned with the gate. A void within the thicker dielectric portion is formed under the source/drain region. The back gate is determined by a region of semiconductor damaged by implantation, and the formation of an insulating layer by lateral etch and back filling with dielectric.

Abstract: A masking layer is applied over a top semiconductor layer and patterned to expose in an opening a shallow trench isolation structure and a portion of a top semiconductor region within which a first source/drain region and a body is to be formed. Ions are implanted into a portion of a buried insulator layer within the area of the opening to form damaged buried insulator region. The shallow trench isolation structure is removed and the damaged buried insulator region is etched selective to undamaged buried insulator portions to form a cavity. A dielectric layer is formed on the sidewalls and the exposed bottom surface of the top semiconductor region and a back gate filling the cavity is formed. A contact is formed to provide an electrical bias to the back gate so that the electrical potential of the body and the first source/drain region is electrically modulated.

Abstract: In the semiconductor device having a structure in which a plurality of layers are built-up by layers made of different materials or layers including various formed patterns, it is an object to provide a method which smoothing surface can be achieved without a polishing treatment by CMP method or a smoothing process by depositing a SOG film, a substrate material is not chosen, and the smoothing is simple and easy. In the semiconductor device in which a plurality of different layers are formed, smoothing surface can be achieved without the polishing treatment by the CMP method or the smoothing process by depositing the SOG film to a dielectric film formed on a dielectric film and a wring (electrode) or a semiconductor layer in a manner that an aperture portion is formed in the dielectric film, the wring (electrode) or the semiconductor layer is formed in the aperture portion.

Abstract: An array substrate for a display device includes an insulating substrate, a buffer layer which is disposed on the insulating substrate and is formed of silicon oxide with a refractive index equal to a refractive index of the insulating substrate, a first insulation layer which is disposed on the buffer layer and formed of silicon nitride, a second insulation layer which is disposed on the first insulation layer and formed of silicon oxide, a switching element including a semiconductor layer disposed on the second insulation layer, and a pixel electrode connected to the switching element.