Comprising Group Iii-v Or Ii-vi Compound, Or Of Se, Te, Or Oxide Semiconductor (epo) Patents (Class 257/E29.296)
  • Patent number: 8901658
    Abstract: A thin film transistor (TFT) is provided, which includes a gate, a semiconductor layer, an insulation layer, a source and a drain. The semiconductor layer has a first end and a second end opposite to the first end. The insulation layer is disposed between the gate and the semiconductor layer. The source clamps the first end of the semiconductor layer and the drain clamps the second end of the semiconductor layer.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: December 2, 2014
    Assignee: E Ink Holdings Inc.
    Inventors: Henry Wang, Chia-Chun Yeh, Xue-Hung Tsai, Ted-Hong Shinn
  • Patent number: 8895376
    Abstract: A thin film transistor includes: an insulating layer; a gate electrode provided on the insulating layer; a gate insulating film provided on the gate electrode; a semiconductor layer provided on the gate insulating film, the semiconductor layer being formed of oxide; source and drain electrodes provided on the semiconductor layer; and a channel protecting layer provided between the source and drain electrodes and the semiconductor layer. The source electrode is opposed to one end of the gate electrode. The drain electrode is opposed to another end of the gate electrode. The another end is opposite to the one end. The drain electrode is apart from the source electrode. The channel protecting layer covers at least a part of a side face of a part of the semiconductor layer. The part of the semiconductor layer is not covered with the source and drain electrodes above the gate electrode.
    Type: Grant
    Filed: January 27, 2014
    Date of Patent: November 25, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuyoshi Saito, Tomomasa Ueda, Shintaro Nakano, Shuichi Uchikoga
  • Patent number: 8895977
    Abstract: A thin film transistor includes a substrate, an oxide semiconductor layer that is disposed on the substrate, a gate electrode that overlaps with the oxide semiconductor layer, a gate insulating layer that is disposed between the oxide semiconductor layer and the gate electrode, and a source electrode and a drain electrode that at least partially overlap with the oxide semiconductor layer and are spaced from each other. The gate insulating layer includes an oxide including a first material. The oxide semiconductor layer includes an oxide which includes a same material as the first material and a second material, and the source electrode and the drain electrode include an oxide that includes a same material as the second material and a third material, and a grain boundary is not formed on an interface between at least one of the gate insulating layer and the oxide semiconductor layer or between the oxide semiconductor layer, and the source electrode and the drain electrode.
    Type: Grant
    Filed: November 9, 2012
    Date of Patent: November 25, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Doo Hyoung Lee, Bo Sung Kim, Chan Woo Yang, Seung-Ho Jung, Yeon Taek Jeong, June Whan Choi, Tae-Young Choi
  • Patent number: 8889499
    Abstract: A semiconductor device includes an oxide semiconductor layer including a channel formation region which includes an oxide semiconductor having a wide band gap and a carrier concentration which is as low as possible, and a source electrode and a drain electrode which include an oxide conductor containing hydrogen and oxygen vacancy, and a barrier layer which prevents diffusion of hydrogen and oxygen between an oxide conductive layer and the oxide semiconductor layer. The oxide conductive layer and the oxide semiconductor layer are electrically connected to each other through the barrier layer.
    Type: Grant
    Filed: September 17, 2013
    Date of Patent: November 18, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kengo Akimoto
  • Patent number: 8883556
    Abstract: A semiconductor device capable of high speed operation is provided. Further, a semiconductor device in which change in electric characteristics due to a short channel effect is hardly caused is provided. An oxide semiconductor having crystallinity is used for a semiconductor layer of a transistor. A channel formation region, a source region, and a drain region are formed in the semiconductor layer. The source region and the drain region are formed by self-aligned process in which one or more elements selected from Group 15 elements are added to the semiconductor layer with the use of a gate electrode as a mask. The source region and the drain region can have a wurtzite crystal structure.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: November 11, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 8884287
    Abstract: A semiconductor device including a thin film transistor which includes an oxide semiconductor layer and has high electric characteristics and reliability. Film deposition is performed using an oxide semiconductor target containing an insulator (an insulating oxide, an insulating nitride, silicon oxynitride, aluminum oxynitride, or the like), typically SiO2, so that the semiconductor device in which the Si-element concentration in the thickness direction of the oxide semiconductor layer has a gradient which increases in accordance with an increase in a distance from a gate electrode is realized.
    Type: Grant
    Filed: December 24, 2013
    Date of Patent: November 11, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichiro Sakata, Takashi Shimazu, Hiroki Ohara, Toshinari Sasaki, Shunpei Yamazaki
  • Patent number: 8884283
    Abstract: An object is to provide a semiconductor device having a novel structure with a high degree of integration. A semiconductor device includes a semiconductor layer having a channel formation region, a source electrode and a drain electrode electrically connected to the channel formation region, a gate electrode overlapping with the channel formation region, and a gate insulating layer between the channel formation region and the gate electrode. A portion of a side surface of the gate insulating layer and a portion of a side surface of the source electrode or the drain electrode are substantially aligned with each other when seen from a planar direction.
    Type: Grant
    Filed: May 27, 2011
    Date of Patent: November 11, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd
    Inventor: Kiyoshi Kato
  • Patent number: 8883558
    Abstract: An object is, in a thin film transistor in which an oxide semiconductor is used as an active layer, to prevent change in composition, film quality, an interface, or the like of an oxide semiconductor region serving as an active layer, and to stabilize electrical characteristics of the thin film transistor. In a thin film transistor in which a first oxide semiconductor region is used as an active layer, a second oxide semiconductor region having lower electrical conductivity than the first oxide semiconductor region is formed between the first oxide semiconductor region and a protective insulating layer for the thin film transistor, whereby the second oxide semiconductor region serves as a protective layer for the first oxide semiconductor region; thus, change in composition or deterioration in film quality of the first oxide semiconductor region can be prevented, and electrical characteristics of the thin film transistor can be stabilized.
    Type: Grant
    Filed: October 2, 2013
    Date of Patent: November 11, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kengo Akimoto, Toshinari Sasaki, Hideaki Kuwabara
  • Patent number: 8878174
    Abstract: A novel semiconductor element contributing to an increase in circuit scale is provided. In the semiconductor element, two different electrical switches are formed using a single oxide semiconductor layer. For example, in the semiconductor element, formation of a channel (a current path) in the vicinity of a bottom surface (a first surface) of the oxide semiconductor layer and formation of a channel in the vicinity of a top surface (a second surface) of the oxide semiconductor layer are independently controlled. Therefore, the circuit area can be reduced as compared to the case two electrical switches are separately provided (for example, the case where two transistors are separately provided). That is, a circuit is formed using the semiconductor element, whereby an increase in the circuit area due to an increase in circuit scale can be suppressed.
    Type: Grant
    Filed: April 9, 2012
    Date of Patent: November 4, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Junichiro Sakata
  • Patent number: 8878172
    Abstract: An object is to control composition and a defect of an oxide semiconductor, another object is to increase a field effect mobility of a thin film transistor and to obtain a sufficient on-off ratio with a reduced off current. A solution is to employ an oxide semiconductor whose composition is represented by InMO3(ZnO)m, where M is one or a plurality of elements selected from Ga, Fe, Ni, Mn, Co, and Al, and m is preferably a non-integer number of greater than 0 and less than 1. The concentration of Zn is lower than the concentrations of In and M. The oxide semiconductor has an amorphous structure. Oxide and nitride layers can be provided to prevent pollution and degradation of the oxide semiconductor.
    Type: Grant
    Filed: October 19, 2009
    Date of Patent: November 4, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunichi Ito, Toshinari Sasaki, Miyuki Hosoba, Junichiro Sakata
  • Patent number: 8878176
    Abstract: A thin-film transistor with a fluorinated channel and fluorinated source and drain regions and methods of fabrication are provided. The thin-film transistor includes: a substrate; a semiconductor active layer of fluorine-doped metal-oxide formed on the substrate; fluorine-doped source and drain regions disposed adjacent to the semiconductor active layer; a gate electrode disposed over the semiconductor active layer, configured to induce a continuous conduction channel between the source and drain regions; and a gate dielectric material separating the gate electrode and the channel.
    Type: Grant
    Filed: August 10, 2012
    Date of Patent: November 4, 2014
    Assignee: The Hong Kong University of Science and Technology
    Inventors: Man Wong, Hoi Sing Kwok, Zhi Ye
  • Patent number: 8872229
    Abstract: A thin film transistor includes a substrate and an active layer formed on the substrate. The active layer includes a channel region, a source region and a drain region. A source electrode and a drain electrode are formed on the source region and the drain region respectively. A gate insulating layer is formed between a gate electrode and the channel region. The thin film transistor further includes a nitride conductive layer formed between the drain electrode and the drain region, and between the source electrode and source region. The nitride conductive layer has a carrier concentration higher than that of the active layer, thereby reducing contacting resistances between the drain electrode and the drain region and between the source electrode and source region.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: October 28, 2014
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Jian-Shihn Tsang
  • Patent number: 8865555
    Abstract: A base insulating film is formed over a substrate. A first oxide semiconductor film is formed over the base insulating film, and then first heat treatment is performed to form a second oxide semiconductor film. Then, selective etching is performed to form a third oxide semiconductor film. An insulating film is formed over the first insulating film and the third oxide semiconductor film. A surface of the insulating film is polished to expose a surface of the third oxide semiconductor film, so that a sidewall insulating film is formed in contact with at least a side surface of the third oxide semiconductor film. Then, a source electrode and a drain electrode are formed over the sidewall insulating film and the third oxide semiconductor film. A gate insulating film and a gate electrode are formed.
    Type: Grant
    Filed: January 23, 2012
    Date of Patent: October 21, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Teruyuki Fujii, Sho Nagamatsu
  • Patent number: 8865516
    Abstract: The present invention provides an oxide semiconductor capable of achieving a thin film transistor having stable transistor characteristics, a thin film transistor having a channel layer formed of the oxide semiconductor and a production method thereof, and a display device equipped with the thin film transistor. The oxide semiconductor of the present invention is an oxide semiconductor for a thin film transistor. The oxide semiconductor includes indium, gallium, zinc, and oxygen as constituent atoms, and the oxygen content of the oxide semiconductor is 87% to 95% of the stoichiometric condition set as 100%, in terms of atomic units.
    Type: Grant
    Filed: March 10, 2010
    Date of Patent: October 21, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshifumi Ohta, Go Mori, Hirohiko Nishiki, Yoshimasa Chikama, Tetsuya Aita, Masahiko Suzuki, Okifumi Nakagawa, Michiko Takei, Yoshiyuki Harumoto, Takeshi Hara
  • Patent number: 8859330
    Abstract: A semiconductor device including an oxide semiconductor, which has stable electric characteristics and high reliability, is provided. In a method for manufacturing a transistor including an oxide semiconductor film, an implantation step where rare gas ions are implanted to the oxide semiconductor film is performed, and the oxide semiconductor film to which rare gas ions are implanted is subjected to a heating step under reduced pressure, in a nitrogen atmosphere, or in a rare gas atmosphere, whereby hydrogen or water contained in the oxide semiconductor film to which rare gas ions are implanted is released; thus, the oxide semiconductor film is highly purified.
    Type: Grant
    Filed: March 14, 2012
    Date of Patent: October 14, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichi Koezuka, Shinji Ohno, Yuichi Sato
  • Patent number: 8860023
    Abstract: Reducing hydrogen concentration in a channel formation region of an oxide semiconductor is important in stabilizing threshold voltage of a transistor including an oxide semiconductor and improving reliability. Hence, hydrogen is attracted from the oxide semiconductor and trapped in a region of an insulating film which overlaps with a source region and a drain region of the oxide semiconductor. Impurities such as argon, nitrogen, carbon, phosphorus, or boron are added to the region of the insulating film which overlaps with the source region and the drain region of the oxide semiconductor, thereby generating a defect. Hydrogen in the oxide semiconductor is attracted to the defect in the insulating film. The defect in the insulating film is stabilized by the presence of hydrogen.
    Type: Grant
    Filed: April 25, 2013
    Date of Patent: October 14, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masashi Tsubuku, Yusuke Nonaka, Noritaka Ishihara, Masashi Oota, Hideyuki Kishida
  • Patent number: 8853684
    Abstract: In a transistor having a top-gate structure in which a gate electrode layer overlaps with an oxide semiconductor layer which forms a channel region with a gate insulating layer interposed therebetween, when a large amount of hydrogen is contained in the insulating layer, hydrogen is diffused into the oxide semiconductor layer because the insulating layer is in contact with the oxide semiconductor layer; thus, electric characteristics of the transistor are degraded. An object is to provide a semiconductor device having favorable electric characteristics. An insulating layer in which the concentration of hydrogen is less than 6×1020 atoms/cm3 is used for the insulating layer being in contact with oxide semiconductor layer which forms the channel region. Using the insulating layer, diffusion of hydrogen can be prevented and a semiconductor device having favorable electric characteristics can be provided.
    Type: Grant
    Filed: May 17, 2011
    Date of Patent: October 7, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuta Endo, Toshinari Sasaki, Kosei Noda, Mizuho Sato, Mitsuhiro Ichijo, Toshiya Endo
  • Patent number: 8853683
    Abstract: The field of an oxide semiconductor has been attracted attention in recent years. Therefore, the correlation between electric characteristics of a transistor including an oxide semiconductor layer and physical properties of the oxide semiconductor layer has not been clear yet. Thus, a first object is to improve electric characteristics of the transistor by control of physical properties of the oxide semiconductor layer. A semiconductor device including at least a gate electrode, an oxide semiconductor layer, and a gate insulating layer sandwiched between the gate electrode and the oxide semiconductor layer, where the oxide semiconductor layer has the relative permittivity of equal to or higher than 13 (or equal to or higher than 14), is provided.
    Type: Grant
    Filed: December 13, 2010
    Date of Patent: October 7, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Akiharu Miyanaga, Tatsuya Honda
  • Patent number: 8853690
    Abstract: An object is to provide a transistor including an oxide layer which includes Zn and does not include a rare metal such as In or Ga. Another object is to reduce an off current and stabilize electric characteristics in the transistor including an oxide layer which includes Zn. A transistor including an oxide layer including Zn is formed by stacking an oxide semiconductor layer including insulating oxide over an oxide layer so that the oxide layer is in contact with a source electrode layer or a drain electrode layer with the oxide semiconductor layer including insulating oxide interposed therebetween, whereby variation in the threshold voltage of the transistor can be reduced and electric characteristics can be stabilized.
    Type: Grant
    Filed: January 17, 2013
    Date of Patent: October 7, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hiromichi Godo, Hideyuki Kishida
  • Patent number: 8846459
    Abstract: A highly reliable semiconductor device and a method for manufacturing the semiconductor device are provided. The semiconductor device is manufactured with a high yield to achieve high productivity. In the manufacture of a semiconductor device including a transistor in which a gate electrode layer, a gate insulating film, and an oxide semiconductor film are sequentially stacked and a source electrode layer and a drain electrode layer are provided in contact with the oxide semiconductor film, the source electrode layer and the drain electrode layer are formed through an etching step and then a step for removing impurities which are generated by the etching step and exist on a surface of the oxide semiconductor film and in the vicinity thereof is performed.
    Type: Grant
    Filed: October 16, 2012
    Date of Patent: September 30, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Katsuaki Tochibayashi, Satoshi Higano, Shunpei Yamazaki
  • Patent number: 8841662
    Abstract: An object is, in a thin film transistor including an oxide semiconductor layer, to reduce contact resistance between the oxide semiconductor layer and source and drain electrode layers electrically connected to the oxide semiconductor layer. The source and drain electrode layers have a stacked-layer structure of two or more layers in which a layer in contact with the oxide semiconductor layer is formed using a metal whose work function is lower than the work function of the oxide semiconductor layer or an alloy containing such a metal. Layers other than the layer in contact with the oxide semiconductor layer of the source and drain electrode layers are formed using an element selected from Al, Cr, Cu, Ta, Ti, Mo, or W, an alloy containing any of these elements as a component, an alloy containing any of these elements in combination, or the like.
    Type: Grant
    Filed: November 2, 2010
    Date of Patent: September 23, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Suzunosuke Hiraishi, Kengo Akimoto, Junichiro Sakata
  • Patent number: 8841163
    Abstract: A semiconductor device for high power application in which a novel semiconductor material having high mass productivity is provided. An oxide semiconductor film is formed, and then, first heat treatment is performed on the exposed oxide semiconductor film in order to reduce impurities such as moisture or hydrogen in the oxide semiconductor film. Next, in order to further reduce impurities such as moisture or hydrogen in the oxide semiconductor film, oxygen is added to the oxide semiconductor film by an ion implantation method, an ion doping method, or the like, and after that, second heat treatment is performed on the exposed oxide semiconductor film.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: September 23, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichiro Sakata, Hiroki Ohara
  • Patent number: 8841665
    Abstract: Disclosed is a method for manufacturing an oxide thin film transistor, including: forming a gate electrode on a substrate on which a buffer layer is formed; forming a gate insulation layer on an entire surface of the substrate on which the gate electrode is formed; forming an oxide semiconductor layer on the gate insulation layer; forming a first etch stop layer on the oxide semiconductor layer; forming a second etch stop layer on the first etch stop layer by an atomic layer deposition method; patterning the first etch stop layer and the second etch stop layer, or forming a contact hole, through which a part of the oxide semiconductor layer is exposed, in the first etch stop layer and the second etch stop layer; forming a source electrode and a drain electrode on the first etch stop layer and the second etch stop layer; and forming a passivation layer on the entire surface of the substrate on which the source electrode and the drain electrode are formed.
    Type: Grant
    Filed: March 22, 2013
    Date of Patent: September 23, 2014
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sang Hee Park, Min Ki Ryu, Him Chan Oh, Chi Sun Hwang
  • Patent number: 8835921
    Abstract: Provided is an oxide semiconductor film which has more stable electric characteristics and essentially consists of indium zinc oxide. In addition, provided is a highly reliable semiconductor device which has stable electric characteristics by using the oxide semiconductor film. The oxide semiconductor film essentially consisting of indium zinc oxide has a hexagonal crystal structure in which the a-b plane is substantially parallel to a surface of the oxide semiconductor film and a rhombohedral crystal structure in which the a-b plane is substantially parallel to the surface of the oxide semiconductor film.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: September 16, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tatsuya Honda, Hiroshi Kanemura, Kengo Akimoto, Suzunosuke Hiraishi
  • Patent number: 8835917
    Abstract: An object is to provide a semiconductor device having electrical characteristics such as high withstand voltage, low reverse saturation current, and high on-state current. In particular, an object is to provide a power diode and a rectifier which include non-linear elements. An embodiment of the present invention is a semiconductor device including a first electrode, a gate insulating layer covering the first electrode, an oxide semiconductor layer in contact with the gate insulating layer and overlapping with the first electrode, a pair of second electrodes covering end portions of the oxide semiconductor layer, an insulating layer covering the pair of second electrodes and the oxide semiconductor layer, and a third electrode in contact with the insulating layer and between the pair of second electrodes. The pair of second electrodes are in contact with end surfaces of the oxide semiconductor layer.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: September 16, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hiromichi Godo, Satoshi Kobayashi
  • Patent number: 8822988
    Abstract: In at least some embodiments, a thin-film transistor (TFT) includes a gate electrode and a gate dielectric covering the gate dielectric. The TFT also includes a source electrode and a drain electrode adjacent the gate dielectric. The TFT also includes a bi-layer channel between the source electrode and the drain electrode, the bi-layer channel having a zinc indium oxide (ZIO) layer positioned adjacent the gate dielectric and a zinc tin oxide (ZTO) layer that covers the ZIO layer.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: September 2, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Vincent C. Korthuis, Randy Hoffman
  • Patent number: 8815640
    Abstract: A highly reliable semiconductor device and a method for manufacturing the semiconductor device are provided. In a semiconductor device including a bottom-gate transistor in which an insulating layer functioning as a channel protective film is provided over an oxide semiconductor film, elements contained in an etching gas can be prevented from remaining as impurities on a surface of the oxide semiconductor film by performing impurity-removing process after formation of an insulating layer provided over and in contact with the oxide semiconductor film and/or formation of source and drain electrode layers. The impurity concentration in the surface of the oxide semiconductor film is lower than or equal to 5×1018 atoms/cm3, preferably lower than or equal to 1×1018 atoms/cm3.
    Type: Grant
    Filed: October 16, 2012
    Date of Patent: August 26, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Katsuaki Tochibayashi, Satoshi Higano, Shunpei Yamazaki
  • Patent number: 8809850
    Abstract: One object is to provide a new semiconductor device whose standby power is sufficiently reduced. The semiconductor device includes a first power supply terminal, a second power supply terminal, a switching transistor using an oxide semiconductor material and an integrated circuit. The first power supply terminal is electrically connected to one of a source terminal and a drain terminal of the switching transistor. The other of the source terminal and the drain terminal of the switching transistor is electrically connected to one terminal of the integrated circuit. The other terminal of the integrated circuit is electrically connected to the second power supply terminal.
    Type: Grant
    Filed: December 8, 2010
    Date of Patent: August 19, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 8803142
    Abstract: An object is to provide a memory device including a memory element that can be operated without problems by a thin film transistor with a low off-state current. Provided is a memory device in which a memory element including at least one thin film transistor that includes an oxide semiconductor layer is arranged as a matrix. The thin film transistor including an oxide semiconductor layer has a high field effect mobility and low off-state current, and thus can be operated favorably without problems. In addition, the power consumption can be reduced. Such a memory device is particularly effective in the case where the thin film transistor including an oxide semiconductor layer is provided in a pixel of a display device because the memory device and the pixel can be formed over one substrate.
    Type: Grant
    Filed: October 19, 2010
    Date of Patent: August 12, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masashi Tsubuku, Kosei Noda, Kouhei Toyotaka, Kazunori Watanabe, Hikaru Harada
  • Patent number: 8796683
    Abstract: Provided is a transistor which includes an oxide semiconductor film and has stable electrical characteristics. In the transistor, over an oxide film which can release oxygen by being heated, a first oxide semiconductor film which can suppress oxygen release at least from the oxide film is formed. Over the first oxide semiconductor film, a second oxide semiconductor film is formed. With such a structure in which the oxide semiconductor films are stacked, the oxygen release from the oxide film can be suppressed at the time of the formation of the second oxide semiconductor film, and oxygen can be released from the oxide film in later-performed heat treatment. Thus, oxygen can pass through the first oxide semiconductor film to be favorably supplied to the second oxide semiconductor film. Oxygen supplied to the second oxide semiconductor film can suppress the generation of oxygen deficiency, resulting in stable electrical characteristics.
    Type: Grant
    Filed: December 17, 2012
    Date of Patent: August 5, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 8791459
    Abstract: An array substrate for a display device includes an insulation substrate, a gate line formed on the insulation substrate, a data line crossing the gate line to define a pixel area, a thin film transistor including a gate electrode connected to the gate line, a source electrode connected to the data line, and a drain electrode, a passivation layer covering the gate line, the data line and the thin film transistor and including a drain contact hole to expose the drain electrode, and a pixel electrode formed on the pixel area and being connected to the drain contact hole through the drain contact hole. Each of the data line, the source electrode and the drain electrode includes a lower layer having copper and an upper layer covering upper and side surfaces of the lower layer, and the upper layer is thinner than the lower layer.
    Type: Grant
    Filed: December 17, 2012
    Date of Patent: July 29, 2014
    Assignee: LG Display Co., Ltd.
    Inventors: Tae-Hyoung Moon, Kyu-Hwang Lee, Kyung-Ha Lee
  • Patent number: 8785242
    Abstract: An embodiment is to include a staggered (top gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.
    Type: Grant
    Filed: September 13, 2011
    Date of Patent: July 22, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hidekazu Miyairi, Akiharu Miyanaga, Kengo Akimoto, Kojiro Shiraishi
  • Patent number: 8785925
    Abstract: There is such an issue with a TFT using an oxide semiconductor film that oxygen deficit is generated in a surface region of the oxide semiconductor film after performing plasma etching of a source-drain electrode, and the off-current becomes increased. Disclosed is the TFT which includes: a gate electrode on an insulating substrate as a substrate; a gate insulating film on the gate electrode; an oxide semiconductor film on the gate insulating film; and a source/drain electrode on the oxide semiconductor film. It is the characteristic of the TFT that a surface layer containing at least either fluorine or chlorine exists in a part of the oxide semiconductor film where the source/drain electrode is not superimposed.
    Type: Grant
    Filed: August 10, 2012
    Date of Patent: July 22, 2014
    Assignee: NLT Technologies, Ltd.
    Inventor: Kazushige Takechi
  • Patent number: 8779419
    Abstract: An object of the present invention is to provide a novel semiconductor device which is excellent in stability, uniformity, reproducibility, heat resistance, durability and the like, and can exert excellent transistor properties. The semiconductor device is a thin-film transistor, and this thin-film transistor uses, as an active layer, a polycrystalline oxide semiconductor thin film containing In and two or more metals other than In and having an electron carrier concentration of less than 1×1018/cm3.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: July 15, 2014
    Assignee: Idemitsu Kosan Co., Ltd.
    Inventors: Koki Yano, Inoue Kazuyoshi
  • Patent number: 8779478
    Abstract: A TFT 20 includes a gate electrode 21, a gate insulating film 22, a semiconductor layer 23, a source electrode 24, a drain electrode 25, etc. The semiconductor layer 23 is comprised of a metal oxide semiconductor (IGZO), and has a source portion 23a that contacts the source electrode 24, a drain electrode 23b that contacts the drain electrode 25, and a channel portion 23c that is located between the source and drain portions 23a, 23b. A reduced region 30 is formed at least in the channel portion 23c of the semiconductor layer 23, and the reduced region 30 has a higher content of a simple substance of a metal such as In than the remaining portion of the semiconductor layer 23.
    Type: Grant
    Filed: May 23, 2011
    Date of Patent: July 15, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masao Moriguchi, Michiko Takei, Yohsuke Kanzaki, Tsuyoshi Inoue, Tetsuo Fukaya, Yudai Takanishi, Takatsugu Kusumi, Yoshiki Nakatani, Tetsuya Okamoto, Kenji Nakanishi
  • Patent number: 8748881
    Abstract: An embodiment is a semiconductor device which includes a first oxide semiconductor layer over a substrate having an insulating surface and including a crystalline region formed by growth from a surface of the first oxide semiconductor layer toward an inside; a second oxide semiconductor layer over the first oxide semiconductor layer; a source electrode layer and a drain electrode layer which are in contact with the second oxide semiconductor layer; a gate insulating layer covering the second oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and a gate electrode layer over the gate insulating layer and in a region overlapping with the second oxide semiconductor layer. The second oxide semiconductor layer is a layer including a crystal formed by growth from the crystalline region.
    Type: Grant
    Filed: November 22, 2010
    Date of Patent: June 10, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 8748887
    Abstract: An object is to increase field effect mobility of a thin film transistor including an oxide semiconductor. Another object is to stabilize electrical characteristics of the thin film transistor. In a thin film transistor including an oxide semiconductor layer, a semiconductor layer or a conductive layer having higher electrical conductivity than the oxide semiconductor is formed over the oxide semiconductor layer, whereby field effect mobility of the thin film transistor can be increased. Further, by forming a semiconductor layer or a conductive layer having higher electrical conductivity than the oxide semiconductor between the oxide semiconductor layer and a protective insulating layer of the thin film transistor, change in composition or deterioration in film quality of the oxide semiconductor layer is prevented, so that electrical characteristics of the thin film transistor can be stabilized.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: June 10, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideaki Kuwabara, Kengo Akimoto, Toshinari Sasaki
  • Patent number: 8748878
    Abstract: The present application provides a thin film transistor and a method of manufacturing same capable of suppressing diffusion of aluminum to oxide semiconductor and selectively etching oxide semiconductor and aluminum oxide. The thin film transistor includes: a gate electrode; a channel layer whose main component is oxide semiconductor; a gate insulating film provided between the gate electrode and the channel layer; a sealing layer provided on the side opposite to the gate electrode, of the channel layer; and a pair of electrodes which are in contact with the channel layer and serve as a source and a drain. The sealing layer includes at least a first insulating film made of a first insulating material, and a second insulating film made of a second insulting material having etching selectivity to each of the oxide semiconductor and the first insulating material and provided between the first insulating film and the channel layer.
    Type: Grant
    Filed: February 22, 2010
    Date of Patent: June 10, 2014
    Assignee: Sony Corporation
    Inventors: Norihiko Yamaguchi, Satoshi Taniguchi, Hiroko Miyashita, Yasuhiro Terai
  • Patent number: 8735888
    Abstract: An embodiment of the invention relates to a TFT-LCD array substrate comprising a substrate, a gate line and a data line formed on the substrate, a pixel electrode and a thin film transistor formed in a pixel region defined by the gate line and the data line, wherein the thin film transistor comprises a gate electrode, a source electrode, and a transparent drain electrode, and the transparent drain electrode is electrically connected with the pixel electrode.
    Type: Grant
    Filed: September 16, 2010
    Date of Patent: May 27, 2014
    Assignee: Beijing Boe Optoelectronics Technology Co., Ltd.
    Inventors: Wei Li, Jeong Hun Rhee
  • Patent number: 8735996
    Abstract: A semiconductor structure is provided. The structure includes a semiconductor substrate of a semiconductor material and a gate dielectric having a high dielectric constant dielectric layer with a dielectric constant greater than silicon. The gate dielectric is located on the semiconductor substrate. A gate electrode abuts the gate dielectric. The gate electrodes includes a lower metal layer abutting the gate dielectric, a scavenging metal layer abutting the lower metal layer, an upper metal layer abutting the scavenging metal layer, and a silicon layer abutting the upper metal layer. The scavenging metal layer reduces an oxidized layer at an interface between the upper metal layer and the silicon layer responsive to annealing.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: May 27, 2014
    Assignees: International Business Machines Corporation, Globalfoundries Inc.
    Inventors: Takashi Ando, Unoh Kwon, Vijay Narayanan, James K. Schaeffer
  • Patent number: 8735883
    Abstract: A method for fabricating an oxide thin film transistor includes sequentially forming a gate insulating film, an oxide semiconductor layer, and a first insulating layer; selectively patterning the oxide semiconductor layer and the first insulating layer to form an active layer and an insulating layer pattern on the gate electrode; forming a second insulating layer on the substrate having the active layer and the insulating layer pattern formed thereon; and selectively patterning the insulating layer pattern and the second insulating layer to form first and second etch stoppers on the active layer. The oxide semiconductor layer may be a ternary system or quaternary system oxide semiconductor comprising a combination of AxByCzO (A, B, C=Zn, Cd, Ga, In, Sn, Hf, Zr; x, y, z?0).
    Type: Grant
    Filed: December 13, 2011
    Date of Patent: May 27, 2014
    Assignee: LG Display Co., Ltd.
    Inventors: Dae-Hwan Kim, Byung-Kook Choi, Sul Lee, Hoon Yim
  • Patent number: 8729544
    Abstract: It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.
    Type: Grant
    Filed: January 25, 2011
    Date of Patent: May 20, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hidekazu Miyairi, Kengo Akimoto, Kojiro Shiraishi
  • Patent number: 8729550
    Abstract: An object is to reduce the manufacturing cost of a semiconductor device. An object is to improve the aperture ratio of a semiconductor device. An object is to make a display portion of a semiconductor device display a higher-definition image. An object is to provide a semiconductor device which can be operated at high speed. The semiconductor device includes a driver circuit portion and a display portion over one substrate. The driver circuit portion includes: a driver circuit TFT in which source and drain electrodes are formed using a metal and a channel layer is formed using an oxide semiconductor; and a driver circuit wiring formed using a metal. The display portion includes: a pixel TFT in which source and drain electrodes are formed using an oxide conductor and a semiconductor layer is formed using an oxide semiconductor; and a display wiring formed using an oxide conductor.
    Type: Grant
    Filed: July 14, 2010
    Date of Patent: May 20, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichiro Sakata, Hiroyuki Miyake, Hideaki Kuwabara
  • Patent number: 8723172
    Abstract: A display device including a thin film transistor array substrate, transparent electrode substrate and a display medium layer disposed therebetween is provided. The thin film transistor array substrate includes a plurality of thin film transistors with an oxide semiconductor layer respectively. In each thin film transistor, a gate electrode and a gate insulating layer are disposed on a substrate sequentially and the gate electrode is covered by the gate insulating layer. The oxide semiconductor layer is conformably covering on the gate insulating layer and has a channel region located above the gate electrode. A source electrode and a drain electrode of each thin film transistor are disposed on the oxide semiconductor layer and at one side of the channel region respectively. Since the oxide semiconductor layer is made of transparent material, the patterning process of the oxide semiconductor layer can be omitted during the manufacturing process of the reflective display device.
    Type: Grant
    Filed: February 3, 2010
    Date of Patent: May 13, 2014
    Assignee: E Ink Holdings Inc.
    Inventors: Fang-An Shu, Lee-Tyng Chen, Henry Wang, Wei-Chou Lan, Tung-Liang Lin
  • Patent number: 8716088
    Abstract: A semiconductor structure is provided. The structure includes a semiconductor substrate of a semiconductor material and a gate dielectric having a high dielectric constant dielectric layer with a dielectric constant greater than silicon. The gate dielectric is located on the semiconductor substrate. A gate electrode abuts the gate dielectric. The gate electrodes includes a lower metal layer abutting the gate dielectric, a scavenging metal layer abutting the lower metal layer, an upper metal layer abutting the scavenging metal layer, and a silicon layer abutting the upper metal layer. The scavenging metal layer reduces an oxidized layer at an interface between the upper metal layer and the silicon layer responsive to annealing.
    Type: Grant
    Filed: June 27, 2012
    Date of Patent: May 6, 2014
    Assignees: International Business Machines Corporation, GLOBAL FOUNDRIES Inc.
    Inventors: Takashi Ando, Unoh Kwon, Vijay Narayanan, James K. Schaeffer
  • Patent number: 8716073
    Abstract: To provide an oxide semiconductor film including a low-resistance region, which can be applied to a transistor. To provide a transistor including the oxide semiconductor film, which can perform at high speed. To provide a high-performance semiconductor device including the transistor including the oxide semiconductor film, which can perform at high speed, with high yield. A film having a reducing property is formed over the oxide semiconductor film. Next, part of oxygen atoms are transferred from the oxide semiconductor film to the film having a reducing property. Next, an impurity is added to the oxide semiconductor film through the film having a reducing property and then, the film having a reducing property is removed, so that a low-resistance region is formed in the oxide semiconductor film.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: May 6, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Shinji Ohno, Yuichi Sato, Junichi Koezuka, Sachiaki Tezuka
  • Patent number: 8716708
    Abstract: Provided is a bottom-gate transistor including an oxide semiconductor, in which electric-field concentration which might occur in the vicinity of an end portion of a drain electrode layer (and the vicinity of an end portion of a source electrode layer) when a high gate voltage is applied to a gate electrode layer is reduced and degradation of switching characteristics is suppressed, so that the reliability is improved. The cross-sectional shape of an insulating layer which overlaps over a channel formation region is a tapered shape. The thickness of the insulating layer which overlaps over the channel formation region is 0.3 ?m or less, preferably 5 nm or more and 0.1 ?m or less. The taper angle ? of a lower end portion of the cross-sectional shape of the insulating layer which overlaps over the channel formation region is 60° or smaller, preferably 45° or smaller, further preferably 30° or smaller.
    Type: Grant
    Filed: September 25, 2012
    Date of Patent: May 6, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masahiko Hayakawa, Satoshi Shinohara
  • Patent number: 8710498
    Abstract: According to one embodiment, a method of manufacturing a thin-film transistor circuit substrate including forming an oxide semiconductor thin film above an insulative substrate, forming a gate insulation film and a gate electrode which are stacked on a first region of the oxide semiconductor thin film, and exposing from the gate insulation film a second region and a third region of the oxide semiconductor thin film, the second region and the third region being located on both sides of the first region of the oxide semiconductor thin film, forming an interlayer insulation film of silicon nitride including dangling bonds of silicon, the interlayer insulation film covering the second region and the third region of the oxide semiconductor thin film, the gate insulation film and the gate electrode, and forming a source electrode and a drain electrode.
    Type: Grant
    Filed: December 19, 2011
    Date of Patent: April 29, 2014
    Assignee: Japan Display Inc.
    Inventors: Tetsuya Shibata, Hajime Watakabe, Atsushi Sasaki, Yuki Matsuura, Muneharu Akiyoshi, Hiroyuki Watanabe
  • Patent number: 8704221
    Abstract: A semiconductor device with high productivity and high yield is provided. The semiconductor device includes a word line, a capacitor line, a first bit line, a second bit line, and a first transistor and a second transistor each of which includes a gate, a source, and a drain. The first transistor and the second transistor at least partly overlap with each other, and the gates of the first transistor and the second transistor are connected to the word line. A capacitor is formed between at least part of the capacitor line and each of the drains of the first transistor and the second transistor. The first bit line is connected to the source of the first transistor, and the second bit line is connected to the source of the second transistor.
    Type: Grant
    Filed: December 17, 2012
    Date of Patent: April 22, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Seiichi Yoneda, Takuro Ohmaru
  • Patent number: 8704222
    Abstract: It is an object to provide a low-cost oxide semiconductor material which is excellent in controllability of the carrier concentration and stability, and to provide a field effect transistor including the oxide semiconductor material. An oxide including indium, silicon, and zinc is used as the oxide semiconductor material. Here, the content of silicon in the oxide semiconductor film is greater than or equal to 4 mol % and less than or equal to 8 mol %. The field effect transistor including such an In—Si—Zn—O film can withstand heat treatment at a high temperature and is effective against ?BT stress.
    Type: Grant
    Filed: July 8, 2013
    Date of Patent: April 22, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kengo Akimoto, Shunpei Yamazaki