Abstract: In one embodiment, a two terminal multi-channel ESD device is configured to include a zener diode and a plurality of P-N diodes. In another embodiment, the ESD devices has an asymmetrical characteristic.

Abstract: In a semiconductor device including a protection diode for preventing electrostatic breakdown employing a low capacitance protection diode, an occupation area of a Zener diode as a voltage limiting element is not needed on a front surface of a semiconductor substrate. A P+ type embedded diffusion layer is formed in a P+ type semiconductor substrate. This is then covered by a non-doped first epitaxial layer. A high resistivity N type second epitaxial layer is then formed on the first epitaxial layer. The second epitaxial layer is divided by a P+ isolation layer into a first protection diode forming region and a second protection diode forming region. An N+ type embedded layer extending from the front surface of the first epitaxial layer of the first protection diode forming region to the first epitaxial layer and the second epitaxial layer, and so on are then formed. A Zener diode is formed by a P+ type upward diffusion layer extending from the P+ type embedded diffusion layer and the N+ type embedded layer.

Abstract: A semiconductor device includes: a first semiconductor layer including AlXGa1-XN (0?X?1); a second semiconductor layer provided on the first semiconductor layer, including AlYGa1-YN (0?Y?1, X<Y), and having a larger bandgap than the first semiconductor layer; a source electrode provided on the second semiconductor layer; a drain electrode provided on the second semiconductor layer; and a gate electrode provided on the second semiconductor layer between the source electrode and the drain electrode. A region of the second semiconductor layer below the gate electrode at a depth short of the first semiconductor layer is doped with atoms to be negatively charged in the second semiconductor layer.

Abstract: A semiconductor element includes a semiconductor layer having a first doping density, a metallization, and a contact area located between the semiconductor layer and the metallization. The contact area includes at least one first semiconductor area that has a second doping density higher than the first doping density, and at least one second semiconductor area in the semiconductor layer. The second semiconductor area is in contact with the metallization and provides lower ohmic resistance to the metallization than a direct contact between the semiconductor layer and the metallization provides or would provide.

Abstract: There is provided a wiring board. The wiring board includes: a semiconductor substrate having a through hole and covered with an insulating film; a through electrode formed in the through hole; a first wiring connected to one end of the through electrode; and a second wiring connected to the other end of the through electrode. The semiconductor substrate includes: a semiconductor element and a first guard ring formed to surround the through hole. The semiconductor element includes a first conductivity-type impurity diffusion layer having a different conductivity-type from that of the semiconductor substrate and is electrically connected to the first wiring and the second wiring.

Abstract: In one embodiment, a bi-directional diode structure is formed to have a substantially symmetrical current-voltage characteristic.

Abstract: A semiconductor power device with Zener diode for providing an electrostatic discharge (ESD) protection and a thick insulation layer to insulate the Zener diode from a doped body region. The semiconductor power device further includes a Nitride layer underneath the thick oxide layer working as a stopper layer for protecting the thin oxide layer and the body region underneath whereby the over-etch damage and punch-through issues in process steps are eliminated.

Abstract: A Zener diode is fabricated on a semiconductor substrate having semiconductor material thereon. The Zener diode includes a first well region having a first conductivity type, formed in the semiconductor material. The Zener diode also includes a first region having a second conductivity type, formed in the first well region (the second conductivity type is opposite the first conductivity type). The Zener diode also includes a second region having the first conductivity type, wherein the second region is formed in the first well region and overlying the first region. An electrode is formed in the first region, and the electrode is electrically coupled to the second region.

Abstract: A rectenna capable of power conversion from electromagnetic (EM) waves of high frequencies is provided. In one embodiment, a rectenna element generates currents from two sources—based upon the power of the incident EM wave and from an n-type semiconductor, or another electron source attached to a maximum voltage point of an antenna element. The combined current from both sources increases the power output of the antenna, thereby increasing the detection sensitivity of the antenna of a low power signal. Full wave rectification is achieved using a novel diode connected to a gap in the antenna element of a rectenna element. The diode is conductive at forward bias voltage or reverse bias voltage, and rectifies the antenna signal generated by the desired EM wave received by antenna raise from The rectenna element of the present invention may be used as a building block to create large rectenna arrays.

Abstract: A method for manufacturing a transient voltage suppressing (TVS) array substantially following a manufacturing process for manufacturing a vertical semiconductor power device. The method includes a step of opening a plurality of isolation trenches in an epitaxial layer of a first conductivity type in a semiconductor substrate followed by applying a body mask for doping a body region having a second conductivity type between two of the isolation trenches. The method further includes a step of applying an source mask for implanting a plurality of doped regions of the first conductivity type constituting a plurality of diodes wherein the isolation trenches isolating and preventing parasitic PNP or NPN transistor due to a latch-up between the doped regions of different conductivity types.

Abstract: The present invention relates to a semiconductor device, comprising a semiconductor substrate (102) with a thickness of less than 100 micrometer and with a first substrate side and an opposite second substrate side. A plurality of at least four monolithically integrated Zener or avalanche diodes (164,166,168,170) with a reverse breakdown voltage of less than 20 V are defined in the semiconductor substrate and connected with each other in a series connection. The diodes are defined in a plurality of mutually isolated substrate islands (120,122,124,126) in the semiconductor substrate, at least one diode per substrate island. The substrate islands are laterally surrounded by through-substrate isolations extending from the first to the second substrate side and comprising a filling (128) that electrically isolates a respective substrate island from a respective laterally surrounding area of the semiconductor substrate.

Abstract: A vertical bidirectional protection diode including, on a heavily-doped substrate of a first conductivity type, first, second, and third regions of the first, second, and first conductivity types, these regions all having a doping level greater than from 2 to 5×1019 atoms/cm3 and being laterally delimited by an insulated trench, each of these regions having a thickness smaller than 4 ?m.

Abstract: To provide a technique that can decrease the leak current due to the photoelectric effect in a semiconductor device with a Zener diode. In a bidirectional Zener diode IZD having a trench structure in the invention, an upper electrode UE extends from an inside of an opening OP to cover a trench TR (isolation region). As shown in FIG. 8, in the bidirectional Zener diode IZD of the invention, the upper electrode UE is formed to cover the inner walls of the trenches TRs. Thus, even when light is applied to the bidirectional Zener diode IZD, the light can be prevented from entering the p-n junction formed at the boundary between the n-type semiconductor region NR and the p-type semiconductor region PR from the inner wall of the trench TR.

Abstract: A method is for manufacturing semiconductor chips from a wafer which includes a plurality of semiconductor chips. Defects in the crystal structure of the chips may be substantially reduced by producing rupture joints in the surface of the wafer after the wafer has been produced, and by breaking the wafer along the rupture joints to separate the semiconductor chips.

Abstract: A semiconductor substrate and a method of its manufacture has a semiconductor substrate having a carbon concentration in a range of 6.0×1015 to 2.0×1017 atoms/cm3, both inclusively. One principal surface of the substrate is irradiated with protons and then heat-treated to thereby form a broad buffer structure, namely a region in a first semiconductor layer where a net impurity doping concentration is locally maximized. Due to the broad buffer structure, lifetime values are substantially equalized in a region extending from an interface between the first semiconductor layer and a second semiconductor layer formed on the first semiconductor layer to the region where the net impurity doping concentration is locally maximized. In addition, the local minimum of lifetime values of the first semiconductor layer becomes high.

Abstract: A semiconductor apparatus includes, a first silicon layer of a first conductivity type; a second silicon layer provided on the first silicon layer and having a higher resistance than the first silicon layer, a third silicon layer of a second conductivity type provided on the second silicon layer, a first nitride semiconductor layer provided on the third silicon layer, a second nitride semiconductor layer provided on the first nitride semiconductor layer and having a larger bandgap than the first nitride semiconductor layer, a first main electrode being in contact with a surface of the second nitride semiconductor layer and connected to the third silicon layer, a second main electrode being in contact with the surface of the second nitride semiconductor layer and connected to the first silicon layer, and a control electrode provided between the first main electrode and the second main electrode on the second nitride semiconductor layer.

Abstract: A low voltage transient voltage suppressing (TVS) device supported on a semiconductor substrate supporting an epitaxial layer thereon. The TVS device further includes a bottom-source metal oxide semiconductor field effect transistor (BS-MOSFET) comprises a trench gate surrounded by a drain region encompassed in a body region disposed near a top surface of the semiconductor substrate wherein the drain region interfaces with the body region constituting a junction diode and the drain region encompassed in the body region on top of the epitaxial layer constituting a bipolar transistor with a top electrode disposed on the top surface of the semiconductor functioning as a drain/collector terminal and a bottom electrode disposed on a bottom surface of the semiconductor substrate functioning as a source/emitter electrode.

Abstract: A transmitted light absorption/recombination layer, a barrier layer, a wavelength selection/absorption layer, and an InP window layer having a p-type region are supported by an n-type substrate and arranged in that order. Light with a wavelength of 1.3 ?m reaches the wavelength selection/absorption layer through the InP window layer. Then, the light is absorbed by the wavelength selection/absorption layer and drawn from the device as an electric current signal. Light with a wavelength of 1.55 ?m reaches the transmitted light absorption/recombination layer through the barrier layer. Then, the light is absorbed by the transmitted light absorption/recombination layer, generating electrons and holes. These electrons and holes recombine with each other and, hence, disappear.

Abstract: A semiconductor system is described, which is made up of a highly n-doped silicon substrate and a first n-silicon epitaxial layer, which is directly contiguous to the highly n-doped silicon substrate, and having a p-doped SiGe layer, which is contiguous to a second n-doped silicon epitaxial layer and forms a heterojunction diode, which is situated above the first n-doped silicon epitaxial layer and in which the pn-junction is situated within the p-doped SiGe layer. The first n-silicon epitaxial layer has a higher doping concentration than the second n-silicon epitaxial layer. Situated between the two n-doped epitaxial layers is at least one p-doped emitter trough, which forms a buried emitter, a pn-junction both to the first n-doped silicon epitaxial layer and also to the second n-doped silicon epitaxial layer being formed, and the at least one emitter trough being completely enclosed by the two epitaxial layers.

Abstract: In one embodiment, a two terminal multi-channel ESD device is configured to include a zener diode and a plurality of P-N diodes.

Abstract: A method of manufacturing a semiconductor device, comprising the steps of preparing a structure including a semiconductor substrate, an element formed therein, a through hole formed to penetrate the semiconductor substrate, and an insulating layer formed on both surface sides of the semiconductor substrate and an inner surface of the through hole, and covering the element, forming a penetrating electrode in the through hole, forming a first barrier metal pattern layer covering the penetrating electrode, forming a contact hole reaching a connection portion of the element in the insulating layer, removing a natural oxide film on the connection portion of the element in the contact hole, and forming a wiring layer connected to the first barrier metal pattern layer and connected to the element through the contact hole.

Abstract: A semiconductor device comprising: a semiconductor substrate having a first conductive type layer; a first diffusion region which has the first conductive type and is formed in the first conductive type layer; a second diffusion region which has a second conductive type and an area larger than an area of the first diffusion region and overlaps the first diffusion region; and a PN junction formed at an interface between the first and the second diffusion regions.

Abstract: A transient-voltage suppressing (TVS) device disposed on a semiconductor substrate of a first conductivity type. The TVS includes a buried dopant region of a second conductivity type disposed and encompassed in an epitaxial layer of the first conductivity type wherein the buried dopant region extends laterally and has an extended bottom junction area interfacing with the underlying portion of the epitaxial layer thus constituting a Zener diode for the TVS device. The TVS device further includes a region above the buried dopant region further comprising a top dopant layer of a second conductivity type and a top contact region of a second conductivity type which act in combination with the epitaxial layer and the buried dopant region to form a plurality of interfacing PN junctions constituting a SCR acting as a steering diode to function with the Zener diode for suppressing a transient voltage.

Abstract: A semiconductor system having a trench MOS barrier Schottky diode, having an integrated substrate PN diode as a clamping element (TMBS-ub-PN), suitable in particular as a Zener diode having a breakdown voltage of approximately 20V for use in a vehicle generator system, the TMBS-sub-PN being made up of a combination of Schottky diode, MOS structure, and substrate PN diode, and the breakdown voltage of substrate PN diode BV_pn being lower than the breakdown voltage of Schottky diode BV_schottky and the breakdown voltage of MOS structure BV_mos.

Abstract: An integrated circuit device comprising a diode and a method of making an integrated circuit device comprising a diode are provided. The diode can comprise an island of a first conductivity type, a first region of a second conductivity type formed in the island, and a cathode diffusion contact region doped to the second conductivity type disposed in the first region. The diode can also comprise a cathode contact electrically contacting the cathode diffusion contact region, an anode disposed in the island, an anode contact electrically contacting the anode, and a first extension region doped to the first conductivity type disposed at a surface junction between the first region and the island.

Abstract: An electrostatic discharge (ESD) protection network for power MOSFETs includes parallel branches, containing polysilicon zener diodes and resistors, used for protecting the gate from rupture caused by high voltages caused by ESD. The branches may have the same or independent paths for voltage to travel across from the gate region into the semiconductor substrate. Specifically, the secondary branch has a higher breakdown voltage than the primary branch so that the voltage is shared across the two branches of the protection network. The ESD protection network of the device provides a more effective design without increasing the space used on the die. The ESD protection network can also be used with other active and passive devices such as thyristors, insulated-gate bipolar transistors, and bipolar junction transistors.

Abstract: A single-photon avalanche detector is disclosed that is operable at wavelengths greater than 1000 nm and at operating speeds greater than 10 MHz. The single-photon avalanche detector comprises a thin-film resistor and avalanche photodiode that are monolithically integrated such that little or no additional capacitance is associated with the addition of the resistor.

Abstract: An electron tube of the present invention includes: a vacuum vessel including a face plate portion made of synthetic silica and having a surface on which a photoelectric surface is provided, a stem portion arranged facing the photoelectric surface and made of synthetic silica, and a side tube portion having one end connected to the face plate portion and the other end connected to the stem portion and made of synthetic silica; a projection portion arranged in the vacuum vessel, extending from the stem portion toward the photoelectric surface, and made of synthetic silica; and an electron detector arranged on the projection portion, for detecting electrons from the photoelectric surface, and made of silicon.

Abstract: A silicon carbide Zener diode is a bipolar semiconductor device that has a mesa structure and includes a silicon carbide single crystal substrate of a first conductivity type, formed thereon, a silicon carbide conductive layer of a first conductivity type, and a silicon carbide conductive layer of a second conductivity type formed on the silicon carbide conductive layer of a first conductivity type, wherein a depletion layer that is formed under reverse bias at a junction between the silicon carbide conductive layer of a first conductivity type and the silicon carbide conductive layer of a second conductivity type does not reach a mesa corner formed in the silicon carbide conductive layer of a first conductivity type.

Abstract: In one embodiment, high doped semiconductor channels are formed in a semiconductor region of an opposite conductivity type to increase the capacitance of the device.

Abstract: Bipolar semiconductor devices have a Zener voltage controlled very precisely in a wide range of Zener voltages (for example, from 10 to 500 V). A bipolar semiconductor device has a mesa structure and includes a silicon carbide single crystal substrate of a first conductivity type, a silicon carbide conductive layer of a first conductivity type, a highly doped layer of a second conductivity type and a silicon carbide conductive layer of a second conductivity type which substrate and conductive layers are laminated in the order named.

Abstract: A semiconductor device includes an insulating film formed over a semiconductor substrate, a Zener diode formed above the insulating film, an interlayer film formed above the Zener diode, and a gate aluminum and a source aluminum formed above the interlayer film. The Zener diode is connected between the gate aluminum and the source aluminum. The Zener diode is formed by alternately joining an N type region and a P type region concentrically. The gate electrode includes a gate pad section. A planar shape of the Zener diode is substantially similar to a planer shape of the gate pad section. The gate pad section extends for a predetermined distance from an outermost edge of the P type region of the Zener diode to outside.

Abstract: A CMOS single photon avalanche diode (SPAD) design uses conventional, or at least known, CMOS processes to produce a device having a breakdown region in which the main p-n junction is formed of a deep n-well layer, and optionally on the other side, a p-add layer. The SPAD may also have a guard ring region which comprises the p-epi layer without any implant. The SPAD may have curved or circular perimeters. A CMOS chip comprises SPADs as described and other NMOS devices all sharing the same deep n-well.

Abstract: In one embodiment, an ESD device is configured to include a zener diode and a P-N diode and to have a conductor that provides a current path between the zener diode and the P-N diode.

Abstract: A silicon controlled rectifier structure is provided in a substrate having a first conductive type. A well region formed within the substrate has a second conductive type. A first dopant region formed within the substrate and the well region has the first conductive type. A second dopant region formed within the substrate and a portion of the well region has the second conductive type. A third dopant region formed under the second dopant region has the first conductive type, in which the second and the third regions form a vertical Zener diode. A fourth dopant region formed within the substrate and separated from the second dopant region by a separation structure has the second conductive type. A fifth dopant region is formed within the substrate in a manner that the fourth dopant region is between the isolation structure and the fifth dopant region, and has the first conductive type.

Abstract: A semiconductor diode has an anode, a cathode and a semiconductor volume provided between anode and cathode. A plurality of semiconductor zones are formed in the semiconductor volume, which semiconductor zones are inversely doped with respect to their immediate surroundings, spaced apart from one another and provided in the vicinity of the cathode. The semiconductor zones are spaced apart from the cathode.

Abstract: In one embodiment, a bi-directional diode structure is formed to have a substantially symmetrical current-voltage characteristic.

Abstract: A photodiode with an improved electrostatic damage threshold is disclosed. A Zener or an avalanche diode is connected in parallel to a photodiode. Both diodes are integrated into the same photodiode housing. The diodes can be mounted on a common header or onto each other. An avalanche photodiode and an avalanche diode can be fabricated on a common semiconductor substrate. A regular p-n diode connected in series, cathode-to-cathode or anode-to-anode, to a Zener diode, forms a protection circuit which, when connected in parallel to a photodiode, provides a smaller electrical capacity increase as compared to a simpler circuit consisting just of a Zener or an avalanche diode.

Abstract: Transient voltage suppressor and method for manufacturing the transient voltage suppressor having a dopant or carrier concentration in a portion of a gate region near a Zener region that is different from a dopant concentration in a portion of a gate region that is away from the Zener region.

Abstract: A semiconductor device in one embodiment includes a depletion junction, a peripheral region adjacent the depletion junction, and a buffer layer. The buffer layer is adapted to reduce localization of avalanche breakdown proximate the interface between the depletion junction and the peripheral region.

Abstract: A semiconductor sensing device for sensing presence, absence or level of species-of-interest in the environment is disclosed. The semiconductor sensing device comprises at least one layer of molecules deposited thereon. The molecules are electrically-responsive to the species-of-interest in a manner such that when the molecules interact with the species-of-interest, a reverse breakdown voltage characterizing the semiconductor sensing device is modified.

Abstract: In one embodiment, an ESD device is configured to include a zener diode and a P-N diode.

Abstract: The present invention describes ESD apparatus, methods of forming the same, and methods of providing ESD protection. In certain aspects, the invention achieves the desired turn-on voltage and maintains low leakage in the ESD apparatus, and the methods of providing ESD protection. In one aspect, a zener diode that has a positive trigger voltage is used to quickly turn-on a transistor. In another aspect, different zener diodes that have positive and negative trigger voltages, respectively, are used to quickly turn on a transistor. In still another aspect, a linearly graded P-region is used to implement the ESD device of the present invention.

Abstract: The invention relates to an avalanche diode that can be employed as an ESD protection device. An avalanche ignition region is formed at the p-n junction of the diode and includes an enhanced defect concentration level to provide rapid onset of avalanche current. The avalanche ignition region is preferably formed wider than the diode depletion zone, and is preferably created by placement, preferably by ion implantation, of an atomic specie different from that of the principal device structure. The doping concentration of the placed atomic specie should be sufficiently high to ensure substantially immediate onset of avalanche current when the diode breakdown voltage is exceeded. The new atomic specie preferably comprises argon or nitrogen, but other atomic species can be employed. However, other means of increasing a defect concentration level in the diode depletion zone, such as an altered annealing program, are also contemplated.

Abstract: In one embodiment, the ESD device uses highly doped P and N regions deep within the ESD device to form a zener diode that has a controlled breakdown voltage.

Abstract: The present invention provides an avalanche photodiode capable of raising productivity. An n-type InP buffer layer, an n-type GaInAs light absorption layer, an n-type GaInAsP transition layer, an n-type InP electric field adjusting layer, an n-type InP avalanche intensifying layer, an n-type AlInAs window layer and a p-type GaInAs contact layer are grown in order on an n-type InP substrate. Next, Be is ion-injected into an annular area along the outer periphery of a light receiving area which is activated by heat treatment so as to form an inclined joint, to obtain a p-type peripheral area for preventing an edge break down. Further, Zn is selectively diffused thermally into the light receiving area until it reaches the n-type InP avalanche intensifying layer so as to form a p-type conductive area.

Abstract: There is provided a wiring board. The wiring board includes: a semiconductor substrate having a through hole and covered with an insulating film; a through electrode formed in the through hole; a first wiring connected to one end of the through electrode; and a second wiring connected to the other end of the through electrode. The semiconductor substrate includes: a semiconductor element and a first guard ring formed to surround the through hole. The semiconductor element includes a first conductivity-type impurity diffusion layer having a different conductivity-type from that of the semiconductor substrate and is electrically connected to the first wiring and the second wiring.

Abstract: A bi-directional transient voltage suppression (“TVS”) device (101) includes a semiconductor die (201) that has a first avalanche diode (103) in series with a first rectifier diode (104) connected cathode to cathode, electrically coupled in an anti-parallel configuration with a second avalanche diode (105) in series with a second rectifier diode (106) also connected cathode to cathode. All the diodes of the TVS device are on a single semiconductor substrate (301). The die has a low resistivity buried diffused layer (303) having a first conductivity type disposed between a semiconductor substrate (301) having the opposite conductivity type and a high resistivity epitaxial layer (305) having the first conductivity type. The buried diffused layer shunts most of a transient current away from a portion of the epitaxial layer between the first avalanche diode and the first rectifier diode, thereby reducing the clamping voltage relative to the breakdown voltage.

Abstract: A MOSFET device that includes a first Zener diode connected between a gate metal and a drain metal of said semiconductor power device for functioning as a gate-drain (GD) clamp diode. The GD clamp diode includes multiple back-to-back doped regions in a polysilicon layer doped with dopant ions of a first conductivity type next to a second conductivity type disposed on an insulation layer above the MOSFET device, having an avalanche voltage lower than a source/drain avalanche voltage of the MOSFET device wherein the Zener diode is insulated from a doped region of the MOSFET device for preventing a channeling effect.

Abstract: In one embodiment, an ESD device is configured to include a zener diode and a P-N diode.