Abstract: So as to manufacture an intrinsic absorber layer of amorphous hydrogenated silicon within a p-i-n configuration a solar cell by PeCvD deposition upon a base structure, thereby improving throughput an simultaneously maintaining quality of the absorber layer, a specific processing regime is proposed, wherein in the reactor for depositing the addressed absorber layer a pressure of between 1 mbar and 1.8 mbar is established and a flow of silane and of hydrogen with a dilution of silane to hydrogen of 1:4 up to 1:10 and generating an RF plasma with a generator power of between 600 W and 1200 W per 1.4 m2 base structure surface to be coated.

Abstract: A method for making a solid-state imaging device includes forming a pinning layer, which is a P-type semiconductor layer or an N-type semiconductor layer, on a first substrate by deposition; forming a semiconductor layer on the pinning layer; forming a photoelectric conversion unit in the semiconductor layer, the photoelectric conversion unit being configured to convert incident light into an electrical signal; forming, on the semiconductor layer, a transistor of a pixel unit and a transistor of a peripheral circuit unit disposed in the periphery of the pixel unit, and then forming a wiring section on the semiconductor layer; bonding a second substrate on the wiring section; and removing the first substrate after the second substrate is bonded.

Abstract: A chemical bath deposition method is presented to prepare different thin films on plane substrates. In particular, they are useful to deposit CdS or ZnS buffer layers in manufacture of thin film solar cells. This method and the deposition apparatus deposit thin films onto vertically travelling plane workpieces delivered by a conveyor belt. The thin films are deposited by continuously spraying the reaction solutions from their freshly mixed styles to gradually aged forms until the designed thickness is obtained. The substrates and the solutions are heated to a reaction temperature. During the deposition processes, the front surfaces of the substrates are totally covered with the sprayed solutions but the substrate backsides are remained dry. The reaction ambience inside the reactor can be isolated from the outside atmosphere. The method is designed to generate a minimum amount of waste solutions for chemical treatments.

Abstract: An apparatus including first and second layers of electrically conductive material separated by a layer of electrically insulating material, wherein one or both layers of electrically conductive material include graphene, and wherein the apparatus is configured such that electrons are able to tunnel from the first layer of electrically conductive material through the layer of electrically insulating material to the second layer of electrically conductive material.

Abstract: A chemical bath deposition method and a system are presented to prepare different thin films on plane substrates. In particular, they are useful to deposit CdS or ZnS buffer layers in manufacture of thin film solar cells. This method and the deposition system deposit thin films onto vertically travelling plane workpieces delivered by a conveyor belt. The thin films are deposited with continuously spraying the reaction solutions from their freshly mixed styles to gradually aged forms until the designed thickness is obtained. The substrates and the solutions are heated to a reaction temperature. During the deposition processes, the front surfaces of the substrates are totally covered with the sprayed solutions but the substrate backsides are remained dry. The reaction ambience inside the reactor can be isolated from the outside atmosphere. The apparatus is designed to generate a minimum amount of waste solutions for chemical treatments.

Abstract: A thyristor includes a first conductivity type semiconductor layer, a first conductivity type carrier injection layer on the semiconductor layer, a second conductivity type drift layer on the carrier injection layer, a first conductivity type base layer on the drift layer, and a second conductivity type anode region on the base layer. The thickness and doping concentration of the carrier injection layer are selected to reduce minority carrier injection by the carrier injection layer in response to an increase in operating temperature of the thyristor. A cross-over current density at which the thyristor shifts from a negative temperature coefficient of forward voltage to a positive temperature coefficient of forward voltage is thereby reduced.

Abstract: So as to manufacture an intrinsic absorber layer of amorphous hydrogenated silicon within a p-i-n configuration a solar cell by PeCvD deposition upon a base structure, thereby improving throughput an simultaneously maintaining quality of the absorber layer, a specific processing regime is proposed, wherein in the reactor for depositing the addressed absorber layer a pressure of between 1 mbar and 1.8 mbar is established and a flow of silane and of hydrogen with a dilution of silane to hydrogen of 1:4 up to 1:10 and generating an RF plasma with a generator power of between 600W and 1200W per 1.4 m2 base structure surface to be coated.

Abstract: A method for making a solid-state imaging device includes forming a pinning layer, which is a P-type semiconductor layer or an N-type semiconductor layer, on a first substrate by deposition; forming a semiconductor layer on the pinning layer; forming a photoelectric conversion unit in the semiconductor layer, the photoelectric conversion unit being configured to convert incident light into an electrical signal; forming, on the semiconductor layer, a transistor of a pixel unit and a transistor of a peripheral circuit unit disposed in the periphery of the pixel unit, and then forming a wiring section on the semiconductor layer; bonding a second substrate on the wiring section; and removing the first substrate after the second substrate is bonded.

Abstract: A vertical stack of a first silicon germanium alloy layer, a second epitaxial silicon layer, a second silicon germanium layer, and a germanium layer are formed epitaxially on a top surface of a first epitaxial silicon layer. The second epitaxial silicon layer, the second silicon germanium layer, and the germanium layer are patterned and encapsulated by a dielectric cap portion, a dielectric spacer, and the first silicon germanium layer. The silicon germanium layer is removed between the first and second silicon layers to form a silicon germanium mesa structure that structurally support an overhanging structure comprising a stack of a silicon portion, a silicon germanium alloy portion, a germanium photodetector, and a dielectric cap portion. The germanium photodetector is suspended by the silicon germanium mesa structure and does not abut a silicon waveguide. Germanium diffusion into the silicon waveguide and defect density in the germanium detector are minimized.

Abstract: The MEMS package has a mounting substrate on which one or more transducer chips are mounted wherein the mounting substrate has an opening. A top cover is attached to and separated from the mounting substrate by a spacer forming a housing enclosed by the top cover, the spacer, and the mounting substrate and accessed by the opening. Electrical connections are made between the one or more transducer chips and the mounting substrate and/or between the one or more transducer chips and the top cover. A bottom cover can be mounted on a bottom surface of the mounting substrate wherein a hollow chamber is formed between the mounting substrate and the bottom cover, wherein a second opening in the bottom cover is not aligned with the first opening. Pads on outside surfaces of the top and bottom covers can be used for further attachment to printed circuit boards. The top and bottom covers can be a flexible printed circuit board folded under the mounting substrate.

Abstract: A photo-semiconductor device comprises a photoconductive semiconductor film provided with electrodes and formed on a second substrate, the semiconductor film being formed by epitaxial growth on a first semiconductor substrate different from the second substrate, the second substrate being also provided with electrodes, the electrodes of the second substrate and the electrodes of the photoconductive semiconductor film being held in contact with each other.

Abstract: A tunneling field effect transistor (TFET) device includes a semiconductor substrate having a layer of relatively intermediate bandgap semiconductor material, a layer of relatively low bandgap semiconductor material overlying the layer of relatively intermediate bandgap semiconductor material, and a layer of relatively high bandgap semiconductor material overlying the layer of relatively low bandgap semiconductor material. The TFET device includes a source region, a drain region, and a channel region defined in the semiconductor substrate. The TFET device also has a gate structure overlying at least a portion of the channel region. The source region is highly doped with an impurity dopant having a first conductivity type, and the drain region is highly doped with an impurity dopant having a second conductivity type.

Abstract: A vertical stack of a first silicon germanium alloy layer, a second epitaxial silicon layer, a second silicon germanium layer, and a germanium layer are formed epitaxially on a top surface of a first epitaxial silicon layer. The second epitaxial silicon layer, the second silicon germanium layer, and the germanium layer are patterned and encapsulated by a dielectric cap portion, a dielectric spacer, and the first silicon germanium layer. The silicon germanium layer is removed between the first and second silicon layers to form a silicon germanium mesa structure that structurally support an overhanging structure comprising a stack of a silicon portion, a silicon germanium alloy portion, a germanium photodetector, and a dielectric cap portion. The germanium photodetector is suspended by the silicon germanium mesa structure and does not abut a silicon waveguide. Germanium diffusion into the silicon waveguide and defect density in the germanium detector are minimized.

Abstract: The MEMS package has a mounting substrate on which one or more transducer chips are mounted wherein the mounting substrate has an opening. A top cover is attached to and separated from the mounting substrate by a spacer forming a housing enclosed by the top cover, the spacer, and the mounting substrate and accessed by the opening. Electrical connections are made between the one or more transducer chips and the mounting substrate and/or between the one or more transducer chips and the top cover. A bottom cover can be mounted on a bottom surface of the mounting substrate wherein a hollow chamber is formed between the mounting substrate and the bottom cover, wherein a second opening in the bottom cover is not aligned with the first opening. Pads on outside surfaces of the top and bottom covers can be used for further attachment to printed circuit boards. The top and bottom covers can be a flexible printed circuit board folded under the mounting substrate.

Abstract: A tunneling field effect transistor (TFET) device includes a semiconductor substrate having a layer of relatively intermediate bandgap semiconductor material, a layer of relatively low bandgap semiconductor material overlying the layer of relatively intermediate bandgap semiconductor material, and a layer of relatively high bandgap semiconductor material overlying the layer of relatively low bandgap semiconductor material. The TFET device includes a source region, a drain region, and a channel region defined in the semiconductor substrate. The TFET device also has a gate structure overlying at least a portion of the channel region. The source region is highly doped with an impurity dopant having a first conductivity type, and the drain region is highly doped with an impurity dopant having a second conductivity type.