Shape Of Potential Or Surface Barrier (epo) Patents (Class 257/E31.039)
  • Publication number: 20090160033
    Abstract: A light receiving element 1 has a semiconductor substrate 101; a first mesa 11 provided over the semiconductor substrate 101, and having an active region and a first electrode (p-side electrode 111) provided over the active region; a second mesa 12 provided over the semiconductor substrate 101, and having a semiconductor layer and a second electrode (n-side electrode 121) provided over the semiconductor layer; and a third mesa 13 provided over the semiconductor substrate 101, and having a semiconductor layer, wherein the third mesa 13 is arranged so as to surround the first mesa 11.
    Type: Application
    Filed: December 20, 2006
    Publication date: June 25, 2009
    Applicant: NEC Corporation
    Inventors: Sawaki Watanabe, Kazuhiro Shiba, Takeshi Nakata
  • Publication number: 20090134486
    Abstract: Both high light receiving sensitivity and high speed of a photodiode are achieved at the same time. The photodiode is provided with a semiconductor layer (1) and a pair of metal electrodes (2) which are arranged on the surface of the semiconductor layer (1) at an interval (d) and form an MSM junction. The interval (d) satisfies the relationship of ?>d>?100, where ? is the wavelength of incident light. The metal electrodes (2) can induce surface plasmon. At least one of the electrodes forms a Schottky junction with the semiconductor layer (1), and a low end portion is embedded in the semiconductor layer (1) to a position at a depth less than ?/2n, where n is the refractive index of the semiconductor layer (1).
    Type: Application
    Filed: March 8, 2007
    Publication date: May 28, 2009
    Applicant: NEC CORPORATION
    Inventor: Junichi Fujikata
  • Publication number: 20090042331
    Abstract: A method for forming a pixel image sensor that has a high shutter rejection ratio for preventing substrate charge leakage and prevents generation of photoelectrons within a floating diffusion storage node and storage node control transistor switches of the pixel image sensor. The pixel image sensor that prevents substrate charge leakage of photoelectrons from pixel image sensor adjacent to the pixel image sensor. The pixel image sensor is fabricated on a substrate with an isolation barrier and a carrier conduction well. The isolation barrier formed underneath the floating diffusion storage node allows effective isolation by draining away the stray carriers and preventing them from reaching the floating diffusion storage node. The carrier conduction well in combination with the deep N-well isolation barrier separates the pinned photodiode region from the deep N-well isolation barrier that is underneath the floating diffusion storage node.
    Type: Application
    Filed: August 26, 2008
    Publication date: February 12, 2009
    Inventors: Taner Dosluoglu, Guang Yang
  • Publication number: 20080203506
    Abstract: The invention concerns a capacitive junction including a region adapted to be traversed by an electromagnetic wave, and a dielectric layer interposed between two semiconductor material layers. The dielectric layer has a reduced thickness at the region, that is a thickness at the region less than its thickness at a contact of the junction. Such a junction is for instance used to form a modulator. The invention also concerns a method for making such a junction.
    Type: Application
    Filed: December 14, 2005
    Publication date: August 28, 2008
    Inventors: Sylvain David, Emmanuel Hadji
  • Publication number: 20080149967
    Abstract: A back illuminated imaging device 1 comprises a plurality charge blocking regions 19 which are arranged on a front surface 12 side, embedded in CCD charge transferring paths 21, and in which a first thickness T1 measured from the front surface 12 of first portions 19a extending along the CCD charge transferring paths 21 is larger than a first thickness T2 of second portions 19b extending along channel stops 20.
    Type: Application
    Filed: September 21, 2005
    Publication date: June 26, 2008
    Applicant: SHIMADZU CORPORATION
    Inventor: Takeharu Etoh
  • Publication number: 20080150069
    Abstract: A semiconductor photodiode (18) is formed as a pn-junction between a region (2) of a first conductivity type and a region (6) of a second conductivity type. The region (6) of the second conductivity type is approximately hemispherical. A mini guard ring (8), i.e. a ring of the second conductivity type having a junction depth that is much smaller than the junction depth of the region (6) preferably surrounds the region (6) in order to prevent surface trapping. The photodiode (18) is operated with a high reverse bias so that light falling on the photodiode (18) produces the avalanche effect.
    Type: Application
    Filed: January 10, 2006
    Publication date: June 26, 2008
    Inventors: Radivoje Popovic, Zhen Xiao
  • Publication number: 20080054259
    Abstract: A semiconductor component includes at least one surface, at least one trench formed in the at least one surface and at least one edge structured and arranged on the at least one surface and formed by the at least one trench. Additionally, the semiconductor component includes an electric contact arranged on the at least one edge, wherein the at least one surface provides for at least one of electric and optical power input and output to the semiconductor component.
    Type: Application
    Filed: July 15, 2005
    Publication date: March 6, 2008
    Inventors: Stefan Glunz, Ansgar Mette, Ralf Preu, Christian Schetter
  • Publication number: 20080006816
    Abstract: A photodetector for use at wavelengths of 2 ?m and longer has an intersubband absorption region to provide absorption at wavelengths beyond 2 ?m, integrated with an avalanche multiplier region to provide low-rise gain. In one particular design, the intersubband absorption region is a quantum-confined absorption region (e.g., based on quantum wells and/or quantum dots).
    Type: Application
    Filed: July 20, 2007
    Publication date: January 10, 2008
    Inventors: Sanjay Krishna, John P. David, Majeed Hayat
  • Patent number: 7238968
    Abstract: The present invention presents a semiconductor device (10) which is adapted to a solar cell, and in which a semiconductor element (1) is produced by forming one flat surface (2) on a spherical or substantially spherical silicon single crystal (1a, 1b). A diffusion layer (3) and a substantially spherical pn junction (4) are formed on this semiconductor element (1), and a diffusion-mask thin film (5) and a positive electrode (6a) are formed on the flat surface (2). A negative electrode 6b is formed at the apex on the opposite side to the positive electrode (6a), and an antireflection film (7) is formed on the surface side of the diffusion layer (3).
    Type: Grant
    Filed: August 13, 2001
    Date of Patent: July 3, 2007
    Inventor: Josuke Nakata