Radiation-sensitive Semiconductor Device With Potential Or Surface Barrier (epo) Patents (Class 257/E31.107)
  • Patent number: 11658610
    Abstract: The invention provides a photoelectric energy conversion device applied to a power conversion circuit to replace a magnetic component which is widely used in a power conversion circuit. The photoelectric energy conversion device includes a shell, at least one light generator, and at least one photovoltaic generator, wherein the at least one light generator and the at least one photovoltaic generator are packaged in the shell. The at least one photovoltaic generator receives light generated in the shell by the at least one light generator and generates electric energy based on the light, and the at least one photovoltaic generator serves as a power supply source for a back-end circuit of the photoelectric energy conversion device.
    Type: Grant
    Filed: October 20, 2021
    Date of Patent: May 23, 2023
    Assignee: SEA SONIC ELECTRONICS CO., LTD.
    Inventors: Hsiu-Cheng Chang, Sheng-Chien Chou
  • Patent number: 11563137
    Abstract: An optical transformer includes a light source and an array of photovoltaic cells optically coupled to the light source, where at least a portion of the photovoltaic cells are connected in series. An optical connector such as a waveguide or an optical fiber may be disposed between an output of the light source and an input of the array of photovoltaic cells. Configured to generate a high voltage output, the optical transformer may be configured to power a device such as an actuator that provides a tunable displacement as a function of voltage.
    Type: Grant
    Filed: October 7, 2019
    Date of Patent: January 24, 2023
    Assignee: Meta Platforms Technologies, LLC
    Inventors: Maik Andre Scheller, Andrew John Ouderkirk, Jonathan Robert Peterson, Daniele Piazza, Jeremy Thomas Braun, Kenneth Diest, Spencer Allan Wells, Renate Eva Klementine Landig, Liliana Ruiz Diaz, Tanya Malhotra
  • Patent number: 8847202
    Abstract: A dual-band infrared detector structure based on Type-II superlattices (T2SL) has been developed and experimentally validated. The structure according to the principles of the present invention is designed for a single Indium bump architecture and utilizes a T2SL barrier design that omits the traditional p-n junction region. The barrier design comprises multiple periods where each period comprises multiple monolayers doped P type. By selecting the composition, number of monolayers per period and number of periods, a transition region is created in the conduction band between a first absorber layer and a second absorber layer that allows operation at low biases (<100 mV for both bands) and exhibits a dark current density in the longer wavelength band comparable to that obtained with single-color detectors.
    Type: Grant
    Filed: January 17, 2012
    Date of Patent: September 30, 2014
    Assignee: HRL Laboratories, LLC
    Inventors: Brett Z. Nosho, Rajesh D. Rajavel, Hasan Sharifi, Sevag Terterian
  • Patent number: 8723161
    Abstract: A two-color detector includes a first absorber layer. The first absorber layer exhibits a first valence band energy characterized by a first valence band energy function. A barrier layer adjoins the first absorber layer at a first interface. The barrier layer exhibits a second valence band energy characterized by a second valence band energy function. The barrier layer also adjoins a second absorber layer at a second interface. The second absorber layer exhibits a third valence band energy characterized by a third valence band energy function. The first and second valence band energy functions are substantially functionally or physically continuous at the first interface and the second and third valence band energy functions are substantially functionally or physically continuous at the second interface.
    Type: Grant
    Filed: January 17, 2012
    Date of Patent: May 13, 2014
    Assignee: Sandia Corporation
    Inventors: John F. Klem, Jin K. Kim
  • Patent number: 8076741
    Abstract: A photo sensing element array substrate is provided. The photo sensing element array substrate includes a flexible substrate and a plurality of photo sensing elements. The photo sensing elements are disposed in array on the flexible substrate. Each of the photo sensing elements includes a photo sensing thin film transistor (TFT), an oxide semiconductor TFT and a capacitor. The photo sensing TFT is disposed on the flexible substrate. The oxide semiconductor TFT is disposed on the flexible substrate. The oxide semiconductor TFT is electrically connected to the photo sensing TFT. The capacitor is disposed on the flexible substrate and electrically connected between the photo sensing TFT and the oxide semiconductor TFT. When the photo sensing element array substrate is bent, it remains unaffected from normal operation.
    Type: Grant
    Filed: April 22, 2009
    Date of Patent: December 13, 2011
    Assignee: Industrial Technology Research Institute
    Inventors: Chih-Ming Lai, Yung-Hui Yeh
  • Publication number: 20110057112
    Abstract: A photodiode array 1 is provided with an n-type silicon substrate 3. A plurality of photodiodes 4 are formed in array on the opposites surface side to an incident surface of light L to be detected, in the n-type silicon substrate 3. A depression 6 with a predetermined depth more depressed than a region not corresponding to regions where the photodiodes 4 are formed is formed in regions corresponding to the regions where the photodiodes 4 are formed, on the incident surface side of the light L to be detected, in the n-type silicon substrate 3.
    Type: Application
    Filed: November 12, 2010
    Publication date: March 10, 2011
    Inventor: Katsumi SHIBAYAMA
  • Patent number: 7638351
    Abstract: A photodiode and a method of fabricating a photodiode for reducing modal dispersion and increasing travel distance. The central region of the photodiode is made less responsive to incident light than a peripheral region of the photodiode. The less responsive central region discriminates the lower order modes such that only the higher order modes are incident on the more responsive peripheral region. Because the lower order modes are subtracted, the range of propagation constants is reduced and modal dispersion is also reduced.
    Type: Grant
    Filed: July 20, 2005
    Date of Patent: December 29, 2009
    Assignee: Finisar Corporation
    Inventor: Jimmy A. Tatum
  • Publication number: 20070048890
    Abstract: A semiconductor device fabrication method in which when a semiconductor device with a built-in light receiving element is fabricated, a section for dividing the light receiving element is protected from damage caused by, for example, etching. An antireflection coating is formed not only on a light receiving area in a divided photodiode area but on a division area including a junction area between a division section outside the light receiving area for dividing a photodiode and a cathode. A polycrystalline silicon film is formed so as to cover the antireflection coating. Accordingly, the antireflection coating on the junction area between the division section outside the light receiving area and the cathode is protected against, for example, etching by the polycrystalline silicon film. As a result, the appearance of a crystal defect, a change in impurity concentration, or the like is suppressed in this area.
    Type: Application
    Filed: January 9, 2006
    Publication date: March 1, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Yuji Asano, Morio Kato