Abstract: An endoscopic image capturing assembly is provided and includes a holder, an image sensing device, a conducting track, a cable and a lens set. The holder includes a first surface and a second surface perpendicular to the first surface. The image sensing device is mounted on the first surface and includes an electrical connecting component. The conducting track is formed from the first surface to the second surface of the holder and electrically connected to the electrical connecting component. The cable is mounted on the second surface. A terminal of the cable is electrically connected to the electrical connecting component of the image sensing device by the conducting track. The lens set is assembled with the image sensing device. An optical axis of the lens set is parallel to an extending direction of the cable. Furthermore, a related endoscopic device is provided.

Abstract: An integrated device, the device including: a first level including a first mono-crystal layer, the first mono-crystal layer including a plurality of single crystal transistors; an overlying oxide disposed on top of the first level; a second level including a second mono-crystal layer, the second level overlaying the oxide, where the second mono-crystal layer includes a plurality of image sensors, where the second level is bonded to the first level with an oxide to oxide bond; a plurality of pixel control circuits; a plurality of memory circuits; and a third level disposed underneath the first level, where the third level includes a plurality of third transistors.

Abstract: Provided are an imaging apparatus and an electronic device in which even if an image sensor is mounted on a wiring board, the wiring board on which the image sensor is mounted can be assembled to a housing with high accuracy. Provided is an imaging apparatus including a sensor chip and a wiring board having a glass base material. The imaging apparatus is joined to at least one of the sensor chip or the wiring board via a bump unit including a plurality of bumps, and each of the plurality of bumps is formed by conductive members having substantially the same composition.

Abstract: An integrated device, the device including: a first level including a first mono-crystal layer, the first mono-crystal layer including a plurality of single crystal transistors; an overlying oxide disposed on top of the first level; a second level including a second mono-crystal layer, the second level overlaying the oxide, where the second mono-crystal layer includes a plurality of semiconductor devices; a third level overlaying the second level, where the third level includes a plurality of image sensors, where the first level includes a plurality of landing pads, where the second level is bonded to the first level, where the bonded includes an oxide to oxide bond; and an isolation layer disposed between the second mono-crystal layer and the third level.

Abstract: An optical device package includes a substrate, a light emitting device, a light detecting device, one or more electronic chips, a clear encapsulation layer and a patterned reflective layer. The substrate has a surface. The light emitting device is disposed on the surface of the substrate, the light detecting device is disposed on the surface of the substrate, and the light emitting device and the light detecting device have a gap. The one or more electronic chips are at least partially embedded in the substrate, and electrically connected to the light emitting device and the light detecting device. The clear encapsulation layer is disposed on the surface of the substrate and encapsulates the light emitting device and the light detecting device. The patterned reflective layer is disposed on an upper surface of the clear encapsulation layer and at least overlaps the gap between the light emitting device and the light detecting device in a projection direction perpendicular to the surface of the substrate.

Abstract: A semiconductor device includes a circuit substrate, at least one semiconductor die, a first frame, and a second frame. The at least one semiconductor die is connected to the circuit substrate. The first frame is disposed on the circuit substrate and encircles the at least one semiconductor die. The second frame is stacked on the first frame. The first frame includes a base portion and an overhang portion. The base portion has a first width. The overhang portion is disposed on the base portion and has a second width greater than the first width. The overhang portion laterally protrudes towards the at least one semiconductor die with respect to the base portion. The first width and the second width are measured in a protruding direction of the overhang portion.

Abstract: An image sensing chip package structure includes a chip, an adhesive loop and a light-transmissible substrate member. The chip includes an image sensing region. The adhesive loop is connected to the chip, and has an inner peripheral surface that defines a plurality of protrusions which surround the image sensing region of the chip. The light-transmissible substrate member is connected to the adhesive loop oppositely of the chip to cover the image sensing region of the chip. Methods of manufacturing the image sensing chip package structures are also provided.

Abstract: A scintillator array includes: a structure having at least one scintillator segment and a first reflective layer, the at least one scintillator segment and the first reflective layer having a first surface and a second surface, the at least one scintillator segment having a sintered compact containing a rare earth oxysulfide phosphor, and the first reflective layer being configured to reflect light; and a second reflective layer provided above the first surface via an adhesive layer, the adhesive layer having a thickness of 2 ?m or more and 40 ?m or less, and the second reflective layer having a film configured to reflect light.

Abstract: A metal stem includes a cylindrical portion in which an FPC inserting portion is formed, and a base standing upright from one plane of the cylindrical portion. A tubular lens cap with one open end is fixed to a peripheral portion of the one plane of the cylindrical portion, and has a lens mounted on a bottomed portion. A substrate mounted on one plane of the base includes a signal wiring layer and a ground wiring layer. An optical semiconductor element is mounted on the substrate and has a signal terminal connected to the signal wiring layer of the substrate, and a ground terminal connected to the ground wiring layer of the substrate. An FPC substrate is disposed so as to pass through the FPC inserting portion and to face the one plane of the base. The FPC substrate includes a signal wiring layer connected to the signal wiring layer of the substrate with a metal wire.

Abstract: An electronic device includes a carrier substrate having a front face. An electronic chip is mounted on the front face of the carrier substrate and includes an optical component. An encapsulation cover is mounted on top of the front face of the carrier substrate and bounds a chamber within which the chip is situated. A front opening extends through the cover and is situated in front of the optical component. An optical element, designed to allow light to pass, is mounted within the chamber at a position which covers the front opening of the encapsulation cover. The optical element includes a central region designed to deviate the light and having an optical axis aligned with the front opening and the optical component. A positioning pattern is provided on the optical element to assist with mounting the optical element to the cover and mounting the cover to the carrier substrate.

Abstract: An integrated device, the device including: a first level including a first mono-crystal layer, the first mono-crystal layer including a plurality of single crystal transistors; an overlying oxide disposed on top of the first level; a second level including a second mono-crystal layer, the second level overlaying the oxide, where the second mono-crystal layer includes a plurality of semiconductor devices; a third level overlaying the second level, where the third level includes a plurality of image sensors, where the first level includes a plurality of landing pads, where the second level is bonded to the first level, where the bonded includes an oxide to oxide bond; and an isolation layer disposed between the second mono-crystal layer and the third level.

Abstract: A photonic integrated circuit including first and second opto-electronic devices that are fabricated on a semiconductor wafer having an epitaxial layer stack including an n-type indium phosphide-based contact layer that is provided with at least one selectively p-type doped tubular-shaped region for providing an electrical barrier between respective n-type contact regions of the first and second opto-electronic devices that are optically interconnected by a passive optical waveguide that is fabricated in a non-intentionally doped waveguide layer including indium gallium arsenide phosphide, the non-intentionally doped waveguide layer being arranged on top of the n-type contact layer, wherein a first portion of the at least one selectively p-type doped tubular-shaped region is arranged underneath the passive optical waveguide between the first and second opto-electronic devices. An opto-electronic system including the photonic integrated circuit.

Abstract: An inventive rotatable optical short-range transceiver has: a support which is rotatable around a rotation axis, an optical receiver which is arranged at the support on the rotation axis to receive an optical reception signal from a first direction, an optical transmitter which is arranged at the support to be adjacent to the optical receiver to emit an optical transmission signal in a second direction, and an optical transmission/reception unit which is configured to allow interruption-free rotatable optical data communication, wherein the optical transmission/reception unit is arranged at the support above the optical receiver and extends over the optical receiver and the optical transmitter, and wherein the optical transmission/reception unit has a support structure for mounting at the support, which is implemented integrally with the optical transmission/reception unit.

Abstract: Provided is an optical element module comprising: a mold body having a first surface formed on an upper portion thereof and a second surface formed on a lower portion thereof; an external connection terminal formed on the first surface and electrically connected to the outside; an optical engine embedded and sealed between the first surface and the second surface and having a connection pad exposed to the second surface; a conductive vertical via formed to penetrate the first surface and the second surface and having one end portion electrically connected to the external connection terminal; a wiring layer formed on the second surface to interconnect the other end of the conductive vertical via and the connection pad of the optical engine; and a reflective surface integrally formed on the wiring layer and transmits an optical signal generated by the optical engine or received by the optical engine.

Abstract: Disclosed are RCLED lamp bead packaging process and RCLED lamp bead, which comprises steps of: dispensing a die-bonding glue, mounting a chip, baking, welding a bonding wire, dispensing a first layer of anti-reflection adhesive, baking, dispensing a second layer of anti-reflection adhesive, baking, and testing. Anti-reflection adhesive is dispensed in corresponding area to cover part capable of reflecting light in RCLED lamp bead and eliminate reflection effect effectively. The first layer of anti-reflection adhesive fills in specified area rapidly to achieve high production efficiency. The second layer of anti-reflection adhesive flows slowly after glue dispensing, so that the glue dispensing precision is improved and the light-emitting hole is prevent from being covered. When bonding wire is welded, a bracket is the first welding spot and a PAD of the chip is the second welding spot to achieve a lower radian of the bonding wire.

Abstract: An image sensor package comprises: an image sensor chip configured to convert light collected from an outside thereof into an electrical signal; a package substrate disposed under the image sensor chip the package substrate configured to process the electrical signal converted from the image sensor chip; a glass substrate disposed over the image sensor chip while being spaced apart from the image sensor chip; a seal pattern disposed between an upper surface of the package substrate and a lower surface of the glass substrate while surrounding the image sensor chip; and a protection pattern disposed on the package substrate outside the seal pattern, the protection pattern comprising a single-component material, wherein the seal pattern comprises a material different from the material of the protection pattern.

Abstract: Misalignment of a substrate portion which integrates an image sensor and a substrate is suppressed. An imaging apparatus comprises: an imaging optical system including at least one optical element; a holding member holding the imaging optical system; an image sensor configured to capture a subject image formed by the imaging optical system; a substrate having the image sensor mounted thereon; and a bonding member fixing a substrate portion to the holding member, the substrate portion integrating the image sensor and the substrate, wherein the bonding member is partly in contact with a surface of the substrate portion, and at at least two positions in a part of the surface of the substrate portion in contact with the bonding member, the surface of the substrate portion faces different directions.

Abstract: A tablet computing system may include a housing member defining a first portion of a back exterior surface of the tablet computer, at least a portion of a side exterior surface of the tablet computer, a raised rim extending from the back exterior surface and at least partially defining a sensor assembly hole extending through the housing member, and a support ledge positioned in the sensor assembly hole. The tablet computing system may also include a frame member positioned at least partially in the sensor assembly hole and coupled to the support ledge, a camera bracket coupled to the frame member, a first camera module coupled to the camera bracket, aa second camera module coupled to the camera bracket, the camera bracket fixing the relative positions of the first camera module and the second camera module, and a cover member positioned in the sensor assembly hole and attached to the frame member.

Abstract: A radiation imaging device according to one embodiment includes a radiation detection panel having a first surface on which a detection region is formed, and a second surface on a side opposite to the first surface, a base substrate having a support surface configured to face the second surface and configured to support the radiation detection panel, and a flexible circuit substrate connected to the radiation detection panel, wherein an end portion of the base substrate corresponding to a portion to which the flexible circuit substrate is connected is located further inward than an end portion of the radiation detection panel when seen in a first direction orthogonal to the support surface, and the base substrate has a protruding portion which protrudes further outward than the radiation detection panel at a position at which the base substrate does not overlap the flexible circuit substrate when seen in the first direction.

Abstract: An integrated device, the device including: a first level including a first mono-crystal layer, the first mono-crystal layer including a plurality of single crystal transistors; an overlaying oxide on top of the first level; a second level including a second mono-crystal layer, the second level overlaying the oxide, where the second mono-crystal layer includes a plurality of semiconductor devices; a third level overlaying the second level, where the third level includes a plurality of image sensors, where the second level is bonded to the first level, where the bonded includes an oxide to oxide bond; and an isolation layer disposed between the second mono-crystal layer and the third level.

Abstract: An optical semiconductor device includes a semiconductor light receiving element, a capacitor, and a carrier. The carrier has a mounting surface on which the semiconductor light receiving element and the capacitor are mounted. The optical semiconductor device includes a first conductive pattern including a first mounting area and a first bonding pad, a second conductive pattern including a second mounting area and a third mounting area, and a third conductive pattern including a second bonding pad. The first mounting area is connected to a first electrode of the semiconductor light receiving element. The second mounting area is connected to a second electrode of the semiconductor light receiving element. The third mounting area is connected to one electrode of the capacitor. The conductive patterns are separated from each other. The other electrode of the capacitor is electrically connected to the third conductive pattern via a wire.

Abstract: According to an embodiment, a temperature of an inside of a furnace is set to fall within a range of a reduction temperature or more of a carboxylic acid and less than a melting temperature of a solder bump, and the inside is concurrently set to have a first carboxylic acid gas concentration. Thereafter, the temperature of the inside is raised up to the melting temperature, and the inside is concurrently set to have a second carboxylic acid gas concentration. The second carboxylic acid gas concentration is lower than the first carboxylic acid gas concentration, and is a concentration containing a minimum amount of carboxylic acid gas defined to achieve reduction on an oxide film of the solder bump. The inside has the second carboxylic acid gas concentration at least at a time when the temperature of the inside reaches the melting temperature.

Abstract: An optical module is configured being provided with: a first case fixed to an implementation surface of an implementation substrate to cover an LD and an LD driver; a first filler filled in the first case to seal the LD and the LD driver; a second case fixed to the implementation surface of the implementation substrate to cover the first case in a state of not adhering to the first case; a third case accommodating the implementation substrate and the second case inside; and a second filler filled in the third case to seal the implementation substrate and the second case.

Abstract: An integrated device, the device including: a first level including a first mono-crystal layer, the first mono-crystal layer including a plurality of single crystal transistors; an overlaying oxide on top of the first level; a second level including a second mono-crystal layer, the second level overlaying the oxide, where the second mono-crystal layer includes a plurality of first image sensors; and a third level overlaying the second level, where the third level includes a plurality of second image sensors, where the second level is bonded to the first level, where the bonded includes an oxide to oxide bond; and an isolation layer disposed between the second mono-crystal layer and the third level.

Abstract: Various embodiments of the present disclosure are directed towards a method for forming an image sensor in which a device layer has high crystalline quality. According to some embodiments, a hard mask layer is deposited covering a substrate. A first etch is performed into the hard mask layer and the substrate to form a cavity. A second etch is performed to remove crystalline damage from the first etch and to laterally recess the substrate in the cavity so the hard mask layer overhangs the cavity. A sacrificial layer is formed lining cavity, a blanket ion implantation is performed into the substrate through the sacrificial layer, and the sacrificial layer is removed. An interlayer is epitaxially grown lining the cavity and having a top surface underlying the hard mask layer, and a device layer is epitaxially grown filling the cavity over the interlayer. A photodetector is formed in the device layer.

Abstract: A microelectronic device includes an accommodating housing, a circuit board, an electronic component, and a conducting wire. The accommodating housing has an accommodating space therein. The circuit board is disposed within the accommodating space, and has a first and a second end surface disposed opposite to each other. The first end surface includes a first conductive contact, and a lateral side of the circuit board includes a receiving hole being a half-open hole extending from the second end surface. A second conductive contact is disposed on the surface of the receiving hole and electrically connected to the first conductive contact via an internal power layer of the circuit board. The electronic component is disposed on the first end surface and electrically connected to the first conductive contact. One end of the conducting wire is disposed in the receiving hole and electrically connected to the second conductive contact.

Abstract: A light emitting device may include a substrate; a body which is disposed on the substrate and has a first hole having a predetermined size and a light emitting chip which is disposed within a cavity formed by the substrate and the first hole of the body. A cap may be disposed on the body and may have a second hole having a predetermined size. A transparent window may be disposed in the second hole. A lower portion of the cap is divided into a first surface and a second surface more projecting downwardly than the first surface, and at least a portion of the first surface is attached and fixed to the body.

Abstract: An imaging apparatus includes a substrate including an imaging element, one or two attachment portions that attach the substrate by screwing and are capable of inclining a board surface of the substrate, by screwing in a screw, relative to a plane perpendicular to an optical axis of an optical system that forms an optical image on the imaging element; and one or more supports configured to abut the substrate from an opposite direction to a screwing direction of the attachment portion at any position, on the substrate, that rotates in the screwing direction of the attachment portion when the board surface is inclined by screwing. As a result, an imaging apparatus that allows an imaging element to be installed at a desired position and orientation while reducing the size of the substrate is provided.

Abstract: A camera module includes a circuit board, a camera device and an image processing chip. An image sensation chip of the camera device is directly integrated with the circuit board by means of chip-on-board (COB) manufacturing process to minify the total volume of the camera module, whereby the camera module can be disposed in a narrow space.

Abstract: Embodiments of the present invention provide a camera module and a method of manufacturing the same, the camera module comprising a sensor assembly, at least one semiconductor substrate, and a molding compound; wherein the sensor assembly comprises a semiconductor die, a sensor circuit disposed on the top surface of the semiconductor die, and a transparent cover coupled to the semiconductor die over the top surface of the semiconductor die; wherein each semiconductor substrate is disposed around the sensor assembly in a horizontal direction; and wherein the molding compound is filled between each semiconductor substrate and the sensor assembly.

Abstract: A package structure is provided, which includes: a substrate having opposite first and second surfaces; at least an electronic element disposed on the first surface of the substrate; and an encapsulant formed on the first surface of the substrate for encapsulating the electronic element. The encapsulant has a non-rectangular shape so as to reduce an ineffective space in the encapsulant.

Abstract: An image sensor module includes a substrate, an image sensor mounted on the substrate, a holder position on the substrate, a lens barrel for holding a lens module and at least one spring. The spring is positioned between the holder and the lens barrel, and the spring exerts forces on the holder and the lens barrel; and the lens barrel has at least one hole, and a screw penetrates through the hole and is screwed into the holder.

Abstract: A semiconductor device package having a cavity formed using film-assisted molding techniques is provided. Through the use of such techniques the cavity can be formed in specific locations in the molded package, such as on top of a device die mounted on the package substrate or a lead frame. In order to overcome cavity wall angular limitations introduced by conformability issues associated with film-assisted molding, a gel reservoir feature is formed so that gel used to protect components in the cavity does not come in contact with a lid covering the cavity or the junction between the lid and the package attachment region. The gel reservoir is used in conjunction with a formed level setting feature that controls the height of gel in the cavity. Benefits include decreased volume of the cavity, thereby decreasing an amount of gel-fill needed and thus reducing production cost of the package.

Abstract: A light-emitting diode (“LED”) device has an LED chip attached to a substrate. The terminals of the LED chip are electrically coupled to leads of the LED device. Elastomeric encapsulant within a receptacle of the LED device surrounds the LED chip. A second encapsulant is disposed within an aperture of the receptacle on the elastomeric encapsulant.

Abstract: Embodiments include but are not limited to apparatuses and systems including semiconductor packages, e.g. memory packages, having an interposer including at least one topological feature, such as a depression in a surface of the interposer, a die coupled to the surface of the interposer, and an encapsulant material formed over the die and the interposer, and disposed in the at least one depression to resist movement of the encapsulant material relative to the interposer. Other embodiments may be described and claimed.

Abstract: A solid state imaging device according to an embodiment includes a light sensing part which conducts photoelectric conversion on incident light. The solid state imaging device includes a ferroelectric layer including an organic compound on a surface of the light sensing part on which light is incident. The solid state imaging device includes a transparent electrode formed on the ferroelectric layer.

Abstract: A semiconductor light emitting device includes an active layer, an electrode formed above the active layer, a current spreading layer formed between the active layer and the electrode, having n-type conductivity, having a larger bandgap energy than the active layer, and spreading electrons injected from the electrode in the plane of the active layer, and a surface processed layer formed on the current spreading layer, having a larger bandgap energy than the active layer, and having an uneven surface region with a large number of concave-convex structures. The electrode is not formed on the uneven surface region. The conduction band edge energy from the Fermi level of the surface processed layer is higher than that of the current spreading layer.

Abstract: This invention relates to an encapsulation structure comprising a luminescent wavelength conversion material for at least one solar cell or photovoltaic device which acts to enhance the solar harvesting efficiency of the solar cell device. The luminescent wavelength conversion material comprises at least one chromophore and an optically transparent polymer matrix. Application of the encapsulation structure, as disclosed herein, to solar harvesting devices, including solar cells, solar panels, and photovoltaic devices, improves the solar harvesting efficiency of the device by widening the spectrum of incoming sunlight that can be effectively converted into electricity by the device.

Abstract: A method for producing an optoelectronic device includes providing a carrier, applying at least one first metal layer on the carrier, providing at least one optical component, applying at least one second metal layer on the at least one optical component, and mechanically connecting the carrier to the at least one optical component by the at least one first and the at least one second metal layer, wherein the connecting includes friction welding or is friction welding.

Abstract: A photovoltaic module comprising a first substrate, a backing sheet, a solar cell or a plurality of solar cells, each solar cell positioned between the substrate and the backing sheet, at least one thin electrically conducting board positioned between the substrate and the backing sheet and preferably where the module has at least one electronic device, preferably positioned on the electrically conducting board, that provides the module with a desired function or capability.

Abstract: A solar cell packaging process is disclosed. At first, a solar cell is provided, and at least one liquid packaging material is spray-coated onto a surface of the solar cell by a spray-coating process. A liquid packaging material is directly spread on the surface of the solar cell in at least one covering process. Then, the liquid packaging material is hardened in curing process. Therefore, a packaging layer is formed on the surface of the solar cell to finish the solar cell packaging. By implementing the above packaging process, it ensures there is no over stress applied on the solar cell in the packaging process to avoid generating broken pieces for significantly improving the yield.

Abstract: It is to provide an electrolyte solution for a dye sensitized solar cell that does not generate a gas, can be used in a wide temperature range, and is excellent in durability. The electrolyte solution contains a chain sulfone compound represented by formula (1) as a solvent. (In the formula, R1 and R2 each independently represent an alkyl group having from 1 to 12 carbon atoms, which may be partially substituted by a halogen, an alkoxy group or an aromatic ring, an alkoxy group, or a phenyl group.

Abstract: The invention relates to a method of encapsulating a flexible optoelectronic multi-layered structure (6) provided on a polymer substrate (2) comprising the steps of providing the flexible optoelectronic multi-layered structure with one or both a bottom encapsulation stack (B) and a top encapsulation stack (T), wherein the bottom encapsulation stack and the top encapsulation layer comprise a first inorganic layer (4a, 8a) separated from a second inorganic layer (4b, 8b) by a substantially continuous getter layer (5, 8) comprising a metal oxide, the first and the second inorganic layers having an intrinsic water vapour transmission of 10?5 g·m?2·day?1 or less.

Abstract: A method of constructing a solar cell panel is disclosed that includes providing a solar cell that has a front side and a back side, where the front side faces the sun during normal operation, heating a thermoplastic polyimide to at least its reflow temperature, flowing the thermoplastic polyimide onto the back side of the solar cell while heated to at least its reflow temperature, and cooling the thermoplastic polyimide to a temperature below its reflow temperature to bond the thermoplastic polyimide directly to the solar cell. The direct bonding of the thermoplastic polyimide to the solar cell is accomplished without an adhesive such as RTV adhesives. The method may also include bonding a substrate directly to the thermoplastic polyimide opposite the solar cell.

Abstract: A stiffener molded to a semiconductor substrate, such as a lead frame, and methods of molding the stiffener to the substrate are provided. The stiffener is molded to the substrate to provide rigidity and support to the substrate. The stiffener material can comprise a polymeric material molded to the substrate by a molding technique such as transfer molding, injection molding, and spray molding, or using an encapsulating material. One or more dies, chips, or other semiconductor or microelectronic devices can be disposed on the substrate to form a die assembly. The stiffener can be molded to a substrate comprising one or more dies, over which an encapsulating material can be applied to produce a semiconductor die package.

Abstract: According to one embodiment, an imaging device includes a substrate, a photodetecting portion, a circuit portion and a through interconnect. The substrate has a first major surface, a second major surface on a side opposite to the first major surface, a recess portion provided on the first major surface and retreated in a first direction going from the first major surface to the second major surface, and a through hole communicating with the first major surface and the second major surface and extending in the first direction. The photodetecting portion is provided above the recess portion and away from the substrate. The circuit portion is electrically connected to the photodetecting portion and provided on the first major surface. The through interconnect is electrically connected to the circuit portion and provided inside the through hole. The recess portion has a first inclined surface. The through hole has a second inclined surface.

Abstract: A solar cell module and a method for manufacturing the same are discussed. The solar cell module includes a plurality of solar cells, a front substrate a front substrate positioned at first surfaces of the plurality of solar cells, a back substrate positioned at second surfaces of the plurality of solar cells, a front protective member positioned between the front substrate and the plurality of solar cells, the front protective member including a first silicone resin, a back protective member positioned between the back substrate and the plurality of solar cells, the back protective member including a second silicone resin, and a fiber material disposed between the front substrate and the back substrate.

Abstract: The present invention discloses a manufacturing method and structure of a wafer level image sensor module with package structure. The structure of the wafer level image sensor module with package structure includes a semi-finished product, a plurality of solder balls, and an encapsulant. The semi-finished product includes an image sensing chip and a wafer level lens assembly. The encapsulant is disposed on lateral sides of the image sensing chip and the wafer level lens assembly. Also, the manufacturing method includes the steps of: providing a silicon wafer, dicing the silicon wafer, providing a lens assembly wafer, fabricating a plurality of semi-finished products, performing a packaging process, mounting the solder balls, and cutting the encapsulant. Accordingly, the encapsulant encapsulates each of the semi-finished products by being disposed on the lateral sides thereof.

Abstract: The present invention discloses a wafer level image sensor packaging structure and a manufacturing method of the same. The manufacturing method includes the following steps: providing a silicon wafer, dicing the silicon wafer, providing a plurality of transparent lids, fabricating a plurality of semi-finished products, performing a packaging process, mounting solder balls, and cutting an encapsulant between the semi-finished products. The manufacturing method of the invention has the advantage of being straightforward, uncomplicated, and cost-saving. Thus, the wafer level image sensor package structure is lightweight, thin, and compact. To prevent the image sensor chip from cracking on impact during handling, the encapsulant will be arranged on the lateral sides of the semi-finished products during the packaging process.

Abstract: Size reduction of an image pickup module is promoted, and reliability of electric connection and electric noise resistance are improved by decreasing the numbers of components and connection spots. The problems are solved by providing an image pickup module including a solid-state image pickup element chip having an image pickup surface, a cover glass that covers the image pickup surface, and a wiring board on which the solid-state image pickup element chip is mounted, in which the solid-state image pickup element chip and the wiring board have an overlap structure in which end portions thereof are overlapped with each other, and a first electrode portion formed on the end portion of the solid-state image pickup element chip and a second electrode portion formed on the end portion of the wiring board are electrically connected through a bump.