Comprising Nitride Compound (e.g., Algan) (epo) Patents (Class 257/E33.033)
  • Patent number: 11810782
    Abstract: A conductive C-plane GaN substrate has a resistivity of 2×10?2 ?·cm or less or an n-type carrier concentration of 1×1018 cm?3 or more at room temperature. At least one virtual line segment with a length of 40 mm can be drawn at least on one main surface of the substrate. The line segment satisfies at least one of the following conditions (A1) and (B1): (A1) when an XRC of (004) reflection is measured at 1 mm intervals on the line segment, a maximum value of XRC-FWHMs across all measurement points is less than 30 arcsec; and (B1) when an XRC of the (004) reflection is measured at 1 mm intervals on the line segment, a difference between maximum and minimum values of XRC peak angles across all the measurement points is less than 0.2°.
    Type: Grant
    Filed: December 9, 2020
    Date of Patent: November 7, 2023
    Assignee: MITSUBISHI CHEMICAL CORPORATION
    Inventors: Yutaka Mikawa, Hideo Fujisawa, Tae Mochizuki, Hideo Namita, Shinichiro Kawabata
  • Patent number: 11522102
    Abstract: A semiconductor device is provided. The semiconductor device includes a first semiconductor layer; a second semiconductor layer on the first semiconductor layer; an active region between the second semiconductor layer and the first semiconductor layer; an electron blocking structure between the active region and the second semiconductor layer; a first Group III-V semiconductor layer between the active region and the electron blocking structure; and a second Group III-V semiconductor layer between the electron blocking structure and the second semiconductor layer; wherein the first Group III-V semiconductor layer and the second Group III-V semiconductor layer each includes indium, aluminum and gallium, the first Group III-V semiconductor layer has a first indium content, the second Group III-V semiconductor layer has a second indium content, and the second indium content is less than the first indium content.
    Type: Grant
    Filed: January 15, 2021
    Date of Patent: December 6, 2022
    Assignee: EPISTAR CORPORATION
    Inventors: Huan-Yu Lai, Li-Chi Peng
  • Patent number: 9023721
    Abstract: Bulk III-nitride semiconductor materials are deposited in an HPVE process using a metal trichloride precursor on a metal nitride template layer of a growth substrate. Deposition of the bulk III-nitride semiconductor material may be performed without ex situ formation of the template layer using a MOCVD process. In some embodiments, a nucleation template layer is formed ex situ using a non-MOCVD process prior to depositing bulk III-nitride semiconductor material on the template layer using an HVPE process. In additional embodiments, a nucleation template layer is formed in situ using an MOCVD process prior to depositing bulk III-nitride semiconductor material on the template layer using an HVPE process. In further embodiments, a nucleation template layer is formed in situ using an HVPE process prior to depositing bulk III-nitride semiconductor material on the template layer using an HVPE process.
    Type: Grant
    Filed: November 23, 2011
    Date of Patent: May 5, 2015
    Assignee: Soitec
    Inventors: Chantal Arena, Ronald Thomas Bertram, Ed Lindow
  • Patent number: 8999060
    Abstract: Millimeter-scale GaN single crystals in filamentary form, also known as GaN whiskers, grown from solution and a process for preparing the same at moderate temperatures and near atmospheric pressures are provided. GaN whiskers can be grown from a GaN source in a reaction vessel subjected to a temperature gradient at nitrogen pressure. The GaN source can be formed in situ as part of an exchange reaction or can be preexisting GaN material. The GaN source is dissolved in a solvent and precipitates out of the solution as millimeter-scale single crystal filaments as a result of the applied temperature gradient.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: April 7, 2015
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Boris N. Feigelson, Jennifer K. Hite, Francis J. Kub, Charles R. Eddy, Jr.
  • Patent number: 8946774
    Abstract: A method of fabricating a single crystal gallium nitride substrate the step of cutting an ingot of single crystal gallium nitride along predetermined planes to make one or more single crystal gallium nitride substrates. The ingot of single crystal gallium nitride is grown by vapor phase epitaxy in a direction of a predetermined axis. Each predetermined plane is inclined to the predetermined axis. Each substrate has a mirror polished primary surface. The primary surface has a first area and a second area. The first area is between an edge of the substrate and a line 3 millimeter away from the edge. The first area surrounds the second area. An axis perpendicular to the primary surface forms an off-angle with c-axis of the substrate. The off-angle takes a minimum value at a first position in the first area of the primary surface.
    Type: Grant
    Filed: April 12, 2013
    Date of Patent: February 3, 2015
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Masaki Ueno
  • Patent number: 8932891
    Abstract: A method for manufacturing a nitride based single crystal substrate and a method for manufacturing a nitride based semiconductor device. The method for manufacturing the nitride based single crystal substrate includes forming a nitride based single crystal layer on a preliminary substrate; forming a polymer support layer by applying a setting adhesive material having flowability on the upper surface of the nitride based single crystal layer and hardening the applied adhesive material; and separating the nitride based single crystal layer from the preliminary substrate by irradiating a laser beam onto the lower surface of the preliminary substrate. The method for manufacturing the nitride based single crystal substrate is applied to the manufacture of a nitride based semiconductor device having a vertical structure.
    Type: Grant
    Filed: July 25, 2006
    Date of Patent: January 13, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong In Yang, Ki Yon Park
  • Patent number: 8928017
    Abstract: Example embodiments are directed to light-emitting devices (LEDs) and methods of manufacturing the same. The LED includes a first semiconductor layer; a second semiconductor layer; an active layer formed between the first and second semiconductor layers; and an emission pattern layer including a plurality of layers on the first semiconductor layer, the emission pattern including an emission pattern for externally emitting light generated from the active layer.
    Type: Grant
    Filed: January 4, 2011
    Date of Patent: January 6, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Su-hee Chae, Young-soo Park, Bok-ki Min, Jun-youn Kim, Hyun-gi Hong
  • Patent number: 8890195
    Abstract: According to one embodiment, a semiconductor light emitting device includes a stacked structural body, a first, a second and a third conductive layer. The stacked structural body includes first and second semiconductors and a light emitting layer provided therebetween. The second semiconductor layer is disposed between the first conductive layer and the light emitting layer. The first conductive layer is transparent. The first conductive layer has a first major surface on a side opposite to the second semiconductor layer. The second conductive layer is in contact with the first major surface. The third conductive layer is in contact with the first major surface and has a reflectance higher than a reflectance of the second conductive layer. The third conductive layer includes an extending part extending in parallel to the first major surface. At least a portion of the extending part is not covered by the second conductive layer.
    Type: Grant
    Filed: January 23, 2013
    Date of Patent: November 18, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Taisuke Sato, Toshiyuki Oka, Koichi Tachibana, Shinya Nunoue
  • Patent number: 8872227
    Abstract: A nitride semiconductor device includes a semiconductor substrate, and a nitride semiconductor layer formed on the semiconductor substrate. The semiconductor substrate includes a normal region and an interface current block region surrounding the normal region. The nitride semiconductor layer includes an element region and an isolation region surrounding the element region. The element region is formed over the normal region. The interface current block region contains impurities, and forms a potential barrier against carriers generated at an interface between the nitride semiconductor layer and the semiconductor substrate.
    Type: Grant
    Filed: February 22, 2012
    Date of Patent: October 28, 2014
    Assignee: Panasonic Corporation
    Inventors: Hidekazu Umeda, Yoshiharu Anda, Tetsuzo Ueda, Tsuyoshi Tanaka, Daisuke Ueda
  • Patent number: 8866164
    Abstract: A semiconductor light emitting device having a light emitting structure including at least one first conductive GaN based semiconductor layer, an active layer above the at least one first conductive GaN based semiconductor layer, and at least one second conductive GaN based semiconductor layer above the active layer, a plurality of patterns disposed from the at least one second conductive GaN based semiconductor layer through a portion of the at least one first conductive GaN based semiconductor layer, and an insulating member on the plurality of patterns. The plurality of patterns include a lower part contacting with the light emitting structure and a upper part contacting with the light emitting structure. A first base angle of the lower part is different from the second base angle of the upper part.
    Type: Grant
    Filed: April 12, 2010
    Date of Patent: October 21, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventor: Sang Youl Lee
  • Patent number: 8835901
    Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer, a second semiconductor layer, a light emitting part, and a multilayered structural body. The light emitting part is provided between the first and second semiconductor layers and includes barrier layers and well layers alternately stacked. The multilayered structural body is provided between the first semiconductor layer and the light emitting part and includes high energy layers and low energy layers alternately stacked. An average In composition ratio on a side of the second semiconductor is higher than that on a side of the first semiconductor in the multilayered structural body. An average In composition ratio on a side of the second semiconductor is higher than that on a side of the first semiconductor in the light emitting part.
    Type: Grant
    Filed: February 18, 2011
    Date of Patent: September 16, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Tachibana, Hajime Nago, Toshiki Hikosaka, Shigeya Kimura, Shinya Nunoue
  • Patent number: 8823028
    Abstract: A light emitting device including a conductive support substrate; an electrode layer on the conductive support substrate, and including side portions such that a center upper portion of the electrode layer protrudes upward from the conductive support substrate; a protective layer on the side portions of the electrode layer, the protective layer including an insulating material having a higher resistance than that of the electrode layer and a top surface of the protective layer is in line with a top surface of the protruding center upper portion of the electrode layer; and a light emitting structure including a second conductive semiconductor layer on the electrode layer and at least a portion of the protective layer, an active layer on the second conductive semiconductor layer and a first conductive semiconductor layer on the active layer.
    Type: Grant
    Filed: July 21, 2009
    Date of Patent: September 2, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventors: Jun Suk Park, Deung Kwan Kim, Han Sin
  • Patent number: 8822999
    Abstract: An organic light-emitting display device includes a capacitor lower electrode that includes a semiconductor material doped with ion impurities. A first insulating layer covers an active layer and the capacitor lower electrode. A gate electrode includes a gate lower electrode formed of a transparent conductive material and a gate upper electrode formed of metal. A pixel electrode is electrically connected to the thin film transistor. A capacitor upper electrode is at the same level as the pixel electrode. An etch block layer is formed between the first insulating layer and the capacitor upper electrode. Source and drain electrodes are electrically connected to the active layer. A second insulating layer has an opening completely exposing the capacitor upper electrode. A third insulating layer exposes the pixel electrode. An intermediate layer includes an emissive layer. An opposite electrode faces the pixel electrode.
    Type: Grant
    Filed: December 7, 2011
    Date of Patent: September 2, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jong-Hyun Choi, Kwang-Hae Kim
  • Patent number: 8791468
    Abstract: A method of fabricating a gallium nitride (GaN) thin layer, by which a high-quality GaN layer may be grown on a large-area substrate using an electrode layer suspended above a substrate, a GaN film structure fabricated using the method, and a semiconductor device including the GaN film structure. The method includes forming a sacrificial layer on a substrate, forming a first buffer layer on the sacrificial layer, forming an electrode layer on the first buffer layer, forming a second buffer layer on the electrode layer, partially etching the sacrificial layer to form at least two support members configured to support the first buffer layer and form at least one air cavity between the substrate and the first buffer layer, and forming a GaN thin layer on the second buffer layer.
    Type: Grant
    Filed: October 11, 2011
    Date of Patent: July 29, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joo-ho Lee, Jun-hee Choi, Sang-hun Lee, Mi-jeong Song
  • Patent number: 8785965
    Abstract: A nitride-based semiconductor light-emitting device according to the present invention has a nitride-based semiconductor multilayer structure 50. The nitride-based semiconductor multilayer structure 50 includes: an active layer 32 including an AlaInbGacN crystal layer (where a+b+c=1, a?0, b?0 and c?0); an AldGaeN overflow suppressing layer 36 (where d+e=1, d>0, and e?0); and an AlfGagN layer 38 (where f+g=1, f?0, g?0 and f<d). The AldGaeN overflow suppressing layer 36 is arranged between the active layer 32 and the AlfGagN layer 38. And the AldGaeN overflow suppressing layer 36 includes an In-doped layer that is doped with In at a concentration of 1×1016 atms/cm3 to 1×1019 atms/cm3.
    Type: Grant
    Filed: September 7, 2009
    Date of Patent: July 22, 2014
    Assignee: Panasonic Corporation
    Inventors: Toshiya Yokogawa, Ryou Kato
  • Patent number: 8728236
    Abstract: Large area single crystal III-V nitride material having an area of at least 2 cm2, having a uniformly low dislocation density not exceeding 3×106 dislocations per cm2 of growth surface area, and including a plurality of distinct regions having elevated impurity concentration, wherein each distinct region has at least one dimension greater than 50 microns, is disclosed. Such material can be formed on a substrate by a process including (i) a first phase of growing the III-V nitride material on the substrate under pitted growth conditions, e.g., forming pits over at least 50% of the growth surface of the III-V nitride material, wherein the pit density on the growth surface is at least 102 pits/cm2 of the growth surface, and (ii) a second phase of growing the III-V nitride material under pit-filling conditions.
    Type: Grant
    Filed: January 17, 2011
    Date of Patent: May 20, 2014
    Assignee: Cree, Inc.
    Inventors: Xueping Xu, Robert P. Vaudo
  • Patent number: 8728843
    Abstract: A nitride semiconductor light emitting element has; a laminate of a first conduction type semiconductor layer, a light emitting layer and a second conduction type semiconductor layer of a different conduction type from that of the first conduction type semiconductor layer; and electrodes with a laminate structure formed on the first conduction type semiconductor layer, the electrodes include a conductive region of a first layer which has the conductive region and an insulated region.
    Type: Grant
    Filed: February 4, 2011
    Date of Patent: May 20, 2014
    Assignee: Nichia Corporation
    Inventors: Hirofumi Kawaguchi, Akinori Yoneda, Hiroshi Doi
  • Patent number: 8679248
    Abstract: Millimeter-scale GaN single crystals in filamentary form, also known as GaN whiskers, grown from solution and a process for preparing the same at moderate temperatures and near atmospheric pressures are provided. GaN whiskers can be grown from a GaN source in a reaction vessel subjected to a temperature gradient at nitrogen pressure. The GaN source can be formed in situ as part of an exchange reaction or can be preexisting GaN material. The GaN source is dissolved in a solvent and precipitates out of the solution as millimeter-scale single crystal filaments as a result of the applied temperature gradient.
    Type: Grant
    Filed: November 23, 2010
    Date of Patent: March 25, 2014
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Boris N. Feigelson, Jennifer K. Hite, Francis J. Kub, Charles R. Eddy, Jr.
  • Patent number: 8674381
    Abstract: A nitride semiconductor light emitting device is provided with a substrate, an n-type nitride semiconductor layer, a p-type nitride semiconductor layer, an n-side pad electrode, a translucent electrode and a p-side pad electrode, wherein the translucent electrode is formed from an electrically conductive oxide, the n-side pad electrode adjoins the periphery of the translucent electrode and the p-side pad electrode is disposed so as to satisfy the following relationships: 0.3L?X?0.5L and 0.2L?Y?0.5L where X is the distance between ends of the p-side pad electrode and the n-side pad electrode, Y is the distance between the end of the p-side pad electrode and the periphery of the translucent electrode, L is the length of the translucent electrode on the line connecting the centroids of the p-side pad electrode and the n-side pad electrode minus the outer diameter d of the p-side pad electrode.
    Type: Grant
    Filed: January 3, 2011
    Date of Patent: March 18, 2014
    Assignee: Nichia Corporation
    Inventors: Takahiko Sakamoto, Yasutaka Hamaguchi
  • Patent number: 8674337
    Abstract: A light emitting diode (LED) and a method for fabricating the same, capable of improving brightness by forming a InGaN layer having a low concentration of indium, and whose lattice constant is similar to that of an active layer of the LED, is provided. The LED includes: a buffer layer disposed on a sapphire substrate; a GaN layer disposed on the buffer layer; a doped GaN layer disposed on the GaN layer; a GaN layer having indium disposed on the GaN layer; an active layer disposed on the GaN layer having indium; and a P-type GaN disposed on the active layer. Here, an empirical formula of the GaN layer having indium is given by In(x)Ga(1?x)N and a range of x is given by 0<x<2, and a thickness of the GaN layer having indium is 50-200 ?.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: March 18, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventor: Seong Jae Kim
  • Patent number: 8664693
    Abstract: The present invention relates to a light emitting diode having an AlxGa1-xN buffer layer and a method of fabricating the same, and more particularly, to a light emitting diode having an AlxGa1-xN buffer layer, wherein between a substrate and a GaN-based semiconductor layer, the Al x Ga 1-x N (O?x?1) buffer layer having the composition ratio x of Al decreasing from the substrate to the GaN-based semiconductor layer is interposed to reduce lattice mismatch between the substrate and the GaN-based semiconductor layer, and a method of fabricating the same. To this end, the present invention provides a light emitting diode comprising a substrate; a first conductive semiconductor layer positioned on the substrate; and an AlxGa1-xN (O?x?1) buffer layer interposed between the substrate and the first conductive semiconductor layer and having a composition ratio x of Al decreasing from the substrate to the first conductive semiconductor layer.
    Type: Grant
    Filed: March 9, 2007
    Date of Patent: March 4, 2014
    Assignee: Seoul Opto Device Co., Ltd.
    Inventor: Ki Bum Nam
  • Patent number: 8663389
    Abstract: A method and apparatus for depositing III-V material is provided. The apparatus includes a reactor partially enclosed by a selectively permeable membrane 12. A means is provided for generating source vapors, such as a vapor-phase halide of a group III element (IUPAC group 13) within the reactor volume 10, and an additional means is also provided for introducing a vapor-phase hydride of a group V element (IUPAC group 15) into the volume 10. The reaction of the group III halide and the group V hydride on a temperature-controlled substrate 18 within the reactor volume 10 produces crystalline III-V material and hydrogen gas. The hydrogen is preferentially removed from the reactor through the selectively permeable membrane 12, thus avoiding pressure buildup and reaction imbalance. Other gases within the reactor are unable to pass through the selectively permeable membrane.
    Type: Grant
    Filed: May 21, 2011
    Date of Patent: March 4, 2014
    Inventor: Andrew Peter Clarke
  • Patent number: 8648350
    Abstract: Provided is a gallium nitride-based compound semiconductor light-emitting element, in which the concentration of Mg which is a p-type dopant in a p-GaN layer in which the (10-10) m-plane of a hexagonal wurtzite structure grows is adjusted in a range from 1.0×1018 cm?3 to 9.0×1018 cm?3.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: February 11, 2014
    Assignee: Panasonic Corporation
    Inventors: Ryou Kato, Masaki Fujikane, Akira Inoue, Toshiya Yokogawa
  • Patent number: 8637960
    Abstract: A nitride semiconductor substrate is provided in which leak current reduction and improvement in current collapse are effectively attained when using Si single crystal as a base substrate. The nitride semiconductor substrate is such that an active layer of a nitride semiconductor is formed on one principal plane of a Si single crystal substrate through a plurality of buffer layers made of a nitride, in the buffer layers, a carbon concentration of a layer which is in contact with at least the active layer is from 1×1018 to 1×1020 atoms/cm3, a ratio of a screw dislocation density to the total dislocation density is from 0.15 to 0.3 in an interface region between the buffer layer and the active layer, and the total dislocation density in the interface region is 15×109 cm?2 or less.
    Type: Grant
    Filed: October 2, 2012
    Date of Patent: January 28, 2014
    Assignee: Covalent Material Corporation
    Inventors: Yoshihisa Abe, Jun Komiyama, Hiroshi Oishi, Akira Yoshida, Kenichi Eriguchi, Shunichi Suzuki
  • Patent number: 8618571
    Abstract: Disclosed are a semiconductor light emitting device. The semiconductor light emitting device comprises a light emitting structure including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active; an electrode on a first region of the first conductive semiconductor layer; a conductive support member under the light emitting structure; a metal layer between the light emitting structure and the conductive support member; and a reflective layer between the metal layer and the light emitting structure, wherein the metal layer is physically contacted with a lower surface of the reflective layer, wherein the reflective layer includes a first layer and a second layer, wherein the first layer has a different material from the second layer, wherein the metal layer has a protrusion, wherein the first conductive semiconductor layer includes a roughness.
    Type: Grant
    Filed: July 27, 2012
    Date of Patent: December 31, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventor: Hyung Jo Park
  • Patent number: 8613802
    Abstract: Affords nitride semiconductor crystal manufacturing apparatuses that are durable and that are for manufacturing nitride semiconductor crystal in which the immixing of impurities from outside the crucible is kept under control, and makes methods for manufacturing such nitride semiconductor crystal, and the nitride semiconductor crystal itself, available. A nitride semiconductor crystal manufacturing apparatus (100) is furnished with a crucible (101), a heating unit (125), and a covering component (110). The crucible (101) is where, interiorly, source material (17) is disposed. The heating unit (125) is disposed about the outer periphery of the crucible (101), where it heats the crucible (101) interior. The covering component (110) is arranged in between the crucible (101) and the heating unit (125).
    Type: Grant
    Filed: January 20, 2010
    Date of Patent: December 24, 2013
    Assignee: Sumitomo Electric Industies, Ltd.
    Inventors: Issei Satoh, Michimasa Miyanaga, Yoshiyuki Yamamoto, Hideaki Nakahata
  • Patent number: 8610117
    Abstract: A display device capable of keeping the luminance constant irrespective of temperature change is provided as well as a method of driving the display device. A current mirror circuit composed of transistors is placed in each pixel. A first transistor and a second transistor of the current mirror circuit are connected such that the drain current of the first transistor is kept in proportion to the drain current of the second transistor irrespective of the load resistance value. The drain current of the first transistor is controlled by a driving circuit in accordance with a video signal and the drain current of the second transistor is caused to flow into an OLED, thereby controlling the OLED drive current and the luminance of the OLED.
    Type: Grant
    Filed: November 15, 2012
    Date of Patent: December 17, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Jun Koyama
  • Patent number: 8598599
    Abstract: The present invention provides a Group III nitride semiconductor light-emitting device whose main surface is a plane which provides an internal electric field of zero, and which exhibits improved emission performance. The light-emitting device includes a sapphire substrate which has, in a surface thereof, a plurality of dents which are arranged in a stripe pattern as viewed from above; an n-contact layer formed on the dented surface of the sapphire substrate; a light-emitting layer formed on the n-contact layer; an electron blocking layer formed on the light-emitting layer; a p-contact layer formed on the electron blocking layer; a p-electrode; and an n-electrode. The electron blocking layer has a thickness of 2 to 8 nm and is formed of Mg-doped AlGaN having an Al compositional proportion of 20 to 30%.
    Type: Grant
    Filed: March 25, 2011
    Date of Patent: December 3, 2013
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Yoshiki Saito, Koji Okuno, Yasuhisa Ushida
  • Patent number: 8591652
    Abstract: The invention relates to a free-standing semiconductor substrate as well as a process and a mask layer for the manufacture of a free-standing semiconductor substrate, wherein the material for forming the mask layer consists at least partially of tungsten silicide nitride or tungsten silicide and wherein the semiconductor substrate self-separates from the starting substrate without further process steps.
    Type: Grant
    Filed: August 24, 2006
    Date of Patent: November 26, 2013
    Assignee: Freiberger Compound Materials GmbH
    Inventors: Christian Hennig, Markus Weyers, Eberhard Richter, Guenther Traenkle
  • Patent number: 8575593
    Abstract: A semiconductor light emitting device and a fabrication method thereof are provided. The semiconductor light emitting device includes: first and second conductivity-type semiconductor layers; and an active layer disposed between the first and second conductivity-type semiconductor layers and having a structure in which a quantum barrier layer and a quantum well layer are alternately disposed, and the quantum barrier layer includes first and second regions disposed in order of proximity to the first conductivity-type semiconductor layer.
    Type: Grant
    Filed: July 25, 2012
    Date of Patent: November 5, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang Heon Han, Jong Hyun Lee, Jin Young Lim, Dong Ju Lee, Heon Ho Lee, Young Sun Kim, Sung Tae Kim
  • Patent number: 8558264
    Abstract: A light-emitting device includes a first layer, a second layer, and a semiconductor body interposed between the first and second layers, wherein the semiconductor body has a first fine-wall-shape member, a second fine-wall-shape member, and a semiconductor member interposed between the first and second fine-wall-shape members, the first and second fine-wall-shape members have a third layer, a fourth layer, and a fifth layer interposed between the third and fourth layers, the fifth layer is a layer that generates light and guides the light, the third and fourth layers are layers that guide the light generated in the fifth layer, the first and second layers are layers that suppress leakage of the light generated in the fifth layer, and the propagating direction of the light generated in the fifth layer intersects with the first and second fine-wall-shape members.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: October 15, 2013
    Assignee: Seiko Epson Corporation
    Inventor: Masamitsu Mochizuki
  • Patent number: 8548021
    Abstract: Provided is a III-nitride semiconductor laser allowing for provision of a low threshold with use of a semipolar plane. A primary surface 13a of a semiconductor substrate 13 is inclined at an angle of inclination AOFF in the range of not less than 50 degrees and not more than 70 degrees toward the a-axis direction of GaN with respect to a reference plane perpendicular to a reference axis Cx along the c-axis direction of GaN. A first cladding layer 15, an active layer 17, and a second cladding layer 19 are provided on the primary surface 13a of the semiconductor substrate 13. The well layers 23a of the active layer 17 comprise InGaN. A polarization degree P in the LED mode of emission from the active layer of the semiconductor laser that reaches lasing is not less than ?1 and not more than 0.1.
    Type: Grant
    Filed: August 17, 2011
    Date of Patent: October 1, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Kei Fujii, Masaki Ueno, Katsushi Akita, Takashi Kyono, Yusuke Yoshizumi, Takamichi Sumitomo, Yohei Enya
  • Patent number: 8541772
    Abstract: According to one embodiment, a nitride semiconductor stacked structure having a first surface includes a substrate, a first buffer layer, a first crystal layer, a second buffer layer and a second crystal layer. A step portion is provided in the substrate and includes an upper surface, a lower surface, and a side surface between the upper surface and the lower surface. The first buffer layer includes InsAltGa1-s-tN (0?s?0.05, 0?t?1) and covers the lower surface and the side surface. The first crystal layer is provided on the first buffer layer, includes InsAltGa1-s-tN (0?s?0.05, 0?t?0.05), and has an upper surface provided above the upper surface of the substrate. The second buffer layer includes InsAltGa1-s-tN (0?s?0.05, 0?t?1) and continuously covers the upper surface of the first crystal layer and the upper surface of the substrate. The second crystal layer covers the second buffer layer, includes InsAltGa1-s-tN (0?s?0.05, 0?t?0.05), and has the first surface.
    Type: Grant
    Filed: September 1, 2011
    Date of Patent: September 24, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hideto Sugawara
  • Patent number: 8541796
    Abstract: There is provided a nitride semiconductor light emitting device having a light emitting portion coated with a coating film, the light emitting portion being formed of a nitride semiconductor, the coating film in contact with the light emitting portion being formed of an oxynitride film deposited adjacent to the light emitting portion and an oxide film deposited on the oxynitride film. There is also provided a method of fabricating a nitride semiconductor laser device having a cavity with a facet coated with a coating film, including the steps of: providing cleavage to form the facet of the cavity; and coating the facet of the cavity with a coating film formed of an oxynitride film deposited adjacent to the facet of the cavity and an oxide film deposited on the oxynitride film.
    Type: Grant
    Filed: December 14, 2006
    Date of Patent: September 24, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshinobu Kawaguchi, Takeshi Kamikawa
  • Patent number: 8519414
    Abstract: A semiconductor structure includes a substrate and a conductive carrier-tunneling layer over and contacting the substrate. The conductive carrier-tunneling layer includes first group-III nitride (III-nitride) layers having a first bandgap, wherein the first III-nitride layers have a thickness less than about 5 nm; and second III-nitride layers having a second bandgap lower than the first bandgap, wherein the first III-nitride layers and the second III-nitride layers are stacked in an alternating pattern. The semiconductor structure is free from a III-nitride layer between the substrate and the conductive carrier-tunneling layer. The semiconductor structure further includes an active layer over the conductive carrier-tunneling layer.
    Type: Grant
    Filed: September 20, 2011
    Date of Patent: August 27, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Lin Yu, Ding-Yuan Chen, Chen-Hua Yu, Wen-Chih Chiou
  • Patent number: 8519416
    Abstract: A nitride-based semiconductor light-emitting device capable of suppressing reduction of characteristics and a yield and method of fabricating the same is described. The method of fabricating includes the steps of forming a groove portion on a nitride-based semiconductor substrate by selectively removing a prescribed region of a second region of the nitride-based semiconductor substrate other than a first region corresponding to a light-emitting portion of a nitride-based semiconductor layer up to a prescribed depth and forming the nitride-based semiconductor layer having a different composition from the nitride-based semiconductor substrate on the first region and the groove portion of the nitride-based semiconductor substrate.
    Type: Grant
    Filed: October 9, 2009
    Date of Patent: August 27, 2013
    Assignee: Future Light, LLC
    Inventors: Takashi Kano, Masayuki Hata, Yasuhiko Nomura
  • Patent number: 8492776
    Abstract: A semiconductor light emitting device (10) is provided with a base substrate (12) and three LED chips (14A, 14B, and 14C) disposed on the base substrate (12). Each LED chip (14A, 14B, and 14C) includes a semiconductor multilayer structure (20) and has a rhombus shape with interior angles of approximately 60° and approximately 120° in plan view. Each semiconductor multilayer structure (20) has an HCP single crystal structure and includes a light emission layer (24). The LED chips (14A, 14B, and 14C) are arranged on the base substrate (12) so as to face one another at a vertex forming the larger interior angle in plan view. With this arrangement, the LED chips (14A, 14B, and 14C) as a whole form a substantially regular hexagonal shape.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: July 23, 2013
    Assignee: Panasonic Corporation
    Inventor: Hideo Nagai
  • Patent number: 8470626
    Abstract: Exemplary embodiments of the present invention relate to a method of fabricating a light emitting diode (LED). According to an exemplary embodiment of the present invention, the method includes growing a first GaN-based semiconductor layer on a substrate at a first temperature by supplying a chamber with a nitride source gas and a first metal source gas, stopping the supply of the first metal source gas and maintaining the first temperature for a first time period after stopping the supply of the first metal source gas, decreasing the temperature of the substrate to the a second temperature after the first time period elapses, growing an active layer of the first GaN-based semiconductor layer at the second temperature by supplying the chamber with a second metal source gas.
    Type: Grant
    Filed: June 1, 2011
    Date of Patent: June 25, 2013
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Kwang Joong Kim, Chang Suk Han, Seung Kyu Choi, Ki Bum Nam, Nam Yoon Kim, Kyung Hae Kim, Ju Hyung Yoon
  • Patent number: 8449672
    Abstract: This disclosure pertains to a process for making single crystal Group III nitride, particularly gallium nitride, at low pressure and temperature, in the region of the phase diagram of Group III nitride where Group III nitride is thermodynamically stable comprises a charge in the reaction vessel of (a) Group III nitride material as a source, (b) a barrier of solvent interposed between said source of Group III nitride and the deposition site, the solvent being prepared from the lithium nitride (Li3N) combined with barium fluoride (BaF2), or lithium nitride combined with barium fluoride and lithium fluoride (LiF) composition, heating the solvent to render it molten, dissolution of the source of GaN material in the molten solvent and following precipitation of GaN single crystals either self seeded or on the seed, maintaining conditions and then precipitating out.
    Type: Grant
    Filed: April 25, 2008
    Date of Patent: May 28, 2013
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Boris N. Feigelson, Richard L. Henry
  • Patent number: 8445938
    Abstract: The nitride semi-conductive light emitting layer in this invention comprises a single crystal substrate 1 for epitaxial growth, a first buffer layer 2, an n-type nitride semi-conductive layer 3, a second buffer layer 4, a third buffer layer 5, a light emitting layer 6, and a p-type nitride semi-conductive layer 7. The first buffer layer 2 is laminated to a top side of the single crystal substrate 1. The n-type nitride semi-conductive layer 3 is laminated to a top side of the first buffer layer 2. The third buffer layer 5 is laminated to a top side of the n-type nitride semi-conductive layer 3 with the second buffer layer 4 being interposed therebetween. The light emitting layer 6 is laminated to a top side of the third buffer layer 5. The p-type nitride semi-conductive layer 7 is laminated to a top side of the light emitting layer 6.
    Type: Grant
    Filed: March 23, 2009
    Date of Patent: May 21, 2013
    Assignee: Panasonic Corporation
    Inventors: Takayoshi Takano, Kenji Tsubaki, Hideki Hirayama, Sachie Fujikawa
  • Patent number: 8421100
    Abstract: A nitride semiconductor light emitting device is provided. The nitride semiconductor light emitting device includes a first nitride layer comprising at least N-type nitride layer. An insulating member is formed on the first nitride layer having a predetermined pattern. An active layer is formed in both sides of the insulating member on the first nitride layer to emit light. A second nitride layer is formed in both sides of the insulating member on the active layer and the second nitride layer comprises at least a P-type nitride layer.
    Type: Grant
    Filed: March 23, 2010
    Date of Patent: April 16, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventor: Sang Youl Lee
  • Patent number: 8395263
    Abstract: According to one embodiment, a semiconductor light emitting device includes a stacked structural body, a first, a second and a third conductive layer. The stacked structural body includes first and second semiconductors and a light emitting layer provided therebetween. The second semiconductor layer is disposed between the first conductive layer and the light emitting layer. The first conductive layer is transparent. The first conductive layer has a first major surface on a side opposite to the second semiconductor layer. The second conductive layer is in contact with the first major surface. The third conductive layer is in contact with the first major surface and has a reflectance higher than a reflectance of the second conductive layer. The third conductive layer includes an extending part extending in parallel to the first major surface. At least a portion of the extending part is not covered by the second conductive layer.
    Type: Grant
    Filed: February 17, 2011
    Date of Patent: March 12, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Taisuke Sato, Toshiyuki Oka, Koichi Tachibana, Shinya Nunoue
  • Patent number: 8368095
    Abstract: There is provided a nitride semiconductor light emitting device having a light emitting portion coated with a coating film, the light emitting portion being formed of a nitride semiconductor, the coating film in contact with the light emitting portion being formed of an oxynitride. There is also provided a method of fabricating a nitride semiconductor laser device having a cavity with a facet coated with a coating film, including the steps of: providing cleavage to form the facet of the cavity; and coating the facet of the cavity with a coating film formed of an oxynitride.
    Type: Grant
    Filed: December 14, 2006
    Date of Patent: February 5, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Takeshi Kamikawa, Yoshinobu Kawaguchi
  • Patent number: 8367441
    Abstract: Example embodiments herein relate to a nitride semiconductor light emitting device including a coat film formed at a light emitting portion and including an aluminum nitride crystal or an aluminum oxynitride crystal, and a method of manufacturing the nitride semiconductor light emitting device. Also provided is a nitride semiconductor transistor device including a nitride semiconductor layer and a gate insulating film which is in contact with the nitride semiconductor layer and includes an aluminum nitride crystal or an aluminum oxynitride crystal.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: February 5, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Takeshi Kamikawa, Yoshinobu Kawaguchi
  • Patent number: 8357607
    Abstract: A nitride-based semiconductor light-emitting device 100 includes a GaN substrate 10, of which the principal surface is an m-plane 12, a semiconductor multilayer structure 20 that has been formed on the m-plane 12 of the GaN-based substrate 10, and an electrode 30 arranged on the semiconductor multilayer structure 20. The electrode 30 includes an Mg alloy layer 32 which is formed of Mg and a metal selected from a group consisting of Pt, Mo, and Pd. The Mg alloy layer 32 is in contact with a surface of a p-type semiconductor region of the semiconductor multilayer structure 20.
    Type: Grant
    Filed: March 9, 2010
    Date of Patent: January 22, 2013
    Assignee: Panasonic Corporation
    Inventors: Mitsuaki Oya, Toshiya Yokogawa, Atsushi Yamada, Ryou Kato
  • Publication number: 20130015477
    Abstract: A nanostructured light-emitting device including: a first type semiconductor layer; a plurality of nanostructures each including a first type semiconductor nano-core grown in a three-dimensional (3D) shape on the first type semiconductor layer, an active layer formed to surround a surface of the first type semiconductor nano-core, and a second type semiconductor layer formed to surround a surface of the active layer and including indium (In); and at least one flat structure layer including a flat-active layer and a flat-second type semiconductor layer that are sequentially formed on the first type semiconductor layer parallel to the first type semiconductor layer.
    Type: Application
    Filed: February 10, 2012
    Publication date: January 17, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Joo-sung KIM, Taek KIM, Moon-seung YANG
  • Publication number: 20130009202
    Abstract: A group-III nitride semiconductor device includes a light emitting layer emitting light of a wavelength in the range of 480 to 600 nm; a first contact layer over the light emitting layer; a second contact layer in direct contact with the first contact layer; and a metal electrode in direct contact with the second contact layer. The first and second contact layers comprise a p-type gallium nitride-based semiconductor. The p-type dopant concentration of the first contact layer is lower than that of the second contact layer. The light emitting layer comprises a gallium nitride-based semiconductor. The interface between the first and second contact layers tilts at an angle of not less than 50 degrees and smaller than 130 degrees from a plane orthogonal to a reference axis extending along the c-axis. The second contact layer has a thickness within the range of 1 to 50 nm.
    Type: Application
    Filed: June 29, 2012
    Publication date: January 10, 2013
    Applicants: SONY CORPORATION, SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yohei ENYA, Yusuke YOSHIZUMI, Takashi KYONO, Takamichi SUMITOMO, Masaki UENO, Katsunori YANASHIMA, Kunihiko TASAI, Hiroshi NAKAJIMA
  • Patent number: 8344356
    Abstract: A semiconductor material is provided comprising: a composition graded layer, formed on a Si substrate or an interlayer formed thereon, comprising a composition of AlXGa1-XN graded such that a content ratio of Al in the composition decreases continuously or discontinuously in a crystal growing direction; a superlattice composite layer, formed on the composition graded layer, comprising a high Al-containing layer comprising a composition of AlYGa1-YN and a low Al-containing layer comprising a composition of AlZGa1-ZN that are laminated alternately; and a nitride semiconductor layer formed on the superlattice composite layer.
    Type: Grant
    Filed: December 17, 2008
    Date of Patent: January 1, 2013
    Assignees: Dowa Electronics Materials Co., Ltd., National University Corporation Nagoya Institute of Technology
    Inventors: Ryo Sakamoto, Jo Shimizu, Tsuneo Ito, Takashi Egawa
  • Patent number: 8334199
    Abstract: A nitride-based semiconductor light-emitting device 100 includes: a GaN substrate 10 with an m-plane surface 12; a semiconductor multilayer structure 20 provided on the m-plane surface 12 of the GaN substrate 10; and an electrode 30 provided on the semiconductor multilayer structure 20. The electrode 30 includes a Zn layer 32 and an Ag layer 34 provided on the Zn layer 32. The Zn layer 32 is in contact with a surface of a p-type semiconductor region of the semiconductor multilayer structure 20.
    Type: Grant
    Filed: March 17, 2010
    Date of Patent: December 18, 2012
    Assignee: Panasonic Corporation
    Inventors: Mitsuaki Oya, Toshiya Yokogawa, Atsushi Yamada, Akihiro Isozaki
  • Patent number: 8319235
    Abstract: A nitride semiconductor light-emitting device including a coating film and a reflectance control film successively formed on a light-emitting portion, in which the light-emitting portion is formed of a nitride semiconductor, the coating film is formed of an aluminum oxynitride film or an aluminum nitride film, and the reflectance control film is formed of an oxide film, as well as a method of manufacturing the nitride semiconductor light-emitting device are provided.
    Type: Grant
    Filed: April 23, 2007
    Date of Patent: November 27, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Takeshi Kamikawa, Yoshinobu Kawaguchi