Abstract: An integrated circuit includes a doped region having a first conductivity type formed in a semiconductor substrate having a second conductivity type. A dielectric layer is located between the doped region and a surface plane of the semiconductor substrate, and a polysilicon layer is located over the dielectric layer. First, second, third and fourth terminals are connected to the doped region, the first and third terminals defining a conductive path through the doped region and the second and fourth terminals defining a second conductive path through the doped region, the second path intersecting the first path.

Abstract: A technique for an AMR-based sensing circuit allows current measurements over a wide frequency range. This is accomplished by folding the current carrying trace around the AMR sensor to concentrate and normalize the magnetic field generated by the current over a wide frequency range. Experimental results show that the sensor, when implemented with the proposed method, has an improved bandwidth of >10 MHz and enhanced sensitivity to high frequency currents evinced by the sensor output at DC or lower frequencies. The method is applicable for example in high frequency power converters where inductor current is used to control the ripple and transient response.

Abstract: A current sensor IC includes a unitary lead frame having a primary conductor with a first thickness and a secondary lead having a second thickness less than the first thickness. A semiconductor die adjacent to the primary conductor includes a magnetic field sensing circuit to sense a magnetic field associated with the current and generate a secondary signal indicative of the current. An insulation structure is disposed between the primary conductor and the die. A mold material encloses a first portion of the secondary lead and a second portion of the secondary lead that is exposed outside of the package has the second thickness.

Abstract: A magnetoresistive element includes a reference layer having a fixed magnetization direction and including a ferromagnetic material containing Fe or Co, a recording layer having a variable magnetization direction and including a ferromagnetic material, and one non-magnetic layer that is formed between the reference layer and the recording layer and that contains oxygen. One of the reference layer and the recording layer contains Fe. The three layers are arranged so that a magnetization direction of the one of the reference layer and the recording layer becomes perpendicular to a layer surface by an interfacial perpendicular magnetic anisotropy at an interface between the one of the reference layer and the recording layer and the one non-magnetic layer resulting from the one of the reference layer and the recording layer having a predetermined thickness. The one of the reference layer and the recording layer has a bcc structure.

Abstract: A Hall sensor having a ball portion on a magnetosensitive portion is provided. A Hall sensor is provided, including: a substrate; a magnetosensitive portion formed on the substrate; an insulating film formed on the magnetosensitive portion; an electrode portion formed on the insulating film; and a ball portion which is provided on the electrode portion and is electrically connected to the electrode portion, wherein in plan view, a projection area of the ball portion accounts for 10% or more of a projection area of the magnetosensitive portion. The projection area of the ball portion may account for 20% or more of the projection area of the magnetosensitive portion. A bonding wire which is electrically connected to the ball portion and is extended from the ball portion in a direction perpendicular to an upper surface of the electrode portion may be further included.

Abstract: The concepts, systems, circuits and techniques described herein are directed toward sensing a voltage transient within a magnetic field sensor integrated circuit, such as a current sensor. A magnetic field sensor integrated circuit includes a substrate having a first surface and a second opposing surface, at least one magnetic field sensing element supported by a first surface of the substrate, an electromagnetic shield layer disposed on a shielded region of the first surface of the substrate adjacent to an unshielded region of the first surface of the substrate and an electrode disposed in the unshielded region of the first surface of the substrate and configured to permit detection of the voltage transient. In some embodiments, the shielded region and/or the electrode can be omitted.

Abstract: The magnetic sensor includes a semiconductor substrate having Hall elements on a front surface of the semiconductor substrate, a conductive layer formed on a back surface of the semiconductor substrate, and a magnetic flux converging plate formed on the conductive layer. The magnetic flux converging plate is formed on the back surface of the semiconductor substrate through formation of the base conductive layer on the back surface of the semiconductor substrate, formation of a resist on the base conductive layer having an opening for forming the magnetic flux converging plate, formation of the magnetic flux converging plate in the opening of the resist by electroplating, removal of the resist, and removal of a part of the base conductive layer by etching with the magnetic flux converging plate as a mask.

Abstract: An apparatus includes a substrate, a sequence of crystalline semiconductor layers on a planar surface of the substrate, and first and second sets of electrodes over the sequence. The sequence has a 2D quantum well therein. The first set of electrodes border opposite sides of a lateral region of the sequence and are controllable to vary a width of a non-depleted portion of the quantum well along the top surface. The second set of electrodes border channels between the lateral region and first and second adjacent lateral areas of the sequence and are controllable to vary widths of non-depleted segments of the quantum well in the channels. The electrodes are such that straight lines connecting the lateral areas via the channels either pass between one of the electrodes and the substrate or are misaligned to an effective [1 1 0] lattice direction of the sequence.

Abstract: A magnetic field sensor includes a circular vertical Hall (CVH) sensing element and at least one planar Hall element. The CVH sensing element has contacts arranged over a common implant region in a substrate. In some embodiments, the at least one planar Hall element is formed as a circular planar Hall (CPH) sensing element also having contacts disposed over the common implant region. A CPH sensing element and a method of fabricating the CPH sensing element are separately described.

Abstract: A Hall effect transducer in a semiconductor wafer comprises a first layer of semiconducting material, a second layer of semiconducting material, and a contact structure configured to provide a path for electrical current to pass through the second layer. The second layer has higher electron hole mobility than the first layer, and is epitaxially grown atop the first layer.

Abstract: Magnetoresistive structures, devices, memories, and methods for forming the same are presented. For example, a magnetoresistive structure includes a first ferromagnetic layer, a first nonmagnetic spacer layer proximate to the first ferromagnetic layer, a second ferromagnetic layer proximate to the first nonmagnetic spacer layer, and a first antiferromagnetic layer proximate to the second ferromagnetic layer. For example, the first ferromagnetic layer may comprise a first pinned ferromagnetic layer, the second ferromagnetic layer may comprise a free ferromagnetic layer, and the first antiferromagnetic layer may comprise a free antiferromagnetic layer.

Abstract: A method of forming a magnetic tunnel junction device is disclosed that includes forming a trench in a substrate, the trench including a first sidewall, a second sidewall, a third sidewall, a fourth sidewall, and a bottom wall. The method includes depositing a first conductive material within the trench proximate to the first sidewall and depositing a second conductive material within the trench. The method further includes depositing a magnetic tunnel junction (MTJ) structure within the trench. The MTJ structure includes a fixed magnetic layer having a magnetic field with a fixed magnetic orientation, a tunnel junction layer, and a free magnetic layer having a magnetic field with a configurable magnetic orientation. The method further includes selectively removing a portion of the MTJ structure that is adjacent to the fourth sidewall to create an opening such that the MTJ structure is substantially u-shaped.

Abstract: A semiconductor device includes a Hall element, which is switched between a first and second mode. In the first mode, connection A between a first and second resistor and connection C between a third and fourth resistor are set to Vcc or GND. Connection D between the first and fourth resistor and connection B between the second and third resistor are set as output terminals. In the second mode, D and B are set to Vcc or GND and A and C are set as output terminals. When a first line placed along the second resistor and connected to A is set at Vcc in the first mode, a second line placed along the fourth resistor and connected to D is set at Vcc in the second mode. When the first line is set at GND in first mode, the second line is set at GND in the second mode.

Abstract: A vertical Hall device includes a Hall effect region formed in a substrate and a sequence of at least six contacts arranged in or at a surface of the Hall effect region between a first contact and a last contact. The vertical Hall device also includes a first contact interconnection connecting the first contact with a third to the last contact. A vertical Hall device further includes a second contact interconnection connecting a third contact with the last contact. Further embodiments made to a sensing method for sensing a magnetic field parallel to a surface of a substrate.

Abstract: Embodiments of the present invention provide a Hall effect device that includes a Hall effect region of a first semiconductive type, at least three contacts and a lateral conductive structure. The Hall effect region is formed in or on top of a substrate, wherein the substrate includes an isolation arrangement to isolate the Hall effect region in a lateral direction and in a depth direction from the substrate or other electronic devices in the substrate. The at least three contacts are arranged at a top of the Hall effect region to supply the Hall effect device with electric energy and to provide a Hall effect signal indicative of the magnetic field, wherein the Hall effect signal is generated in a portion of the Hall effect region defined by the at least three contacts. The lateral conductive structure is located between the Hall effect region and the isolation arrangement.

Abstract: A new devices structure of nano tunneling field effect transistor based on nano metal particles is introduced. The nano semiconductor device, comprising a source and a drain, wherein each of the source and drain comprise an implanted nano cluster of metal atoms, wherein the implanted nano cluster of metal atoms forming the source has an average radius in the range from about 1 to about 2 nanometers, and the implanted nano cluster of metal atoms forming the drain has an average radius in the range from about 2 to about 4 nanometers. Processes for producing the nano semiconductor device are detailed.

Abstract: The invention relates to a vertical Hall sensor integrated in a semiconductor chip and a method for the production thereof. The vertical Hall sensor has an electrically conductive well of a first conductivity type, which is embedded in an electrically conductive region of a second conductivity type. The electrical contacts are arranged along a straight line on a planar surface of the electrically conductive well. The electrically conductive well is generated by means of high-energy ion implantation and subsequent heating, so that it has a doping profile which either has a maximum which is located at a depth T1 from the planar surface of the electrically conductive well, or is essentially constant up to a depth T2.

Abstract: This invention relates is a Hall effect transformer, which include: Hall effect device, insulation layer and semiconductor, place the insulator layer between the Hall effect device and semiconductor used as an isolated, when AC current flow through the AC capacitors and Hall effect device, semiconductor corresponds to get both terminals of the AC voltage, and AC power transmission purposes.

Abstract: A Hall sensor has a P-type semiconductor substrate and a Hall sensing portion having a square shape and an N-type conductivity disposed on a surface of the semiconductor substrate. The Hall sensor includes Hall voltage output terminals having the same shape with each other, and control current input terminals having the same shape with each other. The Hall voltage output terminals are disposed at respective ones of four vertices of the Hall sensing portion. The control current input terminals include pairs of control current input terminals disposed at respective ones of the four vertices of the Hall sensing portion and arranged on both sides of respective ones of the Hall voltage output terminals in spaced apart relation from the Hall voltage output terminals so as to prevent electrical connection between the control current input terminals and the Hall voltage output terminals.

Abstract: Through a main surface (10) of a semiconductor substrate (1) of a first type of conductivity, a doped well of a second type of conductivity is implanted to form a sensor region (3) extending perpendicularly to the main surface. The sensor region can be confined laterally by trenches (5) comprising an electrically insulating trench filling (6). The bottom of the sensor region is insulated by a pn-junction (20). Contacts (4) are applied to the main surface and provided for the application of an operation voltage and the measurement of a Hall voltage.

Abstract: A Hall effect element includes a Hall plate having geometric features selected to result in a highest ratio of a sensitivity divided by a plate resistance. The resulting shape is a so-called “wide-cross” shape.

Abstract: Structures include a tunneling device disposed over first and second lattice-mismatched semiconductor materials. Process embodiments include forming tunneling devices over lattice-mismatched materials.

Abstract: An apparatus includes a substrate with a planar surface, a multilayer of semiconductor layers located on the planar surface, a plurality of electrodes located over the multilayer, and a dielectric layer located between the electrodes and the multilayer. The multilayer includes a 2D quantum well. A first set of the electrodes is located to substantially surround a lateral area of the 2D quantum well. A second set of the electrodes is controllable to vary a lateral width of a non-depleted channel between the substantially surrounded lateral area of the 2D quantum well and another area of the 2D quantum well. A third set of the electrodes is controllable to vary an area of a non-depleted portion of the lateral area.

Abstract: The inventive ferromagnetic semiconductor comprises at least one magnetic element selected from the group consisting of Mn, Fe, Co, Ni and Cr, and has a Curie temperature which is equal to or higher than 350 K, and advantageously 400 K or higher. The semiconductor has a matrix which is depleted in magnetic element(s) and contains a discontinuous phase which is formed from columns, enriched with magnetic elements, and is ferromagnetic up to said Curie temperature, in such a way as to generate a lateral modulation of the composition of the semiconductor in the plane of the thin layer. Also disclosed is a method for the production of the semiconductor, a diode-type electronic component for the injection or collection of spins into or from another semiconductor respectively, or an electronic component which is sensitive to a magnetic field, and uses of the semiconductor relating to such a component.

Abstract: A channel layer is deposited on a first impurity layer, a second impurity layer is deposited on the channel layer, a gate electrode is placed to surround a circumference of the channel layer with a gate insulating film interposed therebetween, a spin-injection magnetization-reversal element is deposited on the second impurity layer, a bit line is placed on the spin-injection magnetization-reversal element, and a word line is placed on the bit line to be electrically connected to the gate electrode.

Abstract: The invention relates to a vertical Hall sensor integrated in a semiconductor chip and a method for the production thereof. The vertical Hall sensor has an electrically conductive well of a first conductivity type, which is embedded in an electrically conductive region of a second conductivity type. The electrical contacts are arranged along a straight line on a planar surface of the electrically conductive well. The electrically conductive well is generated by means of high-energy ion implantation and subsequent heating, so that it has a doping profile which either has a maximum which is located at a depth T1 from the planar surface of the electrically conductive well, or is essentially constant up to a depth T2.

Abstract: A device for increasing the magnetic flux density includes a semiconductor body and a first magnetic sensor integrated into the semiconductor body, whereby a housing section, which forms a cavity, is arranged above the sensor on the semiconductor surface and the cavity is filled with a ferromagnetic material and the material comprises a liquid.

Abstract: The invention provides a Hall sensor element having a substrate, which has a main surface, having an electrically conductive active region, which extends from the main surface into the substrate, and having a first electrically conductive, buried layer in the substrate, which contacts the active region at a first lower contact surface. From another standpoint, the invention provides a method for measuring a magnetic field with the aid of such a Hall sensor element, in which an electrical measuring current is conducted through the active region between a first upper contact electrode at the main surface and the first lower contact surface. A Hall voltage is picked up in the active region along a path running inclined with respect to a connecting line between the first lower contact surface and the first upper contact electrode.

Abstract: A spin transistor includes a semiconductor substrate including a channel layer having a 2-dimensional electron gas structure and upper and lower cladding layers disposed respectively in upper and lower sides of the channel layer; ferromagnetic source and drain electrodes formed on the semiconductor substrate and disposed spaced apart from each other; a gate electrode disposed between the source electrode and the drain electrode and having a gate voltage applied thereto in order to control the spin of electrons passed through the channel layer; a first carrier supply layer disposed between the lower cladding layer and the channel layer to supply carriers to the channel layer; and a second carrier supply layer disposed between the upper cladding layer and the channel layer to supply carriers to the channel layer.

Abstract: An integrated circuit and a method of making the integrated circuit provide a Hall effect element having a germanium Hall plate. The germanium Hall plate provides an increased electron mobility compared with silicon, and therefore, a more sensitive Hall effect element.

Abstract: A Hall effect transducer in a semiconductor wafer comprises a first layer of semiconducting material, a second layer of semiconducting material, and a contact structure configured to provide a path for electrical current to pass through the second layer. The second layer has higher electron hole mobility than the first layer, and is epitaxially grown atop the first layer.

Abstract: An apparatus includes a substrate with a planar surface, a multilayer of semiconductor layers located on the planar surface, a plurality of electrodes located over the multilayer, and a dielectric layer located between the electrodes and the multilayer. The multilayer includes a 2D quantum well. A first set of the electrodes is located to substantially surround a lateral area of the 2D quantum well. A second set of the electrodes is controllable to vary a lateral width of a non-depleted channel between the substantially surrounded lateral area of the 2D quantum well and another area of the 2D quantum well. A third set of the electrodes is controllable to vary an area of a non-depleted portion of the lateral area.

Abstract: A multi-level lithography processes for the fabrication of suspended structures are presented. The process is based on the differential exposure and developing conditions of several a plurality of resist layers, without harsher processes, such as etching of sacrificial layers or the use of hardmasks. These manufacturing processes are readily suited for use with systems that are chemically and/or mechanically sensitive, such as graphene. Graphene p-n-p junctions with suspended top gates formed through these processes exhibit high mobility and control of local doping density and type. This fabrication technique may be further extended to fabricate other types of suspended structures, such as local current carrying wires for inducing local magnetic fields, a point contact for local injection of current, and moving parts in microelectromechanical devices.

Abstract: The thermoelectric conversion efficiency of a thermoelectric conversion device is increased by increasing the figure of merit of a spin-Seebeck effect element. An inverse spin-Hall effect material is provided to at least one end of a thermal spin-wave spin current generating material made of a magnetic dielectric material so that a thermal spin-wave spin current is converted to generate a voltage in the above described inverse spin-Hall effect material when there is a temperature gradient in the above described thermal spin-wave spin current generating material and a magnetic field is applied using a magnetic field applying means.

Abstract: A semiconductor device includes a housing defining a cavity, a magnetic sensor chip disposed in the cavity, and mold material covering the magnetic sensor chip and substantially filling the cavity. One of the housing or the mold material is ferromagnetic, and the other one of the housing or the mold material is non-ferromagnetic.

Abstract: An implementation of a single qubit phase gate for use in a quantum information processing scheme based on the ?=5/2 fractional quantum Hall (FQH) state is disclosed. Using sack geometry, a qubit consisting of two ?-quasiparticles. which may be isolated on respective antidots, may be separated by a constriction from the bulk of a two-dimensional electron gas in the ?=5/2 FQH state. An edge quasiparticle may induce a phase gate on the qubit. The number of quasiparticles that are allowed to traverse the edge path defines which gate is induced. For example, if a certain number of quasiparticles are allowed to traverse the path, then a ?/8 gate may be effected.

Abstract: Through a main surface (10) of a semiconductor substrate (1) of a first type of conductivity, a doped well of a second type of conductivity is implanted to form a sensor region (3) extending perpendicularly to the main surface. The sensor region can be confined laterally by trenches (5) comprising an electrically insulating trench filling (6). The bottom of the sensor region is insulated by a pn-junction (20). Contacts (4) are applied to the main surface and provided for the application of an operation voltage and the measurement of a Hall voltage.

Abstract: A Hall element is provided which has a high sensitivity and contributes to an improvement in S/N ratio per current by using a low-concentration n-well within a suitable range. The Hall element includes a p-type semiconductor substrate layer 21 of p-type silicon, and an n-type impurity region 22 located in a surface of the p-type semiconductor substrate layer 21, the n-type impurity region 22 functioning as a magnetic sensing part 26. A p-type impurity region 23 is located in a surface of the n-type impurity region 22, and n-type regions 24 are located laterally of the p-type impurity region 23. A p-type substrate region 21a having a resistivity equal to that of the p-type semiconductor substrate layer 21 is located to extend around the n-type impurity region 22. An impurity concentration N in the n-type impurity region 22 functioning as the magnetic sensing part 26 is preferably from 1×1016 to 3×1016 (atoms/cm3), and a distribution depth D of the impurity concentration is preferably from 3.0 ?m to 5.0 ?m.

Abstract: An apparatus includes a substrate with a planar surface, a multilayer of semiconductor layers located on the planar surface, a plurality of electrodes located over the multilayer, and a dielectric layer located between the electrodes and the multilayer. The multilayer includes a 2D quantum well. A first set of the electrodes is located to substantially surround a lateral area of the 2D quantum well. A second set of the electrodes is controllable to vary a lateral width of a non-depleted channel between the substantially surrounded lateral area of the 2D quantum well and another area of the 2D quantum well. A third set of the electrodes is controllable to vary an area of a non-depleted portion of the lateral area.

Abstract: A vertical Hall sensor which is integrated in a semiconductor chip has at least 6 electric contacts which are arranged along a straight line on the surface of the semiconductor chip. The electric contacts are wired according to a predetermined rule, namely such that when the contacts are numbered through continuously and repeatedly with the numerals 1, 2, 3 and 4 starting from one of the two outermost contacts, the contacts to which the same numeral is assigned are electrically connected with each other.

Abstract: A channel layer is deposited on a first impurity layer, a second impurity layer is deposited on the channel layer, a gate electrode is placed to surround a circumference of the channel layer with a gate insulating film interposed therebetween, a spin-injection magnetization-reversal element is deposited on the second impurity layer, a bit line is placed on the spin-injection magnetization-reversal element, and a word line is placed on the bit line to be electrically connected to the gate electrode.

Abstract: A method of detecting spin polarization in a subject material comprises applying a potential difference across the subject material causing an electrical current to flow across the material, thereby inducing carrier polarization within the material in a direction perpendicular to the direction of current flow, carriers of one spin orientation concentrating at a first edge of the subject material and carriers of the opposite orientation concentrating at a second edge of the material, opposite to the first edge under the action of the Spin Hall Effect (SHE); allowing spin polarized carriers to tunnel into a ferromagnetic material from the subject material in at least a portion adjacent one of the first or second edges of the subject material; and measuring the tunneling magnetoresistance (TMR) between the ferromagnetic material and the subject material at the first or second edge.

Abstract: A driving circuit includes a power supply, an input capacitor, a Hall sensor, a first amplifier, a second amplifier, a full-bridge driver circuit, and a first operational amplifier. The input capacitor is coupled to the power supply. The input end of the first amplifier and the second amplifier is coupled to the output end of the Hall sensor. The control end of the full-bridge driver circuit is coupled to the output end of the first amplifier and the output end of the second amplifier. The first operational amplifier includes a first input end for receiving a first reference voltage and a second input end coupled to the first output end of the full-bridge driver circuit.

Abstract: An integrated circuit current sensor includes a lead frame having at least two leads coupled to provide a current conductor portion, and a substrate having a first surface in which is disposed one or more magnetic field sensing elements, with the first surface being proximate to the current conductor portion and a second surface distal from the current conductor position. In one particular embodiment, the substrate is disposed having the first surface of the substrate above the current conductor portion and the second surface of the substrate above the first surface. In this particular embodiment, the substrate is oriented upside-down in the integrated circuit in a flip-chap arrangement. The current sensor can also include an electromagnetic shield disposed between the current conductor portion and the magnetic field sensing elements.

Abstract: The inventive ferromagnetic semiconductor comprises at least one magnetic element selected from the group consisting of Mn, Fe, Co, Ni and Cr, and has a Curie temperature which is equal to or higher than 350 K, and advantageously 400 K or higher. The semiconductor has a matrix which is depleted in magnetic element(s) and contains a discontinuous phase which is formed from columns, enriched with magnetic elements, and is ferromagnetic up to said Curie temperature, in such a way as to generate a lateral modulation of the composition of the semiconductor in the plane of the thin layer. Also disclosed is a method for the production of the semiconductor, a diode-type electronic component for the injection or collection of spins into or from another semiconductor respectively, or an electronic component which is sensitive to a magnetic field, and uses of the semiconductor relating to such a component.

Abstract: A multi-level lithography processes for the fabrication of suspended structures are presented. The process is based on the differential exposure and developing conditions of several a plurality of resist layers, without harsher processes, such as etching of sacrificial layers or the use of hardmasks. These manufacturing processes are readily suited for use with systems that are chemically and/or mechanically sensitive, such as graphene. Graphene p-n-p junctions with suspended top gates formed through these processes exhibit high mobility and control of local doping density and type. This fabrication technique may be further extended to fabricate other types of suspended structures, such as local current carrying wires for inducing local magnetic fields, a point contact for local injection of current, and moving parts in microelectromechanical devices.

Abstract: Measurement-only topological quantum computation using both projective and interferometrical measurement of topological charge is described. Various issues that would arise when realizing it in fractional quantum Hall systems are discussed.

Abstract: This application relates to a semiconductor sensor comprising a carrier that comprises a first surface and a second surface; a sensor chip attached to the first surface; attachment means on the second surface; and mould material applied over the sensor chip and the attachment means.

Abstract: Hall device is provided by enabling stable provision of a quantum well compound semiconductor stacked structure. It has first and second compound semiconductor layers composed of Sb and at least two of five elements of Al, Ga, In, As and P, and an active layer composed of InxGa1-xAsySb1-y (0.8?x?1.0, 0.8?y?1.0), which are stacked. Compared with the active layer, the first and second compound semiconductor layers each have a wider band gap, and a resistance value five times or more greater. The lattice constant differences between the active layer and the first and second compound semiconductor layers are each designed in a range of 0.0-1.2%, and the thickness of the active layer is designed in a range of 30-100 nm.

Abstract: A Hall device of the present invention includes a cross-shaped magnetometric sensing surface, a pair of power terminal portions and a pair of output terminal portions. The surface is formed of a rectangular and mutually opposed extensions provided on each side of the rectangular. The pair of power terminal portions is provided on a pair of the opposed extensions at the surface. The pair of output terminal portions is provided on another pair of the opposed extensions at the surface. Slits extending in each opposed direction completely split the power portions and the output portions and in partway split each extension at the surface, and each of the slits is provided with a separation layer of an insulator. An outline formed of the surface, the power portions and the output portions is quadrature-symmetrical with the center. The Hall device of this structure is highly sensitive to a magnetic field.