Multipart-conductor Current Equalization Patents (Class 307/148)
  • Patent number: 11973015
    Abstract: The present invention is directed to provide a semiconductor module capable of achieving miniaturization and reduced manufacturing cost while suppressing surge voltage generated when switching the semiconductor elements. A semiconductor module includes a negative terminal and a positive terminal. The negative terminal has a negative fastening portion for fastening a negative polarity-side external terminal, a negative connection portion connected to a laminated substrate, and a negative intermediate portion arranged between the negative fastening portion and the negative connection portion. The positive terminal has a positive fastening portion for fastening a positive polarity-side external terminal, positive connection portions connected to the laminated substrate, and a positive intermediate portion facing the negative intermediate portion with a predetermined gap and arranged between the positive fastening portion and the positive connection portions.
    Type: Grant
    Filed: June 16, 2021
    Date of Patent: April 30, 2024
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Masashi Hoya
  • Patent number: 10396033
    Abstract: Methods and apparatuses for efficiently providing supply voltages to a load circuit are provided. The apparatus includes a first plurality of first power buses extending in a first direction and within a first range. The first range extends in a second direction. A second plurality of first power buses extends in the first direction and within the first range. The first plurality of first power buses and the second plurality of first power buses are powered at a first supply voltage. A plurality of second power buses extends in the first direction within the first range and a second range. The second range extends in the first direction. The plurality of second power buses is powered at a second supply voltage. The first plurality of first power buses, the second plurality of first power buses, and the plurality of second power buses are in a conductive layer.
    Type: Grant
    Filed: July 23, 2018
    Date of Patent: August 27, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Paras Gupta, Aklesh Jain, Kelageri Nagaraj, V Karthik Venkataraman
  • Patent number: 10135355
    Abstract: Power inverter assemblies are provided herein for use with motor vehicles. An inverter assembly may have a symmetrical structure configured to convert DC input power to AC output power. The inverter assembly may include a housing enclosing a symmetrical DC input portion, a symmetrical AC output portion, a DC link capacitor, and a gate drive portion having a pair of power modules. The symmetrical DC input portion can include a DC input bus bar sub-assembly to which the DC link capacitor is coupled, and a second DC bus bar sub-assembly that may electrically couple the DC link capacitor with the power modules. The symmetrical AC output portion may include a three phase output AC bus bar sub-assembly to which the power modules can be electrically coupled. A cooling sub-assembly may be provided for cooling the power modules with fluid transfer using a coolant.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: November 20, 2018
    Assignee: FARADAY&FUTURE INC.
    Inventors: Young Mok Doo, Steven E. Schulz, Silva Hiti
  • Patent number: 8839509
    Abstract: Multiple high-voltage side and low-voltage side electric conductors are formed from one sheet of a conductive plate in such a way that the multiple electric conductors are arranged in parallel to one another across an initial gap between the high-voltage side and the low-voltage side electric conductors. The multiple electric conductors are connected to one another via connecting portions. An intermediate portion of the connecting portion is deformed so as to reduce the initial gap to a smaller adjusted gap. Portions of the electric conductors as well as switching devices mounted to the electric conductors are sealed by sealing material. The connecting portions are cut away so that the electric conductors are finally separated from one another.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: September 23, 2014
    Assignee: DENSO CORPORATION
    Inventors: Noriyuki Kakimoto, Masao Yamada
  • Patent number: 8138637
    Abstract: An electrical energy transmission device has phase conductors, which carry alternating current and have transfer impedance, and sheathed conductors, which are inductively coupled to the phase conductors. A first end and a second end of each sheathed conductor form a sheath circuit with a reactance. An electronic assembly for changing the impedance of the sheath circuit is provided. The electrical energy transmission device can be used flexibly given different demands placed on the energy transmission. The electronic assembly is also configured to increase the transfer impedance.
    Type: Grant
    Filed: December 7, 2005
    Date of Patent: March 20, 2012
    Assignee: Siemens Aktiengesellschaft
    Inventors: Gerhard Herold, Lutz Kirschner, Hermann Koch, Dietmar Retzmann
  • Patent number: 7859844
    Abstract: An energy storage pack cooling system including upper and lower respective terminal heat sinks thermally connected to respective upper and lower terminals of energy storage cells above and below upper and lower ends of an enclosure of an energy storage cell pack; and a blower and cooling assembly that circulates a heat transfer fluid past the upper and lower respective terminal heat sinks outside of the enclosure to cool the energy storage cells without circulating the heat transfer fluid past energy storage cell bodies of the energy storage cells enclosed within the enclosure.
    Type: Grant
    Filed: June 29, 2010
    Date of Patent: December 28, 2010
    Assignee: ISE Corporation
    Inventors: Vinh-duy Nguyen, Alexander J. Smith, Kevin T. Stone, Alfonso O. Medina
  • Patent number: 7764496
    Abstract: An energy storage pack cooling system including upper and lower respective terminal heat sinks thermally connected to respective upper and lower terminals of energy storage cells above and below upper and lower ends of an enclosure of an energy storage cell pack; and a blower and cooling assembly that circulates a heat transfer fluid past the upper and lower respective terminal heat sinks outside of the enclosure to cool the energy storage cells without circulating the heat transfer fluid past energy storage cell bodies of the energy storage cells enclosed within the enclosure.
    Type: Grant
    Filed: December 24, 2008
    Date of Patent: July 27, 2010
    Assignee: ISE Corporation
    Inventors: Vinh-duy Nguyen, Alexander J. Smith, Kevin T. Stone, Alfonso O. Medina
  • Patent number: 6795324
    Abstract: A power converter is disclosed, in which the sum of the length of that portion of a control signal line which is in opposite relation to an area of a main circuit wiring where a main circuit current flows and a plurality of tabular conductors are in superposed relation with each other, the length of that portion of the control signal line which is in opposite relation to an area of the main circuit wiring where the main circuit current does not flow and the length of that portion of the control signal line which is located outside an end of the main circuit wiring, is substantially equal to the total wiring length of the signal control line.
    Type: Grant
    Filed: March 19, 2002
    Date of Patent: September 21, 2004
    Assignees: Hitachi, Ltd., Hitachi Building Systems Co., Ltd.
    Inventors: Kazuhisa Mori, Takashi Ikimi, Satoshi Fukuda, Takao Kishikawa, Tomoharu Sakoda
  • Patent number: 6700226
    Abstract: A transistor includes a substrate region (14) of a first type (P) of conductivity in a semiconductor material layer of the same type (P) of conductivity, at least a first contact region (13) of the first type (P+) of conductivity inside the substrate region (14) and adjacent to a first terminal (C) of the transistor, a well (11) of second type (N) of conductivity placed inside the substrate region (14), wherein the well (11) of second type (N) of conductivity includes at least a second contact region (12) of a second type of conductivity (N+) adjacent to a region of a second terminal (B) of the transistor, and a plurality of third contact regions (10) of the first type of conductivity (P+) adjacent to a plurality of regions of a third terminal (E1, . . . , E3) of the transistor interposed each one (10) and other (12) by proper insulating shapes (20).
    Type: Grant
    Filed: December 27, 2001
    Date of Patent: March 2, 2004
    Assignee: STMicroelectronic S.r.l.
    Inventors: Loris Vendrame, Paolo Caprara, Giorgio Oddone, Antonio Barcella
  • Patent number: 6566769
    Abstract: An inductance balancer is connected between a drive and a flat three phase power transmission cable employed to carry power to a remote load. The inductance balancer includes a first inductance device (e.g., a single wound inductor) connecting the center cable conductor to the drive and raising the total effective inductance of the center cable conductor to the inductance of either of the outer cable conductors at maximum inductance. The inductance balancer also includes a second inductance device connecting both outer conductors to the drive and adding an inductance equal to that of the first inductance device when current exists only on an outer conductor and the center conductor, but adding no inductance to the outer conductors when current exists only on those two conductors.
    Type: Grant
    Filed: April 27, 2000
    Date of Patent: May 20, 2003
    Assignee: Baker Hughes Incorporated
    Inventor: James Edward Layton
  • Patent number: 6525950
    Abstract: A semiconductor power conversion device includes two bridge-connected semiconductor switches, an output terminal, and first and second pairs of positive and negative direct current terminals. First conductors connect the negative direct current terminals of the first and second pairs with the output terminal through one of the two bridge-connected semiconductor switches, while second conductors connect the positive direct current terminals of the first and second pairs with the other of the two bridge-connected semiconductor switches. A housing is provided, which includes the two bridge-connected semiconductor switches, and at least a portion of the first conductor and of the second conductor as a multilayer structure formed by sandwiching an insulator between the first and second conductors inside the housing. The first and second pairs of direct current terminals are arranged on one side of one plane of the housing.
    Type: Grant
    Filed: September 1, 2000
    Date of Patent: February 25, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Shinji Shirakawa, Hideshi Fukumoto, Akira Mishima, Keiichi Mashino, Toshiyuki Innami
  • Publication number: 20020190580
    Abstract: A device inserted between a grounded poly-phase external voltage source and a load providing low insertion loss for differential mode currents and high insertion loss for ground currents. The device receives voltages from the grounded poly-phase external voltage source over atone or more voltage lines. The voltages contain common mode voltages. A filter connected to each of the voltage lines reduces the ground current from the load. A summing block adds the voltages from each of the voltage lines to generate a total common mode voltage. A ground referenced controlled voltage source generates a cancellation voltage equal to the total common mode voltage in response to the generation of total common mode voltage. The total common mode voltage is injected into the filter and substantially reduces the common mode voltage on each voltage line thereby substantially reducing the ground currents associated with each common mode voltage on each voltage line.
    Type: Application
    Filed: November 6, 2001
    Publication date: December 19, 2002
    Inventor: Orrin B. West
  • Patent number: 6368933
    Abstract: An integrated circuit biases the substrate and well using voltages other than those used for power and ground. Tap cells inside the standard cell circuits are removed. New tap cells used to bias the substrate and well reside outside the standard cell circuits. The location of the new voltage power rails is designated prior to placement of the tap cells in the integrated circuit. The tap cells are then strategically placed near the power rails such that metal connections are minimized. Circuit density is thus not adversely impacted by the addition of the new power rails. Transistors are also placed inside the tap cells to address electrostatic discharge issues during fabrication.
    Type: Grant
    Filed: December 15, 1999
    Date of Patent: April 9, 2002
    Assignee: Intel Corporation
    Inventors: Lawrence T. Clark, Vikas R. Amrelia, Raphael A. Soetan, Eric J. Hoffman, Tuan X. Do
  • Patent number: 5705862
    Abstract: A panelboard apparatus includes an enclosure; a first plurality of circuit breakers including a remotely controllable solenoid for actuating the circuit breaker and switching a circuit from a power line through a load; a holder for holding in the enclosure up to a second plurality of circuit breakers including the first plurality of circuit breakers; a controller for controlling up to the second plurality of circuit breakers; a printed circuit connection mechanism for connecting up to the second plurality of circuit breakers to the controller in one of a plurality of configurations, including printed circuit boards having a plurality of interfaces for up to the second plurality of circuit breakers; and a switch selection circuit for selecting one of the configurations in order to determine a location in the enclosure of a first one of the second plurality of circuit breakers.
    Type: Grant
    Filed: May 7, 1996
    Date of Patent: January 6, 1998
    Assignee: Eaton Corporation
    Inventors: David A. Lutz, Mark A. Satterthwaite, Daniel B. Yount, Bruce L. Brodsky, David L. Davidson, Daniel W. Shafer
  • Patent number: 5579217
    Abstract: A laminated bus assembly including a high power coupler to provide a low impedance, low noise laminated bus assembly for a switched converter that includes a plurality of switch pairs to convert between an AC power line and a DC device. The laminated bus assembly includes a first conductive layer, a second conductive layer, and a third conductive layer. A dielectric layer is laminated between each of the first, second, and third planes. The high power coupler includes a bushing positioned within the laminated assembly, including an engageable section for engaging with one of the conductive layers. A passage hole including an insulator ring is formed in intermediate conductive planes for passage of the bushing. A circuit layout includes a plurality of electrical connections between the switches, the AC, -DC and +DC bar conductors, and the DC device.
    Type: Grant
    Filed: November 15, 1994
    Date of Patent: November 26, 1996
    Assignee: Kenetech Windpower, Inc.
    Inventors: David Deam, William L. Erdman
  • Patent number: 5365424
    Abstract: A low impedance, low noise laminated bus assembly for a high power switched converter that has a plurality of switch pairs including a -DC switch and a +DC switch for high speed switching to convert between an AC power line and a DC power storage device such as capacitors. The laminated bus assembly includes a first conductor plane having a plurality of AC bar conductors for each phase of AC power, a second conductor plane including a -DC bar conductor, and a third conductor plane including a +DC bar conductor. A dielectric layer is laminated between the first, second, and third planes. The circuit layout includes a plurality of electrical connections between the switches, the AC, -DC and +DC bar conductors, and the DC power storage device. Some of the electrical connections require that a coupling conductor pass through another bar conductor, which must therefore be insulated from the coupling conductor.
    Type: Grant
    Filed: December 15, 1992
    Date of Patent: November 15, 1994
    Assignee: Kenetech Windpower, Inc.
    Inventors: David Deam, William L. Erdman
  • Patent number: 5172310
    Abstract: A low impedance, high power bus for conduction of electrical power with reduced transient signal effects is described herein. The high power bus can be applied as a high power supply bus between a constant voltage source and a plurality of switching cells positioning at varying locations along the bus, and as branch bus for the switching cells. The power bus can transmit high power: large currents in the hundreds or thousands of amperes, and large voltage potentials in the hundreds or thousands of volts. Particularly, the power bus has use in a DC-to-AC inverter that converts DC from a constant voltage source into three-phase AC for delivery to an electrical power grid. The high power bus includes two conductive bars positioned so that the current flow therethrough is balanced (equal and opposing), and the magnetic field is substantially confined between the bars. The bus includes a dielectric positioned between the conductive bars.
    Type: Grant
    Filed: July 10, 1991
    Date of Patent: December 15, 1992
    Assignee: U.S. Windpower, Inc.
    Inventors: David Deam, William L. Erdman
  • Patent number: 5105095
    Abstract: An improved data coupler assembly provides an improved electromagnet insert having conductive wires positioned within arcuate channels formed along with electromagnet insert. Sealing means to position and seal the conductor wires to the assembly are included. Improved electromagnetic shielding by using metallic plating on the upper member of the coupler assembly provides effective, but lightweight, EMF/RFI protection. A rugged resilient spring means improves the formation of an electromagnet core by biasing the electromagnet insert, and thereby biasing together each electromagnet pair form cores having a minimal air gap. A quick-action panel mounting means secures the coupler assembly to a panel, and improved aligning means precisely secures the upper member of the coupler assembly to the lower member.
    Type: Grant
    Filed: June 20, 1991
    Date of Patent: April 14, 1992
    Assignee: AMP Incorporated
    Inventors: William J. Rudy, Jr., Howard R. Shaffer
  • Patent number: 4922125
    Abstract: A data processing system is shown packaged in an enclosure wherein the system frame or chassis and a cable carrier are separately fabricated and thereafter merged to provide an enclosure with open ends and a central cable carrier that mounts connections for the system components. The system components are slideably received by the enclosure and are self docking as the electrical connections with the system power and signal lines are completed as the components arrive at the fully inserted, latched position. Keying means are also provided to require the user to install the components at both the correct location and with the correct orientation.
    Type: Grant
    Filed: March 17, 1988
    Date of Patent: May 1, 1990
    Assignee: International Business Machines Corporation
    Inventors: Wayne J. Casanova, Roger F. Dimmick, William A. Hall, Lester C. Homan, Frank J. Lukes, Bradley L. Martin, Claude J. Mosley, Arthur P. Reckinger, Jr., Paul W. Schaefer, Zanti D. Squillace, Gordon W. Westphal, Stephen E. Wheeler
  • Patent number: 4904879
    Abstract: A coupler assembly for noninvasive coupling to conductor wires of a twisted pair cable of a data bus uses mating pairs of E-shaped electromagnets defining a pair of electromagnet cores having windings about central legs thereof electrically connected to a control unit for sensing and transmitting signals along the data bus. A lower member with lower electromagnets is mounted to a panel, while an upper member with upper electromagnets includes a circuit substrate having trace windings about substrate apertures receiving the central legs of the upper electromagnets, an electronic subassembly to which the windings are electrically connected to amplify signals received and signals to be sent, and a shielded electrical connector secured at a connector end connected to circuits of the electronic subassembly and matable with a connector of a cable extending to the control unit.
    Type: Grant
    Filed: September 30, 1988
    Date of Patent: February 27, 1990
    Assignee: AMP Incorporated
    Inventors: William J. Rudy, Jr., Howard R. Shafter
  • Patent number: 4473785
    Abstract: A numerical control unit which includes a main bus connected to (a main processor) operates, according to an execution program stored in a main memory, on data from the memory or a tape reader, and applies the results of the operation to axis-control circuits in order to perform predetermined numerical control. The main memory and buffer circuits (4a to 4c in FIG. 1) are connected to the main bus. This minimizes the electrical load on the main processor. Peripheral buses are provided for each of the buffer circuits, and peripheral hardware and the axis-control circuits of individual package units are each connected to the peripheral buses.
    Type: Grant
    Filed: March 15, 1982
    Date of Patent: September 25, 1984
    Assignee: Fujitsu Fanuc Limited
    Inventor: Mitsuo Kurakake
  • Patent number: 4162525
    Abstract: A power system provides a duty cycle modulated high frequency carrier signal to an inductive load with positive and negative buses. During the inductive energy discharge period the energy stored in the inductive load causes a reversal in the polarity of the inductor terminal and tends to drive the new polarity towards infinity. Thus, the magnitude of one of the buses may be increased as the result of duty cycle modulation. First and second inverters are coupled in parallel across the positive and negative buses. First and second series coupled capacitors are also connected in parallel with the inverters. The power inverter senses the increased voltage on the second bus as a result of the inductive energy discharge and transfers that energy back to the first bus. Power may thus be sensed, converted in form, and transferred from one bus to another while conserving 90% of the energy which would otherwise be wasted.
    Type: Grant
    Filed: March 30, 1977
    Date of Patent: July 24, 1979
    Assignee: Hughes Aircraft Company
    Inventor: Herbert N. Epp
  • Patent number: 3952243
    Abstract: A voltage transformer for an insulated high-voltage switching apparatus of the type including a metallic outer tubular casing in which an electrical conductor is disposed, and a tubular sleeve disposed about the conductor within the casing. The sleeve forms both a surface type electrode and in conjunction with the electrical conductor of the apparatus, a high potential capacitor. The improvement of the invention comprises a coupling arrangement, fabricated of electrical insulation material, which is fastened at one end of the tubular sleeve and is coupled to the casing of the apparatus. A support arrangement, also fabricated of electrical insulation material, is fastened at the other end of the tubular sleeve and disposed in engagement with the inner surface of the apparatus casing. The coupling and support arrangements function in conjunction with each other to support the tubular sleeve in the apparatus casing about the electrical conductor.
    Type: Grant
    Filed: May 17, 1974
    Date of Patent: April 20, 1976
    Assignee: Siemens Aktiengesellschaft
    Inventors: Albert Herrmann, Gerhard Kleen, Heinz Schiemann
  • Patent number: 3942032
    Abstract: Means for better balancing and controlling of circuit loadings in electric power transmission networks to significantly reduce the number and/or cost of the transmission lines and facilities required to make a specific power transfer by significantly increasing the transmission capability of a given network by superimposing controlled circulating alternating currents for redistribution of power and current flows in the network.
    Type: Grant
    Filed: February 15, 1974
    Date of Patent: March 2, 1976
    Inventor: John A. Casazza
  • Patent number: RE43326
    Abstract: An integrated circuit biases the substrate and well using voltages other than those used for power and ground. Tap cells inside the standard cell circuits are removed. New tap cells used to bias the substrate and well reside outside the standard cell circuits. The location of the new voltage power rails is designated prior to placement of the tap cells in the integrated circuit. The tap cells are then strategically placed near the power rails such that metal connections are minimized. Circuit density is thus not adversely impacted by the addition of the new power rails. Transistors are also placed inside the tap cells to address electrostatic discharge issues during fabrication.
    Type: Grant
    Filed: May 24, 2007
    Date of Patent: April 24, 2012
    Assignee: Marvell International Ltd.
    Inventors: Lawrence T. Clark, Vikas R. Amrelia, Raphael A. Soetan, Eric J. Hoffman, Tuan X. Do