Using Logic Circuits Patents (Class 307/404)
  • Patent number: 5623279
    Abstract: A capacitative load driving circuit is provided in a liquid crystal display device and has an input selection circuit having a wide and effective voltage range of an input signal. The driving circuit changes over through source or emitter followers formed by two types of conductivity, for detecting as to whether or not a potential of the input signal is in an input voltage range of a differential amplifier circuit constituting a voltage follower after selecting at least one input signal through any of source or emitter followers.
    Type: Grant
    Filed: September 12, 1994
    Date of Patent: April 22, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuro Itakura, Takeshi Shima
  • Patent number: 5519714
    Abstract: A logic circuit associated with a scan path circuit includes at least one clock controller and at least one scan flipflop. The clock controller includes a first control gate receiving a clock signal and a scan mode signal and configured to maintain its output at a fixed value when the scan mode signal is active, a second control gate receiving an output of the first control gate and a first test clock signal for generating a first enable signal, and a third control gate receiving an output of the second control gate and a second test clock signal for generating a second enable signal. The scan flipflop includes a selector having a pair of inputs receiving a data input signal and a scan input signal, respectively, and also having a selection input receiving the scan mode signal so that when the scan mode signal is active, the scan input signal is selected, and when the scan mode signal is inactive, the data input signal is selected.
    Type: Grant
    Filed: November 18, 1993
    Date of Patent: May 21, 1996
    Assignee: NEC Corporation
    Inventors: Yoshiyuki Nakamura, Masaaki Yoshida