Discharge Devices Having A Multipointed Or Serrated Edge Electrode Patents (Class 313/309)
  • Patent number: 11615900
    Abstract: A virtual adhesion method is provided. The virtual adhesion method includes increasing a magnetic characteristic of an initial structure, supporting the initial structure on a surface of a substrate, generating a magnetic field directed such that the initial structure is forced toward the surface of the substrate and forming an encapsulation, which is bound to exposed portions of the surface, around the initial structure.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: March 28, 2023
    Assignee: RAYTHEON COMPANY
    Inventors: Catherine Trent, Gary A. Frazier, Kyle L. Grosse
  • Patent number: 11502483
    Abstract: An ion generating device can include a housing having an opening, an anode and a cathode disposed within the housing and having a space between them in fluid communication with the opening, a power source having a negative terminal and a positive terminal with a first connection between the negative terminal and the anode and a second connection between the positive terminal and the cathode, and an air mover disposed to direct an air flow through the space and out of the opening.
    Type: Grant
    Filed: July 13, 2018
    Date of Patent: November 15, 2022
    Assignee: NATURION PTE. LTD.
    Inventors: Warren Edwin Guthrie, John Gregory Videtich, Kenneth James Orr, Eric Joshua Emens
  • Patent number: 11436431
    Abstract: A method includes: generating a refine image having a maximized correct label score of inference from an incorrect image by which an incorrect label is inferred by a neural network; generating a third map by superimposing a first map and a second map, the first map indicating pixels to each of which a change is made in generating the refine image, of plural pixels of the incorrect image, the second map indicating a degree of attention for each local region in the refine image, the each local region being a region that has drawn attention at the time of inference by the neural network, and the third map indicating a degree of importance for each pixel for inferring a correct label; and specifying an image section based on a pixel value of the third map, the image section corresponding to a region causing incorrect inference in the incorrect image.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: September 6, 2022
    Assignee: FUJITSU LIMITED
    Inventors: Tomonori Kubota, Takanori Nakao, Yasuyuki Murata
  • Patent number: 11387012
    Abstract: An elastic conductor comprising: an elastomeric substrate, and an array of nanowires, wherein the nanowires are upstanding relative to the surface of the substrate.
    Type: Grant
    Filed: April 24, 2018
    Date of Patent: July 12, 2022
    Assignee: MONASH UNIVERSITY
    Inventors: Wenlong Cheng, George P Simon, Yan Wang
  • Patent number: 11312102
    Abstract: The present disclosure relates to a carbon nanotube structure. The carbon nanotube structure includes a carbon nanotube array, a carbon nanotube layer located on the carbon nanotube array, and a carbon nanotube cluster between the carbon nanotube array and the carbon nanotube layer. The carbon nanotube array includes a number of first carbon nanotubes that are parallel with each other. The carbon nanotube layer includes a number of second carbon nanotubes. The carbon nanotube cluster includes a plurality of third carbon nanotubes that are entangled around both the plurality of first carbon nanotubes and the plurality of second carbon nanotubes. The carbon nanotube array is fixed on the carbon nanotube layer by the plurality of third carbon nanotubes so that the entire carbon nanotube structure is free-standing.
    Type: Grant
    Filed: June 10, 2019
    Date of Patent: April 26, 2022
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Peng Liu, Kai-Li Jiang, Shou-Shan Fan
  • Patent number: 11260420
    Abstract: Coated nanowires comprising a core and a ferromagnetic coating are magnetically aligned and bound to a substrate. The substrate may have a thiol-functionalized surface. In some examples, the coated nanowires are nickel-coated copper nanowires and the substrate may be a carbon-doped oxide or silicon oxide.
    Type: Grant
    Filed: October 14, 2019
    Date of Patent: March 1, 2022
    Assignee: Portland State University
    Inventors: Shankar B. Rananavare, Srikar Rao Darmakkolla
  • Patent number: 11243231
    Abstract: A probe card includes a circuit board and a probe set. The probe set is electrically coupled to the circuit board. Also, the probe set includes a plurality of probes. Each of the plurality of probes includes a plurality of nanotwinned copper pillars that are arranged in a predetermined crystal orientation. In addition, each of the plurality of probes further includes a tip. The tip substantially and electrically contacts a chip. Such that the circuit board can test the chip via the tip.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: February 8, 2022
    Inventor: Tien-Chien Cheng
  • Patent number: 11152188
    Abstract: A semiconductor device includes a tube-like structure comprising a plurality of dielectric layers and conductor layers that are disposed on top of one another; a conductor tip integrally formed with a cap conductor layer that is disposed on a top surface of the tube-like structure, wherein the conductor tip extends to a central hole of the tube-like structure; and at least one photodetector formed within a bottom portion of the tube-like structure.
    Type: Grant
    Filed: January 24, 2020
    Date of Patent: October 19, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Hsien-Yu Chang
  • Patent number: 11114272
    Abstract: Charged particle beams (CPBs) are modulated using a beam blanker/deflector and an electrically pulsed extraction electrode in conjunction with a field emitter and a gun lens. With such modulation, CPBs can provide both pulsed and continuous mode operation as required for a particular application, while average CPB current is maintained within predetermined levels, such as levels that promote X-ray safe operation. Either the extraction electrode or the beam blanker/deflector can define CPB pulse width, CPB on/off ratio, or both.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: September 7, 2021
    Assignee: FEI Company
    Inventors: Kun Liu, Erik Kieft
  • Patent number: 11027534
    Abstract: A fiber composite material and a manufacturing method thereof are provided. The fiber composite material includes: a fiber prepreg layer including a first resin and fibers impregnated with the first resin; and a plurality of strip-shaped composite resin layers including multi-layered carbon nanotubes and a second resin disposed on the fiber prepreg layer, wherein the plurality of the strip-shaped composite resin layers and the fiber prepreg layer together form a hollow tubular body, and a length direction of the plurality of strip-shaped composite resin layer is at an angle of from 0 degree and less than 90 degrees with respect to an extending direction of the fiber prepreg layer.
    Type: Grant
    Filed: October 17, 2018
    Date of Patent: June 8, 2021
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Shir-Joe Liou, Jih-Hsiang Yeh
  • Patent number: 10928021
    Abstract: An LED or/and Laser light device(s) connect with outlet or bulb-base or interchangeable or USB power source, which incorporates more than one geometric shapes of optics-piece including image-forming-piece and optics-lens(es) that said optics-lens(es) having at least one of reflective and/or refractive properties which has relative positions, distances, and/or orientations to LEDs and/or Laser light-source(s) and image-forming-piece to let light-beams reflect, retro-reflect, refract, or go through art, design, texture, treated area of said optics-lens and/or image-forming-piece, so the light-beam of the said LED or laser light-source at least reflected or/and refracted and/or traveling and/or passing through multiple times the said reflective and refractive optic lens(es) and/or art-areas, and/or image-forming-device to create or project lighted image(s), message(s), number(s), time, geometric art(s), nature scene(s), galaxy(ies), milky way, sky(ies), cloud(s), space nebula, stars, moon, water-wave(s), aurora
    Type: Grant
    Filed: September 18, 2018
    Date of Patent: February 23, 2021
    Inventor: Tseng-Lu Chien
  • Patent number: 10910185
    Abstract: The present invention is directed to a method for the fabrication of electron field emitter devices, including carbon nanotube (CNT) field emission devices. The method of the present invention involves depositing one or more electrically conductive thin-film layers onto an electrically conductive substrate and performing lithography and etching on these thin film layers to pattern them into the desired shapes. The top-most layer may be of a material type that acts as a catalyst for the growth of single- or multiple-walled carbon nanotubes (CNTs). Subsequently, the substrate is etched to form a high-aspect ratio post or pillar structure onto which the previously patterned thin film layers are positioned. Carbon nanotubes may be grown on the catalyst material layer. The present invention also described methods by which the individual field emission devices may be singulated into individual die from a substrate.
    Type: Grant
    Filed: July 31, 2019
    Date of Patent: February 2, 2021
    Assignee: CORPORATION FOR NATIONAL RESEARCH INITIATIVES
    Inventors: Mehmet Ozgur, Paul Sunal, Lance Oh, Michael Huff, Michael Pedersen
  • Patent number: 10903034
    Abstract: A field emission transistor uses carbon nanotubes positioned to extend along a substrate plane rather than perpendicularly thereto. The carbon nanotubes may be pre-manufactured and applied to the substrate and then may be etched to create a gap between the carbon nanotubes and an anode through which electrons may flow by field emission. A planar gate may be positioned beneath the gap to provide a triode structure.
    Type: Grant
    Filed: October 17, 2017
    Date of Patent: January 26, 2021
    Assignee: WISYS TECHNOLOGY FOUNDATION, INC.
    Inventors: Charles D Nelson, Harold T Evensen
  • Patent number: 10892066
    Abstract: The present disclosure is related to a film and a conductive film. The film of the present disclosure not only is optically transparent but also has excellent electrical conductivity and adhesion between the layers at the same time. Moreover, the conductive film of the present disclosure is optically transparent and has excellent electrical conductivity, adhesion between the layers and improved light extraction efficiency at the same time.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: January 12, 2021
    Assignee: LMS CO., LTD.
    Inventors: Hoseong Na, Seongyong Yoon, Jitae Kim
  • Patent number: 10873026
    Abstract: Methods for forming carbon nanotube arrays are provided. Also provided are the arrays formed by the methods and electronic devices that incorporate the array as active layers. The arrays are formed by flowing a fluid suspension of carbon nanotubes through a confined channel under conditions that create a velocity gradient across the flowing suspension.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: December 22, 2020
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: Michael Scott Arnold, Katherine Rose Jinkins, Gerald Joseph Brady, Padma Gopalan
  • Patent number: 10840163
    Abstract: A negative electroluminescent cooling device including a first layer of material; a second layer of material arranged at a non-zero distance from the first layer of material with help of a set of supporters, and an energy source to apply a reverse bias voltage to the first layer of material to cool the second layer of material. The material of the first layer is a semiconductor with a bandgap less or equal to a surface resonant energy of the second layer of material.
    Type: Grant
    Filed: January 4, 2018
    Date of Patent: November 17, 2020
    Assignee: Mitsubishi Electric Research Laboratories, Inc.
    Inventors: Chungwei Lin, Bingnan Wang, Koon Hoo Teo
  • Patent number: 10811211
    Abstract: A method for making a carbon nanotube field emitter is provided. A carbon nanotube array and a cathode substrate are provided. The carbon nanotube array is heated to form a graphitized carbon nanotube array. A conductive adhesive layer is formed on a surface of the cathode substrate. One end of the graphitized carbon nanotube array is contact with the conductive adhesive layer. The conductive adhesive layer is solidified to fix the graphitized carbon nanotube array on the cathode substrate.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: October 20, 2020
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Peng Liu, Duan-Liang Zhou, Chun-Hai Zhang, Li Qian, Yu-Quan Wang, Xue-Wei Guo, Li-Yong Ma, Fu-Jun Wang, Shou-Shan Fan
  • Patent number: 10804062
    Abstract: Provided is a field emission device. The field emission device includes a cathode electrode having a first surface and a second surface facing the first surface, the cathode electrode including grooves that are recessed from the first surface toward the second surface, the grooves extending in a first direction parallel to the first surface and emitter structures which are disposed within the grooves and each of which includes a core extending in the first direction and a conductive wire configured to surround the core. The grooves may be arranged in a second direction crossing the first direction, and the emitter structures may be disposed at vertical levels different from each other.
    Type: Grant
    Filed: January 30, 2020
    Date of Patent: October 13, 2020
    Assignee: Electronics and Telecommunications Research Institute
    Inventor: Jin-Woo Jeong
  • Patent number: 10747028
    Abstract: A nanofiber sheet is described that is composed of a substrate and a layer of oriented nanofibers. Nanofibers of the sheet can be oriented in a common direction. In some orientations, light absorbent sheets can absorb over 99.9%, and in some cases over 99.95%, of the intensity of light incident upon the sheet. Methods for fabricating a light absorbent sheet are also described.
    Type: Grant
    Filed: March 22, 2018
    Date of Patent: August 18, 2020
    Assignee: Lintec of America, Inc.
    Inventors: Chi Huynh, Masaharu Ito
  • Patent number: 10741353
    Abstract: A robust cold cathode uses an electron emitting construct design possibly for an x-ray emitter device. The electron beam emitted by the emitting construct is focused and accelerated by an electrical field towards an electron anode target. A shield is provided to prevent a cold cathode from being damaged by ion bombardment in high-voltage applications and a non-emitter zone may provide a robust ion bombardment zone. The system is further configured to provide an angled target anode or a stepped target anode to further reduce the ion bombardment damage.
    Type: Grant
    Filed: March 25, 2019
    Date of Patent: August 11, 2020
    Assignee: NANO-X IMAGING LTD
    Inventors: Hidenori Kenmotsu, Hitoshi Masuya, Koichi Iida
  • Patent number: 10741399
    Abstract: The present invention generally provides semiconductor substrates having submicron-sized surface features generated by irradiating the surface with ultra short laser pulses. In one aspect a method of processing a semiconductor substrate is disclosed that includes placing at least a portion of a surface of the substrate in contact with a fluid, and exposing that surface portion to one or more femtosecond pulses so as to modify the topography of that portion. The modification can include, e.g., generating a plurality of submicron-sized spikes in an upper layer of the surface.
    Type: Grant
    Filed: February 14, 2018
    Date of Patent: August 11, 2020
    Assignee: PRESIDENT AND FELLOWS OF HARVARD COLLEGE
    Inventors: Eric Mazur, Mengyan Shen
  • Patent number: 10727325
    Abstract: A horizontal vacuum channel transistor is provided. The horizontal transistor includes a substrate, horizontal emitter and collector electrodes formed in a layer of semiconductor material of the substrate, and a horizontal insulated gate located between the emitter and collector electrodes. The emitter electrode includes multiple horizontally-aligned emitter tips connected to a planar common portion, and the collector electrode includes a planar portion. The gate includes multiple horizontally-aligned gate apertures passing through the gate that each correspond to one of the emitter tips of the emitter electrode. The minimum distance between the emitter and collector electrodes is less than about 180 nm. Also provided are a vertical vacuum channel transistor having vertically-stacked emitter and collector electrodes, and methods for fabricating vacuum channel transistors.
    Type: Grant
    Filed: March 22, 2018
    Date of Patent: July 28, 2020
    Assignee: United States of America as Represented by the Administrator of NASA
    Inventors: Jin-Woo Han, Meyya Meyyappan
  • Patent number: 10692680
    Abstract: A method of producing an electron emitting device includes: step A of providing an aluminum substrate or providing an aluminum layer supported by a substrate; step B of anodizing a surface of the aluminum substrate or a surface of the aluminum layer to form a porous alumina layer having a plurality of pores; step C of applying Ag nanoparticles in the plurality of pores to allow the Ag nanoparticles to be supported in the plurality of pores; step D of, after step C, applying a dielectric layer-forming solution onto substantially the entire surface of the aluminum substrate or the aluminum layer, the dielectric layer-forming solution containing, in an amount of not less than 7 mass % but less than 20 mass %, a polymerization product having siloxane bonds; step E of, after step D, at least reducing a solvent contained in the dielectric layer-forming solution to form the dielectric layer; and step F of forming an electrode on the dielectric layer.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: June 23, 2020
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Kenichiro Nakamatsu, Tokio Taguchi, Kohji Shinkawa, Mai Takasaki, Tadashi Iwamatsu
  • Patent number: 10665779
    Abstract: Methods for additive formation of a STT-MRAM metal stack using a deposition process through a pre-patterned template that skims away metal ions that are less likely to enable anisotropic deposition on a substrate. The pre-patterned template is formed from a film stack using patterning techniques to form an opening in the film stack that exposes portions of an underlying substrate where a MTJ will be formed for an MRAM cell. The film stack cavity may be exposed to etch processes that selectively pull back the sidewall, such that other layers in the film stack protrude into the cavity. Additional treatments to the other layers may alter the opening sizes in the other layers. Metal deposited through the cavity such that metal ions with anisotropic characteristics will be skimmed away before reaching the substrate.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: May 26, 2020
    Assignee: Tokyo Electron Limited
    Inventors: Noel Russell, Jeffrey Smith
  • Patent number: 10629957
    Abstract: Solid-state battery structures, particularly solid-state lithium-based battery structures, which are fast charging and have a high capacity are provided. Notably, fast charging, high capacity solid-state battery structures are provided that include a plurality of solid-state-thin-film batteries that are stacked one atop the other, or that include an array of interconnected solid-state thin-film batteries, or that contain a solid-state thin-film battery located on physically exposed surfaces of fin structures.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: April 21, 2020
    Assignee: International Business Machines Corporation
    Inventors: Joel P. de Souza, Yun Seog Lee, Ning Li, Devendra K. Sadana
  • Patent number: 10622582
    Abstract: Disclosed is a substrate for a display panel, a manufacturing method thereof, and a display panel and encapsulation method. The substrate includes a carrier substrate and at least one auxiliary encapsulation component disposed on the carrier substrate. A protrusion is formed at a side of the auxiliary encapsulation component away from the carrier substrate and protrudes in a direction parallel to the surface of the carrier substrate.
    Type: Grant
    Filed: September 22, 2017
    Date of Patent: April 14, 2020
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yinghai Ma, Yueping Zuo
  • Patent number: 10600606
    Abstract: A method is presented for controlling an electric field from a gate structure. The method includes forming a hardmask over a fin stack including a plurality of layers, forming a first dielectric layer over the hardmask, forming a sacrificial layer over the first dielectric layer, etching the sacrificial layer to expose a top surface of the first dielectric layer, depositing a second dielectric layer in direct contact with exposed surfaces of the first dielectric layer and the sacrificial layer, removing a layer of the plurality of layers of the fin stack to define an air gap within the fin stack, and forming triangle-shaped epitaxial growths within the air gap defined within the fin stack.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: March 24, 2020
    Assignee: International Business Machines Corporation
    Inventors: Injo Ok, Choonghyun Lee, Soon-Cheon Seo, Seyoung Kim
  • Patent number: 10593506
    Abstract: A field emission transistor includes a gate, a fold over emitter, and fold over collector. The emitter and the collector are separated from the gate by a void and are separated from a gate contact by gate contact dielectric. The void may be a vacuum, ambient air, or a gas. Respective ends of the emitter and the collector are separated by a gap. Electrons are drawn across gap from the emitter to the collector by an electrostatic field created when a voltage is applied to the gate. The emitter and collector include a first conductive portion substantially parallel with gate and a second conductive portion substantially perpendicular with gate. The second conductive portion may be formed by bending a segment of the first conductive portion. The second conductive portion is folded inward from the first conductive portion towards the gate. Respective second conductive portions are generally aligned.
    Type: Grant
    Filed: May 31, 2019
    Date of Patent: March 17, 2020
    Assignee: International Business Machines Corporation
    Inventors: Benjamin D. Briggs, Lawrence A. Clevenger, Michael Rizzolo
  • Patent number: 10558123
    Abstract: An electron source is formed on a silicon substrate having opposing first and second surfaces. At least one field emitter is prepared on the second surface of the silicon substrate to enhance the emission of electrons. To prevent oxidation of the silicon, a thin, contiguous boron layer is disposed directly on the output surface of the field emitter using a process that minimizes oxidation and defects. The field emitter can take various shapes such as pyramids and rounded whiskers. One or several optional gate layers may be placed at or slightly lower than the height of the field emitter tip in order to achieve fast and accurate control of the emission current and high emission currents. The field emitter can be p-type doped and configured to operate in a reverse bias mode or the field emitter can be n-type doped.
    Type: Grant
    Filed: October 15, 2018
    Date of Patent: February 11, 2020
    Assignee: KLA-Tencor Corporation
    Inventors: Yung-Ho Alex Chuang, Yinying Xiao-Li, Xuefeng Liu, John Fielden
  • Patent number: 10529527
    Abstract: An X-ray source for ionizing of gases includes a field emission tip array within a vacuum region enclosed by a hood and a part of a support plate. The field emission tip array is arranged electrically insulated with respect to the carrier plate and wired as a cathode connected to a high-voltage source. A transmission window transparent to X-ray radiation is arranged in the hood centrally above the field emission tip array, and the hood is wired as an anode.
    Type: Grant
    Filed: February 24, 2016
    Date of Patent: January 7, 2020
    Assignee: ESTION TECHNOLOGIES GMBH
    Inventor: Thomas Sebald
  • Patent number: 10483206
    Abstract: A method for manufacturing of a device (300, 410-412) comprising a substrate (201) comprising a plurality of sets of nanostructures (207) arranged on the substrate, wherein each of the sets of nanostructures is individually electrically addressable, the method comprising the steps of: providing (101) the substrate (200) having a first (202) face, the substrate having an insulating layer (210) comprising an insulating material arranged on the first face (202) of the substrate forming an interface (203) between the insulating layer and the substrate; providing (102) a plurality of stacks (204) on the substrate, the stacks being spaced apart from each other, wherein each stack comprises a first conductive layer (205) comprising a first conductive material and a second conductive layer (206) comprising a second conductive material different from the first material, the second conductive layer being arranged on the first conductive layer for catalyzing nanostructure growth; heating (103) the substrate having the p
    Type: Grant
    Filed: October 18, 2018
    Date of Patent: November 19, 2019
    Inventor: Waqas Khalid
  • Patent number: 10455677
    Abstract: Provided is an X-ray generator including a thermal electron emission type X-ray generator configured to generate a negative high voltage and a filament current, a field electron emission type X-ray generator including an anode electrode to be grounded, and configured to use the negative high voltage to bias the cathode electrode, and a field emission current control unit configured to convert the filament current to generate an output voltage to be provided to a gate electrode of the field electron emission type X-ray generator and convert the filament current to fix, to a specific level, a level of an emission current flowing through the cathode electrode.
    Type: Grant
    Filed: March 15, 2017
    Date of Patent: October 22, 2019
    Assignee: ELECTRONICS & TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jun Tae Kang, Yoon-Ho Song, Jin-Woo Jeong
  • Patent number: 10450189
    Abstract: The application describes a MEMS transducer comprising a substrate having a cavity. The transducer exhibits a membrane layer supported relative to the substrate to define a flexible membrane. An upper surface of the substrate comprises an overlap region between the edge of the cavity and a perimeter of the flexible membrane where the membrane overlies the upper surface of the substrate. At least one portion of the overlap region of the upper surface of the substrate is provided with a plurality of recesses. The recesses are defined so as to extend from the edge of the cavity towards the perimeter of the flexible membrane.
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: October 22, 2019
    Assignee: Cirrus Logic, Inc.
    Inventors: Tom Hanley, Timothy John Brosnihan, Euan James Boyd
  • Patent number: 10438811
    Abstract: Methods for forming electrodes for use in nano-gap electrodes are provided. Such methods can be used to form electrodes for use in devices that can be used to sense or detect biomolecules, such as in biomolecule sequence applications.
    Type: Grant
    Filed: April 15, 2015
    Date of Patent: October 8, 2019
    Assignee: QUANTUM BIOSYSTEMS INC.
    Inventor: Shuji Ikeda
  • Patent number: 10424456
    Abstract: A field emission transistor includes a gate, a fold over emitter, and fold over collector. The emitter and the collector are separated from the gate by a void and are separated from a gate contact by gate contact dielectric. The void may be a vacuum, ambient air, or a gas. Respective ends of the emitter and the collector are separated by a gap. Electrons are drawn across gap from the emitter to the collector by an electrostatic field created when a voltage is applied to the gate. The emitter and collector include a first conductive portion substantially parallel with gate and a second conductive portion substantially perpendicular with gate. The second conductive portion may be formed by bending a segment of the first conductive portion. The second conductive portion is folded inward from the first conductive portion towards the gate. Respective second conductive portions are generally aligned.
    Type: Grant
    Filed: December 6, 2017
    Date of Patent: September 24, 2019
    Assignee: International Business Machines Corporation
    Inventors: Benjamin D. Briggs, Lawrence A. Clevenger, Michael Rizzolo
  • Patent number: 10401295
    Abstract: A method of detecting a condition in a subject comprises the steps of contacting cells of the subject with single-walled carbon nanotubes (SWCNTs), monitoring photoluminescence emitted by SWCNTs internalized into the cells and generating an SWCNT emission profile, comparing the SWCNT emission profile to a control emission profile for the SWCNTs to produce a result, and determining a likelihood of having the condition in the subject based on the result from the comparing step. Also disclosed is a method for screening agents capable of changing endocytic environment using SWCNTs.
    Type: Grant
    Filed: May 28, 2015
    Date of Patent: September 3, 2019
    Assignee: Memorial Sloan Kettering Cancer Center
    Inventors: Prakrit Jena, Daniel A. Heller, Daniel Roxbury
  • Patent number: 10398037
    Abstract: An electronic component is mounted on the mounting face of a printed wiring board and a plurality of terminals arranged on the mounting face of the printed wiring board are respectively bonded to a plurality of terminals arranged on the bottom surface of the electronic component by means of solder. Solder paste containing powdery solder and thermosetting resin is provided to the plurality of terminals on the mounting face, then the electronic component is mounted on the mounting face of the printed wiring board, and subsequently the solder paste is heated to bond the corresponding terminals by means of molten solder. Thereafter, the molten solder is allowed to solidify and the thermosetting resin separated from the solder paste is allowed to cure in a state where it is held in contact with metal members arranged separately relative to the terminals.
    Type: Grant
    Filed: February 15, 2018
    Date of Patent: August 27, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kunihiko Minegishi, Mitsutoshi Hasegawa, Takashi Sakaki
  • Patent number: 10347456
    Abstract: A method is presented for controlling an electric field from a gate structure. The method includes forming a hardmask over a fin stack including a plurality of layers, forming a first dielectric layer over the hardmask, forming a sacrificial layer over the first dielectric layer, etching the sacrificial layer to expose a top surface of the first dielectric layer, depositing a second dielectric layer in direct contact with exposed surfaces of the first dielectric layer and the sacrificial layer, removing a layer of the plurality of layers of the fin stack to define an air gap within the fin stack, and forming triangle-shaped epitaxial growths within the air gap defined within the fin stack.
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: July 9, 2019
    Assignee: International Business Machines Corporation
    Inventors: Injo Ok, Choonghyun Lee, Soon-Cheon Seo, Seyoung Kim
  • Patent number: 10347855
    Abstract: A method of making carbon nanotube composite layer includes following steps. A first suspension having a number of semiconductor particles is formed. The number of semiconductor particles are deposited on a substrate. A second suspension comprising a number of carbon nanotubes is provided. The number of carbon nanotubes in the second suspension are deposited on the substrate with the number of semiconductor particles.
    Type: Grant
    Filed: April 22, 2015
    Date of Patent: July 9, 2019
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Yuan-Hao Jin, Qun-Qing Li, Shou-Shan Fan
  • Patent number: 10340138
    Abstract: The electronic device comprises a substrate (1), at least one semiconductor wire element (2) formed by a nitride of a group III material and an electroconductive layer (3) interposed between the substrate (1) and said at least one semiconductor wire element (2). Said at least one semiconductor wire element (2) extends from said electroconductive layer (3), and the electroconductive layer (3) comprises a carbide of zirconium or a carbide of hafnium.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: July 2, 2019
    Assignees: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, ALEDIA
    Inventors: Florian Dupont, Benoit Amstatt, Bérangère Hyot
  • Patent number: 10330527
    Abstract: A light converter for a light source is disclosed, having a substrate and a light converting layer disposed thereon for receiving laser radiation and converting the same into visible light. A sensor is functionally integrated with the light converting layer for purposes of detecting the condition of the light converting layer and modifying an operation of the laser radiation source in response thereto.
    Type: Grant
    Filed: April 1, 2015
    Date of Patent: June 25, 2019
    Assignee: OSRAM GMBH
    Inventors: Roland Fiederling, Daniel Weissenberger, Thomas Tessnow
  • Patent number: 10292276
    Abstract: The inventive concepts relate to a method of manufacturing a hybrid metal pattern and a hybrid metal pattern manufactured thereby. In the method, the hybrid metal pattern may be manufactured on a substrate (e.g., a flexible substrate), formed of various materials, at room temperature without damaging the substrate, by a wire explosion method in liquid and light-sintering. In more detail, when performing the wire explosion method in liquid according to conditions of the inventive concepts, metal particles having uniform nano-sizes and uniform micro-sizes can be formed by a simple process, and additional dispersing and collecting processes can be omitted. In addition, conductive hybrid ink is formed by adding a metal precursor and then is light-sintered. In this case, the hybrid metal pattern can be manufactured by a very simple process.
    Type: Grant
    Filed: July 14, 2017
    Date of Patent: May 14, 2019
    Assignee: IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)
    Inventors: Hak-Sung Kim, Wan Ho Chung
  • Patent number: 10263097
    Abstract: Methods of semiconductor arrangement formation are provided. A method of forming the semiconductor arrangement includes forming a first nucleus on a substrate in a trench or between dielectric pillars on the substrate. Forming the first nucleus includes applying a first source material beam at a first angle relative to a top surface of the substrate and concurrently applying a second source material beam at a second angle relative to the top surface of the substrate. A first semiconductor column is formed from the first nucleus by rotating the substrate while applying the first source material beam and the second source material beam. Forming the first semiconductor column in the trench or between the dielectric pillars using the first source material beam and the second source material beam restricts the formation of the first semiconductor column to a single direction.
    Type: Grant
    Filed: September 20, 2017
    Date of Patent: April 16, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Wei-Chieh Chen, Hao-Hsiung Lin, Shu-Han Chen, You-Ru Lin, Cheng-Hsien Wu, Chih-Hsin Ko, Clement Hsingjen Wann
  • Patent number: 10242836
    Abstract: The disclosure relates to an image capture device comprising an electron receiving construct and an electron emitting construct, and further comprising an inner gap providing an unobstructed space between the electron emitting construct and the electron receiving construct. The disclosure further relates to an x-ray emitting device comprising an x-ray emitting construct and an electron emitting construct, said x-ray emitting construct comprising an anode, the anode being an x-ray target, wherein the x-ray emitting device may comprise an inner gap providing an unobstructed space between the electron emitting construct and the x-ray emitting construct. The disclosure further relates to an x-ray imaging system comprising an image capture device and an x-ray emitting device.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: March 26, 2019
    Assignee: NANOX IMAGING PLC
    Inventors: Koichi Iida, Hidenori Kenmotsu, Jun Yamazaki, Hitoshi Masuya
  • Patent number: 10162470
    Abstract: A display unit with a touch detection function includes: a plurality of touch detection electrodes arranged side by side to extend in a direction, each of the touch detection electrodes being formed in a predetermined electrode pattern including electrode portion and opening portion and outputting a detection signal, based on a variation in capacitance due to an external proximity object; and a plurality of display elements formed in a layer different from a layer of the touch detection electrodes, a predetermined number of the display elements being arranged within a width dimension of a region corresponding to each of the touch detection electrodes. The predetermined electrode pattern corresponds to a layout pattern of the display elements.
    Type: Grant
    Filed: February 16, 2017
    Date of Patent: December 25, 2018
    Assignee: JAPAN DISPLAY INC.
    Inventors: Koji Ishizaki, Koji Noguchi, Takayuki Nakanishi, Yasuyuki Matsui, Masanobu Ikeda
  • Patent number: 10133181
    Abstract: An electron source is formed on a silicon substrate having opposing first and second surfaces. At least one field emitter is prepared on the second surface of the silicon substrate to enhance the emission of electrons. To prevent oxidation of the silicon, a thin, contiguous boron layer is disposed directly on the output surface of the field emitter using a process that minimizes oxidation and defects. The field emitter can take various shapes such as pyramids and rounded whiskers. One or several optional gate layers may be placed at or slightly lower than the height of the field emitter tip in order to achieve fast and accurate control of the emission current and high emission currents. The field emitter can be p-type doped and configured to operate in a reverse bias mode or the field emitter can be n-type doped.
    Type: Grant
    Filed: August 11, 2016
    Date of Patent: November 20, 2018
    Assignee: KLA-Tencor Corporation
    Inventors: Yung-Ho Alex Chuang, Yinying Xiao-Li, Xuefeng Liu, John Fielden
  • Patent number: 10109789
    Abstract: Disclosed herein are methods for additive formation of a STT-MRAM metal stack using a deposition process through a pre-patterned template that skims away metal ions that are less likely to enable anisotropic deposition on a substrate. The pre-patterned template is formed from a film stack using patterning techniques to form an opening in the film stack that exposes portions of an underlying substrate where a MTJ will be formed for an MRAM cell. The film stack cavity may be exposed to etch processes that selectively pull back the sidewall, such that other layers in the film stack protrude into the cavity. Additional treatments to the other layers may alter the opening sizes in the other layers. Metal deposited through the cavity such that metal ions with anisotropic characteristics will be skimmed away before reaching the substrate.
    Type: Grant
    Filed: May 18, 2016
    Date of Patent: October 23, 2018
    Assignee: Tokyo Electron Limited
    Inventors: Noel Russell, Jeffrey Smith
  • Patent number: 10099928
    Abstract: Apparatus and methods of use thereof for the production of carbon-based and other nanostructures, as well as fuels and reformed products, are provided.
    Type: Grant
    Filed: May 12, 2016
    Date of Patent: October 16, 2018
    Assignee: Rutgers, The State University of New Jersey
    Inventors: Stephen D. Tse, Nasir K. Memon, Bernard H. Kear
  • Patent number: 10096396
    Abstract: A method of manufacturing a composite material may include providing one or more layers of reinforcement material penetrated with viscous matrix material that is doped with electrically conductive particles. The method may further include applying a magnetic field to arrange the particles into one or more electrically conductive pathways, and curing the matrix material to secure the pathways in position relative to the reinforcement material.
    Type: Grant
    Filed: August 25, 2014
    Date of Patent: October 9, 2018
    Assignee: The Boeing Company
    Inventor: Keith Daniel Humfeld
  • Patent number: 10062857
    Abstract: Vacuum transistors with carbon nanotube as the collector and/or emitter electrodes are provided. In one aspect, a method for forming a vacuum transistor includes the steps of: covering a substrate with an insulating layer; forming a back gate(s) in the insulating layer; depositing a gate dielectric over the back gate; forming a carbon nanotube layer on the gate dielectric; patterning the carbon nanotube layer to provide first/second portions thereof over first/second sides of the back gate, separated from one another by a gap G, which serve as emitter and collector electrodes; forming a vacuum channel in the gate dielectric; and forming metal contacts to the emitter and collector electrodes. Vacuum transistors are also provided.
    Type: Grant
    Filed: May 12, 2017
    Date of Patent: August 28, 2018
    Assignee: International Business Machines Corporation
    Inventors: Qing Cao, Kangguo Cheng, Zhengwen Li, Fei Liu