Storage Patents (Class 313/391)
  • Patent number: 9595623
    Abstract: A present novel and non-trivial semiconductor device, switch device and method performed by the switch device is disclosed. A semiconductor device for conducting current may be comprised of an SI substrate and a plurality of electrodes deposited upon the substrate, where at least one electrode may be comprised of a transparent conductive material (“TCM”). A switching device may be comprised of a plurality of electromagnetic radiation sources and a plurality of the semiconductor devices. The method performed by the switching device may be comprised of receiving a plurality of cycles. During a first cycle, a first semiconductor device may be irradiated, and in response, current may flow through the first semiconductor device and provided to a user circuit. During the second cycle, a second semiconductor device may be irradiated, and in response, current from a user circuit may be received and flow through the first semiconductor device.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: March 14, 2017
    Assignee: Rockwell Collins, Inc.
    Inventor: Chenggang Xie
  • Patent number: 7667996
    Abstract: The scale of the devices in a diode array storage device, and their cost, are reduced by changing the semiconductor based diodes in the storage array to cold cathode, field emitter based devices. The field emitters and a field emitter array may be fabricated utilizing a topography-based lithographic technique.
    Type: Grant
    Filed: February 15, 2007
    Date of Patent: February 23, 2010
    Assignee: Contour Semiconductor, Inc.
    Inventor: Daniel R. Shepard
  • Patent number: 7502246
    Abstract: A ballistic memory cell structure employing ballistic transistor technology for switching between a read state and a store state is disclosed. The memory cell structure includes substrate structures forming a side wall and a main chamber for defining a linear ballistic channel between the two. The main chamber is formed to include a deflection channel with deflective surfaces to deflect an electron emitted from an electron source into the memory cell structure. Deflection controllers are coupled to the substrate structures for generating biasing fields that adjust the trajectory of electrons flowing through the linear ballistic channel and the deflection channel. Logic output terminals are positioned beyond channel exits for registering exiting electrons and determining a read or store state.
    Type: Grant
    Filed: July 9, 2008
    Date of Patent: March 10, 2009
    Assignee: International Business Machines Corporation
    Inventors: David Daniel Chudy, Michael G. Lisanke, Cristian Medina
  • Patent number: 6911768
    Abstract: An emitter has an electron supply and a porous cathode layer having nanohole openings. The emitter also has a tunneling layer disposed between the electron supply and the cathode layer.
    Type: Grant
    Filed: October 1, 2002
    Date of Patent: June 28, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Zhizhang Chen, Sriram Ramamoorthi, Hung Liao, Paul Benning, Alexander Govyadinov
  • Patent number: 5708451
    Abstract: Nonuniformities of luminance characteristics in a field emission display (FED) are compensated pixel by pixel by storing a matrix of correction values, determined by testing, and by applying a corrected drive signal through the relative column drive stages. The individual pixel's correction factor that is applied to the corresponding video signal may be stored in digital or analog form in a nonvolatile memory array. Various embodiments are described including the use of a second updatable RAM array wherein pixel's correction factors are calculated and stored at every power-on to provide an opportunity of trimming-up the luminance of the display for compensating long term decline of luminance due to the phosphors ageing process.
    Type: Grant
    Filed: July 22, 1996
    Date of Patent: January 13, 1998
    Assignee: SGS-Thomson Microelectronics, S.r.l.
    Inventor: Livio Baldi
  • Patent number: 4958104
    Abstract: A display device has an electron ray generating unit of matrix electrode structure in which a plurality of cold cathodes generating electron rays are arranged two-dimensionally, image storing apparatus for storing therein image information as an amount of charges by a variation in a surface potential produced by the application of the electron rays from the electron ray generating unit, and a display for receiving the application of the electron rays applied from the electron ray generating unit and modulated by the electric charge stored in the image storing apparatus and visualizing the image information.
    Type: Grant
    Filed: June 29, 1989
    Date of Patent: September 18, 1990
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hidetoshi Suzuki, Mitsuru Yamamoto, Toshiaki Majima, Ichiro Nomura
  • Patent number: 4599541
    Abstract: A scan converter storage tube has a storage target comprising at least two collector electrodes on a storage surface of a storage substrate. Each collector electrode has a multiplicity of parallel spaced strips which are electrically interconnected and which are arranged alternately with the strips of the other collector electrode, leaving exposed parts of the storage surface through the spacings therebetween. The establishment of a potential difference between the collector electrodes makes it possible to write information on the storage target at a high rate without necessitating an increase in an erase potential difference between the collector electrodes and the storage surface. The dual collector storage target also allows writing with a zero erase potential difference, dispensing with the erase mode preparatory to writing. There are also disclosed herein storage targets having three and four collector electrodes respectively.
    Type: Grant
    Filed: November 18, 1983
    Date of Patent: July 8, 1986
    Assignee: Iwatsu Electric Co., Ltd.
    Inventor: Takefumi Kato
  • Patent number: 4532453
    Abstract: A storage target is disclosed for use in a scan converter storage tube, direct view storage tube, etc. Included are a storage substrate in the form of a single crystal of sapphire, and a collector electrode in the shape of a directional pattern on a storage surface of the storage substrate. In order to afford a high writing speed the directional pattern of the collector electrode is oriented at an angle ranging from -45 degrees to +45 degrees with respect to the projection of the c axis of the single sapphire crystal on the storage surface of the substrate. The collector electrode is preferably in the form of electrically interconnected parallel stripes extending in the direction of the projected c axis.
    Type: Grant
    Filed: November 18, 1983
    Date of Patent: July 30, 1985
    Assignee: Iwatsu Electric Co., Ltd.
    Inventor: Takefumi Kato
  • Patent number: 4490643
    Abstract: An information storage device having an evacuated envelope containing writing means which is adapted to produce, in response to an input signal and by causing emission of secondary electrons, a charge pattern on a storage target disposed within the envelope. The storage target includes a semiconducting layer and a storage layer providing alternate semiconducting regions and storage regions. The semiconducting layer consists essentially of semiconductor material of substantially single conductivity type and the storage regions consist essentially of a secondary electron-emissive insulating compound of a semiconductor material. One of the two layers is interrupted and exposes portions of the other layer. A collector electrode disposed within the envelope intercepts the secondary electrons emitted by the target. The target is provided with means for applying electrical potential thereto and extracting signals therefrom.
    Type: Grant
    Filed: May 19, 1971
    Date of Patent: December 25, 1984
    Assignee: RCA Corporation
    Inventor: Robert S. Silver
  • Patent number: 4389591
    Abstract: A charge storage target of cathode ray electron devices comprises a conductive layer and a resistive layer having a common interface therewith, and an insulative layer. At least one of the layers has perforations so that only the resistive and insulative layers are exposed to electron impingement. The perforations define a plurality of elemental regions on which elemental electron image is stored. The resistive regions that cover the underlying conductive layer serve as buffer areas for the entering electrons of which the magnitude is proportional to the amount of charges deposited on the exposed insulative regions, and transfer the stored energy to the underlying layer.
    Type: Grant
    Filed: January 11, 1980
    Date of Patent: June 21, 1983
    Assignee: Matsushita Electric Industrial Company, Limited
    Inventor: Yoshihiro Uno
  • Patent number: 4370590
    Abstract: A method for storing data in an archival memory semiconductor target by providing a masking layer of a conductive material on the surface of an insulative layer upon the top surface of a semiconductor substrate; the material layer is assigned a two-dimensional array of possible data storage sites. The masking layer at those storage sites at which a first binary value is to be stored, is melted; the selected material is one which, at the melting temperature thereof, does not wet the surface of the chosen insulator whereby apertures are formed by the writing electron beam in the masking layer, at energy levels insufficient to evaporate the masking material. The writing beam energy is reduced at the data sites at which data bits of the remaining binary value are to be stored, and does not melt the masking material thereat.
    Type: Grant
    Filed: September 25, 1980
    Date of Patent: January 25, 1983
    Assignee: General Electric Company
    Inventor: Harold F. Webster
  • Patent number: 4325084
    Abstract: The invention relates to a semiconductor cathode based on avalanche breakdown in the p-n junction. The released electrons obtain extra accelerating energy by means of an electrode provided on the device. The achieved efficiency increase makes the manufacture of such cathodes in planar silicon technology sensible. Such cathodes are applied, for example, in cathode ray tube, flat displays, pick-up tubes and electron lithography.
    Type: Grant
    Filed: July 21, 1980
    Date of Patent: April 13, 1982
    Assignee: U.S. Philips Corporation
    Inventors: Gerardus G. P. van Gorkom, Arthur M. E. Hoeberechts
  • Patent number: 4149108
    Abstract: A multistable or memory electron beam addressed electroluminescent display panel is provided. The display panel is electron beam activated in the presence of an A. C. field, without the need of prior art flood guns. The panel may be activated or switched by direct electron beam activation of an electroluminescent film or by electron beam induced light radiation from a cathodoluminescent layer or from an insulating layer.
    Type: Grant
    Filed: June 17, 1977
    Date of Patent: April 10, 1979
    Assignee: International Business Machines Corporation
    Inventor: Ifay F. Chang
  • Patent number: 4133047
    Abstract: Dislosed is a system for retrievably storing information in a storage medium comprising a laterally extending regular lattice of substantially identical units. Each unit is approximately the size of a large biological molecule or a virus (i.e. several hundred Angstroms or less), and can in fact be a single biological molecule, a single virus, or an equivalent particle or aggregate. Any individual unit can be selectively modified by a narrowly focused electron beam without affecting adjacent units, to thereby store (write in) information as a pattern of modified lattice units. After a lattice has been so modified, it can be stabilized by depositing thereon a thin metallic layer, and the stored information can be read out by a detecting electron beam.
    Type: Grant
    Filed: February 12, 1975
    Date of Patent: January 2, 1979
    Inventor: Cyrus Levinthal
  • Patent number: 4131821
    Abstract: An admixture of yttrium oxide, or yttrium oxysulfide, or yttrium oxide or yttrium oxysulfide activated by a rare earth element and P1 phosphor having metal oxide particles adhered or bonded at random locations on the surfaces of the P1 phosphor particles provides a viewable bistable storage target for cathode ray tubes having increased operating life.
    Type: Grant
    Filed: September 6, 1977
    Date of Patent: December 26, 1978
    Assignee: Tektronix, Inc.
    Inventor: Ralph A. Mossman
  • Patent number: 4079289
    Abstract: A storage tube which makes it possible to record and read-out digital messages with good addressing accuracy comprises a storage target on which recording tracks are formed, along which the recording and thereafter the read-out electron beam are displaced. Appropriate biasing of the conductive bands separating the tracks makes it possible to achieve good addressing accuracy.
    Type: Grant
    Filed: December 27, 1976
    Date of Patent: March 14, 1978
    Assignee: Thomson-CSF
    Inventor: Bernard Courtan
  • Patent number: 4051406
    Abstract: A target for electronic storage tubes of the non-direct viewing type having a target comprised of substantially coplanar insulating and conducting areas wherein the insulating area is provided on one face of the conducting area in a predetermined and preferably striped pattern. The insulating pattern is comprised of at least a layer of ionizing radiation insensitive material taken from the group of materials comprised of silicon nitride, silicon oxynitride, aluminum oxide.
    Type: Grant
    Filed: September 24, 1975
    Date of Patent: September 27, 1977
    Assignee: Princeton Electronic Products, Inc.
    Inventor: Albert S. Waxman
  • Patent number: 4047999
    Abstract: A memory device and method is disclosed wherein positions of ions associated with a film are varied locally with respect to the film's surface by an electric field. A writing and erasing field is created by voltage modulating the film's conducting substrate in synchronization with low intensity electron bombardment of a local area of the film's surface by a scanning electron beam.The ion's position in the film varies the film's surface potential and alters the angular distribution imparted by its surface to primary diffracted and secondary emitted electrons. In the invention's read mode a scanning electron beam, combined with a detector discriminator, analyzes these emitted electrons to determine the surface potential at each address on the film thus reading out data stored in the film. A second means of reading out stored information utilizing detection of low energy electrons selectively diffracted by ions near the film's surface is disclosed.
    Type: Grant
    Filed: December 22, 1975
    Date of Patent: September 13, 1977
    Inventor: Francis John Salgo
  • Patent number: 4012660
    Abstract: A low capacitance high speed signal storage plate for a signal storage tube with a raster of insulating areas of 1 .mu.m or greater thickness, and process for producing same. The insulating areas may be individual islands on a conductive plate, islands supported by projections extending from the plate, an integral layer supported by such projections, or islands carried on doped portions of a semiconductive plate.
    Type: Grant
    Filed: February 21, 1973
    Date of Patent: March 15, 1977
    Assignee: Siemens Aktiengesellschaft
    Inventors: Reinhard Losehand, Wolfgang Welsch, Werner Veith
  • Patent number: 3995190
    Abstract: A memory device and method is disclosed wherein positions of ions associated with a film are varied locally with respect to the film's surface by an electric field. A writing and erasing field is created by voltage modulating the film's conducting substrate in syncronization with low intensity electron bombardment of a local area of the film's surface by a scanning electron beam.The ion's position in the film varies the film's surface potential and alters the angular distribution imparted by its surface to primary diffracted and secondary emitted electrons. In the invention's read mode a scanning electron beam, combined with a detector discriminator, analyzes these emitted electrons to determine the surface potential at each address on the film thus reading out data stored in the film. A second means of reading out stored information utilizing detection of low energy electrons selectively diffracted by ions near the film's surface is disclosed.
    Type: Grant
    Filed: December 22, 1975
    Date of Patent: November 30, 1976
    Assignees: Butler, Binion, Rice, Cook & Knapp, Arthur M. Dula
    Inventor: Francis John Salgo
  • Patent number: 3949264
    Abstract: An electronic storage tube of the electron beam modulated type employing a target structure of the "coplanar grid" type in which the coplanar grid is a multilayered structure having at least one layer thereof which is more immune to ionizing radiation, such as X-rays, than at least one of the remaining layers, to yield a target structure in which erasure time and retention time are both significantly improved even though the stored pattern is repetitively read out.A method is also described herein for operating target structures of the type described hereinabove to take advantage of the above mentioned advantageous characteristics and thereby yield an electronic storage tube having operating characteristics not heretofore capable of being provided in conventional structures.
    Type: Grant
    Filed: March 8, 1974
    Date of Patent: April 6, 1976
    Assignee: Princeton Electronics Products, Inc.
    Inventor: Steven R. Hofstein
  • Patent number: 3940651
    Abstract: A target structure for electronic storage tubes which is of the "coplanar grid" type. The target comprises a conducting layer which in a preferred configuration has slender elongated pedestals supporting elongated spaced parallel insulating strips which serve as the coplanar grid. The spaces between adjacent edges of insulating strips expose regions of the conducting layer to enable an electron beam to contact the exposed regions of the conducting layer. The pedestals support the insulating strips a spaced distance above the exposed regions of the conducting layer to form "vacuum gaps" which serve to inhibit electrical charge on the surfaces of the insulating strips from transferring to the interface between each strip and the vacuum gap. The pedestals may be an integral part of the conducting layer or may be formed from an insulating material. Methods for producing the novel target are described.
    Type: Grant
    Filed: March 8, 1974
    Date of Patent: February 24, 1976
    Assignee: Princeton Electronics Products, Inc.
    Inventor: Steven R. Hofstein