Abstract: The invention relates to a buck converter comprising an input for receiving an input voltage, an output node for providing an output voltage to a load, a rectifier circuit coupled to the input, a first switch coupled between a first output of the rectifier circuit and a switching node, a second switch coupled between the switching node and a second output of the rectifier circuit, an inductor coupled between the switching node and the output, a first capacitor coupled between the first output of the rectifier and the output, a second capacitor coupled between the output and the second output of the rectifier and a controller. The controller controls the first switch and the second switch and arranged to operate the buck converter in a first mode and a second mode.

Abstract: A three-level converter includes a high-voltage side unit, a low-voltage side unit, a flying capacitor, a first switch to a fourth switch, and a control unit. When a voltage of the flying capacitor falls outside a safe target voltage range, the control unit may control the third switch and the fourth switch to be normally open, and control, based on the voltage of the flying capacitor and a voltage of the low-voltage side unit, each of the first switch and the second switch to be turned on or off, so that the voltage of the flying capacitor falls within the target voltage range. Alternatively, the control unit may control the first switch and the second switch to be normally open, and control, based on the voltage of the flying capacitor and a voltage of the low-voltage side unit.

Abstract: A thermal foldback control system including a temperature sensitive circuit configured to output a reference voltage corresponding to a temperature of at least one selected from a group consisting of a light emitting diode (LED) driver, a LED engine, and a LED, wherein a driver output of the LED driver is based on the reference voltage.

Abstract: A vehicle power supply system mounted on a vehicle is provided. The vehicle power supply system includes a main battery, a power converting apparatus configured to convert DC power of the main battery into AC power, a switch configured to switch a state between energization and cutoff between the main battery and the power converting apparatus, a first DC-DC converter connected to a power supply wiring between the switch and the power converting apparatus, and a second DC-DC converter connected to a power supply wiring between the switch and the main battery. The first DC-DC converter and the second DC-DC converter are mounted at positions distant from each other in the vehicle.

Abstract: A multiphase switching converter includes: a plurality of phases, an output capacitor, and a control loop. Each phase includes: a current detection device, a pulse width modulator, a set of switching devices, and an inductor. The control loop is configured to generate a first current signal to the current detection device of each phase of the plurality of phases. The first current signal is proportional to an average current generated by the plurality of phases. The current detection device of each phase provides a signal to a corresponding PWM to control a duty cycle of the set of switching devices to equalize the current generated by each phase and maintain a charge balance on the output capacitor.

Abstract: A switching regulator is disclosed comprising a high-voltage port, a low-voltage port, n number of switching poles, a magnetic element, and a controller. In turn, each switching pole connects across the high-voltage port and may consist of either one switch and one diode or two switches and two diodes. In turn, the magnetic element comprises a ferro-core having n number of magnetic branches, each of which includes a winding. Each winding start connects to the phase node of a respective switching pole, while each winding finish connects, in common, to one side of the low-voltage port. An n+1th magnetic branch establishes a defined common-mode inductance which, in combination with transformer action, limits current ripple. The transformer action serves to exchange ripple power between phases such that the need for inductance is greatly reduced.

Abstract: A power conversion circuit includes an input positive terminal, an input negative terminal, an output positive terminal, an output negative terminal, a first switch bridge arm, a first resonant branch, a capacitor branch, an output inductor unit and an output capacitor. The input negative terminal is electrically connected with the output negative terminal. The first switch bridge arm is electrically connected between the input positive terminal and the input negative terminal. The first switch bridge arm includes a first switch, a second switch, a third switch and a fourth switch. The first switch and the second switch are electrically connected with a first node. The second switch and the third switch are electrically connected with a second node. The third switch and the fourth switch are electrically connected with a third node. The first resonant branch is electrically connected between the first node and the third node.

Abstract: A voltage conversion circuit includes: an inductor, a first switch module, N second switch modules connected in series, N third switch modules connected in series, and N?1 flying capacitors. One terminal of the first switch module is separately connected to one terminal of the N second switch modules connected in series and one terminal of the N third switch modules connected in series. The other terminal of the N third switch modules connected in series is connected to a positive electrode of a high-voltage power supply. The other terminal of the first switch module and the other terminal of the N second switch modules connected in series are connected to a negative electrode of the high-voltage power supply. A low-voltage power supply is connected to the two terminals of the first switch module through the inductor.

Abstract: A voltage conversion circuit includes: an inductor, a first switch module, N second switch modules connected in series, N third switch modules connected in series, and N?1 flying capacitors. One terminal of the first switch module is separately connected to one terminal of the N second switch modules connected in series and one terminal of the N third switch modules connected in series. The other terminal of the N third switch modules connected in series is connected to a positive electrode of a high-voltage power supply. The other terminal of the first switch module and the other terminal of the N second switch modules connected in series are connected to a negative electrode of the high-voltage power supply. A low-voltage power supply is connected to the two terminals of the first switch module through the inductor.

Abstract: A circuit technique substantially reduces the switching losses in an AC-DC power conversion system caused by turn-on characteristics of a main switch and the reverse-recovery characteristic of a rectifier. The losses are reduced by using an active soft-switching cell having a series inductor, a series capacitor, a main switch, a rectifier switch, and an auxiliary switch. The reverse-recovery related losses are reduced by the series inductor connected between the main and rectifier switches to control the rate of current change in the body diode of the rectifier switch during its turn-off. The main switch, the rectifier switch, and the auxiliary switch operate under zero-voltage switching (ZVS) conditions.

Abstract: A damage predicting device of a power semiconductor switching element includes a resistor connected to a gate of the power semiconductor switching element, and control circuitry. The control circuitry compares a detection voltage matching a voltage generated between two ends of the resistor and a reference voltage, and predicts that predetermined damage has been accumulated in a gate insulating layer in the power semiconductor switching element when the detection voltage exceeds the reference voltage.

Abstract: The present document describes a power converter configured to provide energy at an output based on energy provided at an input. The power converter comprises a first switch, wherein a first node is coupled to the input and wherein a second node is coupled to an intermediate point, a second switch, wherein a first node is coupled to the intermediate point and wherein a second node is coupled to an inductor point, a capacitor, wherein a first node of the capacitor is coupled to the intermediate point, a first diode element, wherein a first node is coupled to a second node of the capacitor and wherein a second node is coupled to the inductor point, a second diode element, wherein a first node is coupled to a reference port, and wherein a second node is coupled to the second node of the capacitor; and an inductor, wherein a first node is coupled to the inductor point and wherein a second node is coupled to the output.

Abstract: Aspects of the disclosure provide for a circuit. In some examples, the circuit includes a timing circuit and a state machine circuit. The timing circuit determines a relationship between a duty cycle of a power converter and a threshold value. The state machine circuit is coupled to the timing circuit and includes a plurality of states including a buck state, a boost state, and a buck-boost state. The state machine circuit transitions among the plurality of states according to time domain control and voltage domain control, based at least partially on the determined relationship between the duty cycle and the threshold value, transitions among the states according to the time domain control when the time domain control indicates an exit from the buck-boost state, and transitions among the states according to the voltage domain control when the voltage domain control indicates the exit from a buck-boost state.

Abstract: An apparatus for controlling a power converter that includes an inductance and a switched-capacitor network that cooperate to transform a first voltage into a second voltage features a controller, a switched-capacitor terminal for connection to the switched-capacitor network, and switches. at least one of which connects to the switched-capacitor terminal.

Abstract: A CR snubber element includes a first resistance part, a first capacitance part, a second resistance part, and a second capacitance part. The first capacitance part is connected in series to the first resistance part. The second resistance part is connected in series to the first resistance part and the first capacitance part and the second capacitance part is connected in parallel to the second resistance part. The CR snubber element is configured such that the second resistance part is disconnected when the first capacitance part is short-circuited.

Abstract: A multi-level boost apparatus. Voltage allocation among N first switches is achieved by arranging the N voltage dividing modules. It is prevented that the second one to the N-th one of the first switches break down and fail due to overvoltage. By arranging an (i?1)-th clamp branch at a common node between an (i?1)-th second switch and an i-th second switch, a voltage bore by the i-th second switch is clamped at a difference between a voltage across the fourth branch (namely, an output voltage of the multi-level boost apparatus) and a voltage across the corresponding clamp branch. The risk is avoided that a second one to the N-th one of the second switches break down due to overvoltage at an instant of being powered, in a case that the input voltage is low.

Abstract: A double-sided coolable semiconductor package includes an upper electrically conductive element having an outwardly exposed metal surface, a lower carrier substrate having an upper electrically conductive layer, a lower electrically conductive layer with an outwardly exposed surface and an electrical insulating layer arranged between the upper and lower electrically conductive layers, a first electrically conductive spacer arranged between the upper electrically conductive element and the upper electrically conductive layer, a power semiconductor chip arranged between the upper electrically conductive element and the upper electrically conductive layer, a second electrically conductive spacer arranged between the upper electrically conductive element and the power semiconductor chip, and a passive electrical component electrically connected to the upper electrically conductive layer of the lower carrier substrate.

Abstract: A method for maintaining reliability of a distributed power system including a power converter having input terminals and output terminals. Input power is received at the input terminals. The input power is converted to an output power at the output terminals. A temperature is measured in or in the environment of the power converter. The power conversion of the input power to the output power may be controlled to maximize the input power by setting at the input terminals the input voltage or the input current according to predetermined criteria. One of the predetermined criteria is configured to reduce the input power based on the temperature signal responsive to the temperature. The adjustment of input power reduces the input voltage and/or input current thereby lowering the temperature of the power converter.

Abstract: A boost converter includes a first inductor, a power switch element, a tuning circuit, and an output stage circuit. The first inductor is configured to receive an input voltage. A parasitic capacitor is built in the power switch element. The power switch element selectively couples the first inductor to a ground voltage according to a clock voltage. The output stage circuit is configured to generate an output voltage. The tuning circuit includes a second inductor, a third inductor, and a current-limiting path. The second inductor is coupled to the first inductor and the power switch element. The third inductor is coupled through the current-limiting path to the output stage circuit. The first inductor, the second inductor, and the third inductor are mutually coupled to each other, so as to form an equivalent transformer.

Abstract: This document discusses, among other things, a signal receiving circuit, configured to receive an input voltage signal. The signal receiving circuit can comprise an input voltage regulating circuit and a comparing circuit. The input voltage regulating circuit can carry out a waveform pre-regulation for the input voltage signal to obtain a first voltage signal, and the comparing circuit can compare the first voltage signal with a second voltage signal, and output a comparison voltage signal having a pulse width that satisfies a first predetermined condition indicative that the input voltage signal is correctly identifiable. The present document further discusses a signal detecting circuit and a signal receiving method.

Abstract: A converter includes a first circuit. The first circuit includes a first input that receives a power supply signal, a second input that receives a first signal, and a first output that outputs a second signal having an amplitude that is based on a frequency of the first signal. The first signal is based on an error value and a third signal, and the third signal is independent of feedback of the first circuit. The converter also includes a second circuit having a second output coupled to the second input and that outputs the third signal. The second circuit nonlinearly adapts the third signal based on the power supply signal and a reference signal.

Abstract: A power supply circuit includes an energy storage element, a first switch, a voltage signal converter, a second switch, a third switch and a power supply. The first switch is coupled to the energy storage element at a first voltage output terminal. The voltage signal converter is coupled to, respectively, the energy storage element and the first switch at a first converter output terminal and a second converter output terminal. The second switch is coupled to the first switch. The third switch is coupled to the second switch at a second voltage output terminal. The power supply is coupled to the second switch and the third switch. The energy storage element, the first switch, the voltage signal converter, the second switch, the third switch and the power supply cooperate and generate a output voltage. A method of operating the power supply circuit is also disclosed herein.

Abstract: Circuits and devices are provided for reliably holding a normally-off Gallium Nitride (GaN) power transistor, such as a Gate Injection Transistor (GIT), in a non-conducting state when a gate of the power transistor is not driven with an active (turn-on) control signal. This is accomplished by coupling a normally-on pulldown transistor between the gate and the source of the power transistor, such that the pulldown transistor shorts the gate to the source when the power transistor is not set for its conducting state. The pulldown transistor is preferably located on the same semiconductor die as, and in close proximity to, the power transistor, so as to avoid spurious noise at the power transistor gate that may unintentionally turn on the power transistor. A pulldown control circuit is coupled to the gate of the pulldown transistor and autonomously turns off the pulldown transistor when the power transistor is set to conduct.

Abstract: A switch controller performs first sleep operation, to which a transition from normal operation is made when a light load is detected, and second sleep operation, to which a transition is made after the first sleep operation. In the first sleep operation, a coil current is passed via a body diode of any of a plurality of transistors that is off to an input voltage side or to an output voltage side. In the second sleep operation, a current path from at least one of first and second connection nodes to ground is formed.

Abstract: Voltage regulator circuits and methods therefor provided. In some embodiments, a voltage regulator circuit comprises: a first switch coupled to a power input; a second switch coupled to the first switch; a switching node between the first switch and the second switch; an inductor coupled between the switching node and an output node; a capacitor coupled between the output node and ground; a driver configured to operate the first and second switches according to a pulse-width-modulated (PWM) signal; a PWM circuit configured to generate the PWM signal based on at least an error signal; and a phase detector configured to generate the error signal based on a phase difference between the PWM signal and a clock reference signal.

Abstract: A power supply includes a power converter, a reference voltage generator, and a controller. During operation, the power converter produces an output voltage to power a load. The reference voltage generator (such as a voltage mode amplifier circuit) generates a floor reference voltage, a magnitude of which varies as a function of the output voltage. The controller compares an output voltage feedback signal (derived from the output voltage) to the floor reference voltage to produce control output to control timing of activating switches in the power converter to maintain the output voltage within a desired voltage range.

Abstract: Example MOSFET circuits include a first metal-oxide-semiconductor field-effect transistor (MOSFET) having a gate, a source and a drain, and a second MOSFET coupled in series with the first MOSFET. The second MOSFET has a gate, a source and a drain. The MOSFET circuit also includes a controller configured to supply a same control signal to the gate of the first MOSFET and the gate of the second MOSFET to turn on or turn off the first MOSFET and the second MOSFET when a drain-source voltage of the first MOSFET and a drain-source voltage of the second MOSFET are substantially zero. Other MOSFET circuits and methods of operating MOSFET circuits are also disclosed.

Abstract: A DC-DC converter includes: a first switch; a second switch connected to the first switch; a mode selecting circuit to select a converting mode from one of at least a first mode and a second mode based on an input voltage; and a controller to generate a first switching control signal for controlling the first switch based on the converting mode, and a second switching control signal for controlling the second switch based on the converting mode.

Abstract: A monitor circuit monitors a gate potential applied to a gate of a high-side transistor or monitors an output potential generated at an output terminal and generates either one or both of a high-side sampling timing and a high-side holding timing based on the monitored result. A current detection circuit detects an inductor current flowing in an inductor and generates a first detection voltage proportional to the inductor current. A sample-and-hold circuit starts a sampling operation of the first detection voltage in response to the high-side sampling timing and starts a holding operation of the first detection voltage in response to the high-side holding timing so as to output a second detection voltage.

Abstract: A method for controlling an electrochromic device is provided. The method includes applying a constant supply current to the electrochromic device and determining an amount of charge transferred to the electrochromic device, as a function of time and current supplied to the electrochromic device. The method includes ceasing the applying the constant supply current, responsive to a sense voltage reaching a sense voltage limit and applying one of a variable voltage or a variable current to the electrochromic device to maintain the sense voltage at the sense voltage limit, responsive to the sense voltage reaching the sense voltage limit. The method includes terminating the applying the variable voltage or the variable current to the electrochromic device, responsive to the determined amount of charge reaching a target amount of charge.

Abstract: A voltage converter includes a third switch element and a second energy storage element, and an energy storage circuit comprising a first switch element, a second switch element, and a first energy storage element. In a time period, the first switch element is in an on state, the second switch element and the third switch element are in an off state, and a voltage source coupled to the voltage converter charges the first energy storage element and the second energy storage element, and in a following time period, the first switch element is in an off state, the second switch element and the third switch element are in an on state, the first energy storage element and the second energy storage element discharge to a load coupled to the voltage converter.

Abstract: When a pulsed waveform is used to transmit power-supply power in a form of a power packet etc., a filter for reducing harmonic components is disposed on a power transmission side. A switch and a control portion for controlling ON/OFF of a function of the filter are provided to turn ON the function of the filter limitedly at each of timings t1 to t2 and t3 to t4 at which the power is transmitted. The harmonic components are reduced from the waveform of the transmission power by the function of the filter. Radiation noise generated by the wire harness is reduced in a high frequency region. The function of the filter is turned OFF at a timing at which digital information is transmitted so that a waveform of the digital information can be prevented from being deformed.

Abstract: A circuit is proposed comprising (i) a first switching path comprising at least one electronic switch, wherein the first switching path can turn off in both directions and can turn on in both directions, and (ii) a second switching path comprising two electronic switches and at least one capacitance, wherein one diode path per electronic switch is embodied in parallel with the electronic switch or in series with the electronic switch. Additionally, a method for operating such a circuit is specified.

Abstract: The disclosed technology can be used to convert direct-current voltage and current from an input to a different or the same voltage and current at an output. One example direct-current to direct-current (DC-DC) power converter includes a first switch connected between a source voltage and a first side of an inductor, a second switch connected between the first side of the inductor and a ground, a third switch connected between a second side of the inductor and the ground, and a fourth switch connected between the second side of the inductor and a capacitor. The power converter may further include a comparator configured to compare an output voltage at the capacitor to a threshold voltage and based on the result of the comparison selectively activate or deactivate the first, second, third, and fourth switches in a power cycle.

Abstract: A voltage regulator circuit comprises a switching circuit configured to adjust a switching duty cycle to regulate an output voltage at an output node of the voltage regulator circuit using an error signal representative of a difference between a target voltage value and the output voltage; an inductor coupled to the switching circuit and configured to provide an inductor current to the output node; and a shunt circuit coupled in parallel to the inductor and configured to divert the inductor current away from the output node when the output voltage exceeds a specified maximum output voltage.

Abstract: A multiphase DC-DC converter includes a coupled inductor, N phases of the multiphase DC-DC converter, and a controller, where N is an integer greater than 2. The coupled inductor includes a plurality of inductors. Each inductor is coupled to two neighboring inductors or to rest of the inductors. The N phases of the multiphase DC-DC converter are respectively connected to the plurality of inductors. The controller operates the multiphase DC-DC converter in continuous conduction mode and in discontinuous conduction mode. Body diodes of switches in the N phases do not conduct when the multiphase DC-DC converter operates in discontinuous conduction mode.

Abstract: Various examples are provided related to fault-tolerant controller architectures for multi-level converters. In one example, a multi-level converter includes an array of power modules. The power modules can include a controller communicatively coupled to controllers of adjacent power modules in the array of power modules. Circuitry of the controllers can receive operational data from the adjacent power modules; identify a fault condition in an adjacent power module using the operational data; and initiate reconfiguration of the array of power modules in response to an indication of the fault condition, where the reconfiguration bypasses the adjacent power module. In another example, a method includes identifying a fault condition in an adjacent power module in an array of power modules based upon operational data from one or more adjacent power modules of the array; and initiating reconfiguration of the array of power modules in response to an indication of the fault condition.

Abstract: Circuits and devices are provided for reliably holding a normally-off Gallium Nitride (GaN) power transistor, such as a Gate Injection Transistor (GIT), in a non-conducting state when a gate of the power transistor is not driven with an active (turn-on) control signal. This is accomplished by coupling a normally-on pulldown transistor between the gate and the source of the power transistor, such that the pulldown transistor shorts the gate to the source when the power transistor is not set for its conducting state. The pulldown transistor is preferably located on the same semiconductor die as, and in close proximity to, the power transistor, so as to avoid spurious noise at the power transistor gate that may unintentionally turn on the power transistor. A pulldown control circuit is coupled to the gate of the pulldown transistor and autonomously turns off the pulldown transistor when the power transistor is set to conduct.

Abstract: There are provided methods and systems for interfacing converters and solar power arrays. For example, there is provided a method for interfacing a solar power generation apparatus with an electricity grid. The method can include connecting a first level and a second level of the solar power generation apparatus to a two-level converter. Furthermore, the method can include interfacing the two-level converter with the electricity grid via a four-wire connection.

Abstract: Various embodiments provide a resonant converter that includes a synchronous rectifier driver. The synchronous rectifier driver reduces voltage spikes on drains of transistors within the resonant converter by placing an active clamp between the drains of the transistors and an output terminal of the resonant converter. The active clamp reduces the voltage spikes by sinking current at the drains of the transistors to an output capacitor. By sinking the current to the output terminal, power loss is minimized and efficiency of the resonant converter is improved.

Abstract: A regulation method for current limiting control, comprising: S1. regulating a current limiting threshold in real time based on a current limiting action: S2. controlling switch transistors based on the regulated current limiting threshold. By implementing the regulation method and device, it is made possible to regulate a current limiting threshold in real time directly based on a current limiting action, such that a current uprush in a first PWM wave will be significantly suppressed at the time of sudden loading or occurrence of a short circuit. Further, by regulating the current limiting threshold in real time based on the current limiting action and an inductive current, it is not only made possible to satisfy proper load-carrying capability, but also made possible to prevent a current uprush in a first PWM wave from being too high at the time of sudden loading or occurrence of a short circuit.

Abstract: A current measurement linearization circuit for a DC/DC boost converter includes a back-gate sensing transistor and a back-gate reset transistor. The back-gate sensing transistor has a first terminal coupled to a first body contact of a high-side power transistor and a second terminal coupled to a second body contact of a first replica transistor in a valley-current sensing circuit. The back-gate reset transistor has a first terminal coupled to a max reference voltage that is equal to the greater of an input voltage and an output voltage and a second terminal coupled to the second body contact.

Abstract: A power supply device and a power supply method are provided. The power supply device is configured to generate a first feedback signal according to an output power source, and operate in a skip mode (or called burst mode) according to the first feedback signal. The power supply device is configured to obtain an overall efficiency according to an input power and an output power, and obtain a difference between the overall efficiency and a preset efficiency. When an output current value of the output power source is within a predetermined range and the difference is greater than a first value, the power supply device generates a second feedback signal and stops operating in the skip mode according to the second feedback signal.

Abstract: A DC-DC converter includes: a first switch; a second switch connected to the first switch; a mode selecting circuit to select a converting mode from one of at least a first mode and a second mode based on an input voltage; and a controller to generate a first switching control signal for controlling the first switch based on the converting mode, and a second switching control signal for controlling the second switch based on the converting mode.

Abstract: A dc-dc converting circuit and a method for controlling the same are provided. The dc-dc converting circuit includes an output stage, a mode detection circuit, a PWM signal generating circuit and a ramp signal generating circuit. The output stage provides an output voltage. The mode detection circuit provides a mode detection signal. The PWM generating circuit provides a time signal to the output stage. When the dc-dc converting circuit enters a continuous conduction mode from a discontinuous conduction mode, the ramp signal generating circuit provides a second ramp signal to the PWM signal generating circuit in a preset time according to the mode detection signal. The ramp signal generating circuit provides a first ramp signal to the PWM signal generating circuit after the preset time. A slope of the second ramp signal is greater than a slope of the first ramp signal.

Abstract: Operating buck-boost converters. At least some of the example embodiments are methods including: producing an output voltage and an output current from the buck-boost converter; sensing a feedback parameter by a sensor disposed between an inductor of the buck-boost converter and a load; generating an error signal based on the feedback parameter; running the buck-boost converter in a buck-only mode, the buck-only mode operating at a switching frequency and during periods of time when the error signal is within a first range of values; and changing to a buck-boost mode when the error signal is in a second range of values, the buck-boost mode operating at the switching frequency; and transitioning to a boost-only mode when the error signal is in a third range of values, the boost-only mode operating at the switching frequency.

Abstract: A DC-DC converter includes: a first switch; a second switch connected to the first switch; a mode selecting circuit to select a converting mode from one of at least a first mode and a second mode based on an input voltage; and a controller to generate a first switching control signal for controlling the first switch based on the converting mode, and a second switching control signal for controlling the second switch based on the converting mode.

Abstract: An ACF power converter uses a soft start operation to reduce overheating and stress on components. The power converter includes a first transistor and second transistor. A high side driver controls the first transistor, and low side driver controls the second transistor. A first operating potential is provided to the low side driver during a first period of time. The second transistor switches based on an oscillator signal having a first rate of frequency change to generate a second operating potential for the high side driver, while attempting to hold the first transistor in the non-conductive state during a second time period. The first and second transistors switch based on the oscillator signal having a second rate of frequency change during a third time period. The power converter is held in ACF mode and inhibited from changing state for a period of time post soft start.

Abstract: A DC-DC converter may include a first lower FET and a first upper FET connected in series between a high potential output wiring and a low potential wiring, and a second lower FET and a second upper FET connected in series between the high potential output wiring and the low potential wiring. Diodes may be connected to the upper FETs in parallel. A main reactor may be connected to the high potential input wiring. A first sub-reactor may be connected between the main reactor and the first lower FET. A second sub-reactor may be connected between the main reactor and the second lower FET. The first upper FET and the second upper FET are not turned on during a zero-cross mode.

Abstract: A rectifier, including: a first and a second input terminal, a first output terminal and at least one rectifying circuit. Each rectifying circuit including: a switching circuit including a transistor, and a driving circuit. The driving circuit is coupled to the switching circuit and controls a switching status of the switching circuit, and includes a totem-pole circuit and an input transistor. The totem-pole circuit includes an input terminal and an output terminal coupled to the transistor. The input transistor is coupled between the totem-pole circuit and the switching circuit. The at least one rectifying circuit includes a first and a second rectifying circuit. The transistors of the first rectifying circuit and the second rectifying circuit are coupled to the first output terminal. The input transistors of the first rectifying circuit and the second rectifying circuit are coupled to the first input terminal and the second input terminal, respectively.