Miscellaneous Patents (Class 323/371)
  • Patent number: 10658923
    Abstract: A power converter system converts power from an input source for delivery to an active load. An input current surge at startup may be reduced by combining power converter switch resistance modulation with active load control. In another aspect, an input current surge at startup in an array of power converters may be reduced by periodically reconfiguring the array during the startup phase to accumulatively increase the output voltage up to a predetermined output voltage. A power converter may include a controller that provides an over-current signal to the load to reduce the load or advise of potential voltage perturbations.
    Type: Grant
    Filed: September 24, 2019
    Date of Patent: May 19, 2020
    Assignee: VLT, Inc.
    Inventor: Patrizio Vinciarelli
  • Patent number: 10540000
    Abstract: In an approach for controlling voltage, a computer obtains a magnitude of a current of a processing unit. The computer determines an optimized magnitude of a voltage based on the obtained magnitude of the current. The computer generates an updating instruction based on the determined optimized magnitude of the voltage. The computer supplies the generated updating instruction to the processing unit.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: January 21, 2020
    Assignee: International Business Machines Corporation
    Inventors: Mengze Liao, Yang Liu, Geng Tian, Xing Zhao
  • Patent number: 10454361
    Abstract: A power converter system converts power from an input source for delivery to an active load. An input current surge at startup may be reduced by combining power converter switch resistance modulation with active load control. In another aspect, an input current surge at startup in an array of power converters may be reduced by periodically reconfiguring the array during the startup phase to accumulatively increase the output voltage up to a predetermined output voltage. A power converter may include a controller that provides an over-current signal to the load to reduce the load or advise of potential voltage perturbations.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: October 22, 2019
    Assignee: VLT, Inc.
    Inventor: Patrizio Vinciarelli
  • Patent number: 10341124
    Abstract: The invention relates to a power distribution system comprising a power providing device (3) for providing power and a powered device (4, 5, 6) like a luminaire to be powered by the power providing device. The power providing device and the powered device are operable in a maximum power mode and a normal operation mode, wherein in the maximum power mode the powered device consumes an amount of power maximally consumable by the powered device and the power providing device measures the power consumed by the powered device. This measured power allows for an allocation of an amount of power in the operational mode, which is really maximally needed, wherein it is not necessary to allocate a larger amount of power, which is large enough to consider, for instance, a maximally assumed length of an electrical connection (8) connecting the devices, thereby improving the power budget allocation.
    Type: Grant
    Filed: July 24, 2014
    Date of Patent: July 2, 2019
    Assignee: SIGNIFY HOLDING B.V.
    Inventors: Bob Bernardus Anthonius Theunissen, Lennart Yseboodt, Henricus Theodorus Van Der Zanden, Matthias Wendt
  • Patent number: 10284192
    Abstract: A semiconductor device including a first control circuit, a memory and a second control circuit. The first control circuit includes a monitoring section which receives a voltage signal which includes a pulse signal having a plurality of different voltage levels superimposed on a power source voltage, monitors a level of the voltage signal and outputs a monitoring result, and a regulator which generates an internal voltage. The memory receives the internal voltage. The second control circuit receives the internal voltage, reproduces a clock and data from the pulse signal on the basis of the monitoring result, and performs trimming on the memory using the clock and the data.
    Type: Grant
    Filed: May 22, 2018
    Date of Patent: May 7, 2019
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Masashi Akahane
  • Patent number: 10205381
    Abstract: A power converter system converts power from an input source for delivery to an active load. An input current surge at startup may be reduced by combining power converter switch resistance modulation with active load control. In another aspect, an input current surge at startup in an array of power converters may be reduced by periodically reconfiguring the array during the startup phase to accumulatively increase the output voltage up to a predetermined output voltage. A power converter may include a controller that provides an over-current signal to the load to reduce the load or advise of potential voltage perturbations.
    Type: Grant
    Filed: May 10, 2018
    Date of Patent: February 12, 2019
    Assignee: VLT, Inc.
    Inventor: Patrizio Vinciarelli
  • Patent number: 10135363
    Abstract: A communication device for a field device for transferring output information to a controller, including a passive digital output with a first connection point and a second connection point, a circuit arrangement connected between the first connection point and the second connection point, and a control device configured to selectively put the circuit arrangement into one of a plurality of switching states according to the output information to be transferred. The communication device is configured, in a state in which the passive digital output is connected to the controller, to provide an electric output signal with a first signal value according to a first communication protocol at the connection points in a first switching state of the circuit arrangement and to provide the electric output signal with a second signal value according to the first communication protocol at the connection points in a second switching state of the circuit arrangement.
    Type: Grant
    Filed: January 19, 2018
    Date of Patent: November 20, 2018
    Assignee: FESTO AG & CO. KG
    Inventors: Martin Wiesner, Steffen Wunderlich
  • Patent number: 9934196
    Abstract: In one aspect, the invention comprises a thread optimized multiprocessor prepared by a semiconductor manufacturing process, comprising the steps of: (a) interconnecting less than 4 layers of metal on at least one die; (b) embedding at least one processor in said at least one die; and (c) mounting said at least one die on a dual inline memory module.
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: April 3, 2018
    Inventor: Russell H. Fish, III
  • Patent number: 9831913
    Abstract: A power source equipment for Power over Ethernet system continues to inspect power consumption of all connecting ports, in order to adjust power allocation to the communication ports. When the power consumption of a particular connecting port shows a trend of increase, its power allocation is increased; otherwise, decreased. After a total power allocation is decreased, additionally available power may be generated and provided to an additional communication port. A method for adjusting the power allocation is also disclosed.
    Type: Grant
    Filed: March 22, 2016
    Date of Patent: November 28, 2017
    Assignee: IC Plus Corp.
    Inventor: Hann Yun Tarn
  • Patent number: 9787172
    Abstract: Methods and systems are disclosed that may be employed to implement adaptive FET drive voltage optimization for voltage regulator (VR) integrated power stages (IPstages) that have different MOSFET RDS(on) characteristics to improve VR efficiency and current-sense accuracy.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: October 10, 2017
    Assignee: Dell Products LP
    Inventors: Shiguo Luo, Ralph H. Johnson
  • Patent number: 9154311
    Abstract: The coupling device comprises a controllable switch unit coupled to an output side of the communication cable, and having a first, a second and a third state. In the first state, a voltage of the communication cable is detected, and the setting of the controllable switch unit is changed from the first state to the second state, if the detected voltage is below a threshold level. In the second state, the communication cable is connected to a controller to check the reception of an identification signal indicating to the controller that a coupling device to couple a load to the cable is connected to the cable. If the identification signal is identified by the controller, the controllable switch unit connects the supply power source to the communication cable.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: October 6, 2015
    Assignee: CCS Technology, Inc.
    Inventor: Christian Heidler
  • Patent number: 8994322
    Abstract: Since in existent charge-discharge control the battery direct current resistance of a lithium ion battery increases at a low temperature or in a low SOC, the battery voltage may possibly exceed greatly the maximum allowable voltage instantaneously due to over-voltage during charging or may possibly decrease greatly to less than the minimum allowable voltage during discharging. If the lithium ion battery continuously lies in such a state the battery performance is degraded abruptly. The battery resistance of a lithium ion battery module is estimated in accordance with SOC and temperature of the lithium ion battery module, and current to charge is set properly based on the estimated battery resistance.
    Type: Grant
    Filed: June 28, 2012
    Date of Patent: March 31, 2015
    Assignee: Hitachi, Ltd.
    Inventors: Hironori Sasaki, Tsunenori Yamamoto
  • Patent number: 8929834
    Abstract: An EHF communication system including an EHF communication chip. The EHF communication chip may include an EHF communication circuit having at least one controllable parameter-based module having a testable and controllable operating parameter The EHF communication chip may further include a test and trim circuit coupled to the EHF communication circuit, where the test and trim circuit includes a logic circuit having one or more memory elements, where the logic circuit is coupled to the controllable parameter-based module.
    Type: Grant
    Filed: March 6, 2013
    Date of Patent: January 6, 2015
    Assignee: Keyssa, Inc.
    Inventors: Ian A. Kyles, Gary D. McCormack
  • Patent number: 8856557
    Abstract: An apparatus, system, and method are disclosed for providing power balancing for power supplies. A power module measures an amount of input power for each of a plurality of switching power supplies. A conversion module converts the measured amount of input power of each power supply to a digital power measurement signal. An averaging module determines an average amount of input power per power supply based on a summation of the digital power measurement signal of each power supply. A comparison module compares the digital power measurement signal of a power supply to the determined average amount of input power per power supply. An input power adjustment module adjusts the input power of the power supply to cause the amount of input power of the power supply to be substantially equal to the determined average amount of input power per power supply.
    Type: Grant
    Filed: June 3, 2010
    Date of Patent: October 7, 2014
    Assignee: International Business Machines Corporation
    Inventors: Robert DiMarco, Randhir S. Malik
  • Patent number: 8781434
    Abstract: Method and system for enhancing the power efficiency of a first wireless device that includes an energy receiver. In one implementation, the method includes receiving a transmitted signal at the first wireless device, converting the transmitted signal into power through the energy receiver, and providing the power to the first wireless device.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: July 15, 2014
    Inventor: Marcellus Chen
  • Patent number: 8707066
    Abstract: Embodiments of the invention relate to a method and apparatus for a zero voltage processor sleep state. A voltage regulator may be coupled to a processor to provide an operating voltage to the processor. During a transition to a zero voltage power management state for the processor, the operational voltage applied to the processor by the voltage regulator may be reduced to approximately zero while an external voltage is continuously applied to a portion of the processor to save state variables of the processor during the zero voltage management power state.
    Type: Grant
    Filed: May 31, 2011
    Date of Patent: April 22, 2014
    Assignee: Intel Corporation
    Inventors: Jose Allarey, Sanjeev Jahagirdar
  • Patent number: 8661273
    Abstract: Embodiments of power sourcing equipment (PSE) utilizing AC disconnect are provided herein. In one embodiment, a PSE is provided that includes a DC supply configured to provide a DC voltage over a data communications medium, a controller configured to provide an AC disconnect signal over the data communications medium, and a parallel inductor-capacitor (LC) circuit coupled between the DC supply and the data communications medium. The parallel LC circuit is configured to isolate the DC supply from the AC disconnect signal. In another embodiment, a PSE is provided that includes a DC supply configured to provide a DC voltage at an output, an inductor coupled between the output of the DC supply and a data communications medium, and a capacitor coupled between the data communications medium and ground. The inductor and capacitor form a series LC circuit configured to generate an AC disconnect signal.
    Type: Grant
    Filed: May 21, 2013
    Date of Patent: February 25, 2014
    Assignee: Broadcom Corporation
    Inventor: James Yu
  • Patent number: 8522055
    Abstract: Systems and methods are disclosed for validating a non-volatile memory (NVM) package for use in an electronic device before it is incorporated into the device. A NVM package may be validated by determining its power consumption profile, and if the profile meets predetermined criteria, that NVM package may be qualified for use in an electronic system. The power consumption profile may be obtained by issuing commands, such as read commands, to the NVM package to simultaneously access each die of the NVM package to invoke a maximum power consumption event. During this event, power consumption by the NVM package can be monitored and analyzed to determine whether the NVM package qualifies for use in an electronic device.
    Type: Grant
    Filed: July 26, 2010
    Date of Patent: August 27, 2013
    Assignee: Apple Inc.
    Inventors: Matthew Byom, Hugo Fiennes, Arjun Kapoor
  • Patent number: 8416721
    Abstract: Method and system for enhancing the power efficiency of a first wireless device that includes an energy receiver. In one implementation, the method includes receiving a transmitted signal at the first wireless device, converting the transmitted signal into power through the energy receiver, and providing the power to the first wireless device.
    Type: Grant
    Filed: September 19, 2007
    Date of Patent: April 9, 2013
    Inventor: Marcellus Chen
  • Patent number: 8347127
    Abstract: A technique to adjust a processor's operating voltage dynamically while preventing a user from placing the processor into a harmful operating voltage state in relation to the core/bus frequency ratio of the processor. More particularly, embodiments of the invention relate to a technique to control the operating voltage of the processor as a function of the processor's bus and/or core clock frequency.
    Type: Grant
    Filed: February 10, 2011
    Date of Patent: January 1, 2013
    Assignee: Intel Corporation
    Inventor: Paul Zagacki
  • Patent number: 8336977
    Abstract: A printer includes: an inkjet print head; an image processing part that processes image data and supplies the data to the print head; a main power supply that is connected to a commercial power source and supplies first power to the print head; a rechargeable sub-power supply that supplies second power for supporting the first power to the print head when power necessary for driving of the print head exceeds the first power during execution of printing; and a switch part that is located on a power supply line and electrically connects the sub-power supply to the power supply line when the power necessary for driving of the print head exceeds the first power.
    Type: Grant
    Filed: March 2, 2007
    Date of Patent: December 25, 2012
    Assignee: Sony Corporation
    Inventors: Toshio Narushima, Naohide Koumura
  • Patent number: 8201002
    Abstract: A control system for saving power in an electronic device obtains information of maximum power that can be supplied to the electronic device by each power supply, detects how much power is demanded by the electronic device, determines minimum number of the plurality of power supplies, based on the detected power demanded by the electronic device, and turns on power supplies, of which the number is equal to the determined minimum number, and turn off the other power supplies.
    Type: Grant
    Filed: August 31, 2009
    Date of Patent: June 12, 2012
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Li-Wen Chang
  • Patent number: 8145922
    Abstract: A system and method for discovering a cable type and resistance for Power over Ethernet (PoE) applications. Cabling power loss in PoE applications is related to the resistance of the cable itself. A PHY can be designed to measure electrical characteristics (e.g., insertion loss, cross talk, length, etc.) of the Ethernet cable to enable determination of the cable resistance. The determined resistance can be used in powering decisions and in adjusting power budgets allocated to power source equipment ports.
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: March 27, 2012
    Assignee: Broadcom Corporation
    Inventors: Wael William Diab, Minshine Shih
  • Patent number: 8055928
    Abstract: Some embodiments of the present invention provide a system that controls a device that characterizes the health of a computer system power supply. During operation, a signature for the power supply is generated based on measurements of a set of performance parameters for the power supply. Then, the health of the power supply is characterized based on a comparison between the signature for the power supply and signatures for one or more other power supplies.
    Type: Grant
    Filed: August 28, 2008
    Date of Patent: November 8, 2011
    Assignee: Oracle America, Inc.
    Inventors: Anton A. Bougaev, Aleksey M. Urmanov, Kenny C. Gross
  • Publication number: 20110260643
    Abstract: Some embodiments regard a method comprising: using an input voltage to generate an output voltage having a first voltage level; in a first period, when the output voltage changes from the first voltage level to a second voltage level, storing electrical charges resulted from the output voltage changing from the first voltage level to the second voltage level; and in a second period subsequent to the first period when the output voltage demands energy, using a voltage generated from the stored electrical charges in place of the input voltage to generate the output voltage.
    Type: Application
    Filed: April 21, 2010
    Publication date: October 27, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ming-Hsin HUANG, Ke-Horng CHEN
  • Publication number: 20110254531
    Abstract: A method of controlling a multiphase power converter including a plurality of sub-converters is disclosed. The method includes, for each of the sub-converters, estimating a current provided by that sub-converter. The method includes selecting one of the sub-converters that is on and determined to have a greatest current as the next sub-converter to be turned off and selecting one of the sub-converters that is off and determined to have a smallest current as the next sub-converter to be turned on. Other methods, multiphase power converters and controllers for multiphase power converters are also disclosed.
    Type: Application
    Filed: April 20, 2010
    Publication date: October 20, 2011
    Applicant: Astec International Limited
    Inventor: Piotr Markowski
  • Patent number: 7953993
    Abstract: Embodiments of the invention relate to a method and apparatus for a zero voltage processor sleep state. A voltage regulator may be coupled to a processor to provide an operating voltage to the processor. During a transition to a zero voltage power management state for the processor, the operational voltage applied to the processor by the voltage regulator may be reduced to approximately zero while an external voltage is continuously applied to a portion of the processor to save state variables of the processor during the zero voltage management power state.
    Type: Grant
    Filed: November 8, 2007
    Date of Patent: May 31, 2011
    Assignee: Intel Corporation
    Inventors: Jose Allarey, Sanjeev Jahagirdar
  • Patent number: 7917788
    Abstract: A system on a chip includes a processing module, ROM, RAM, and a clocking circuit. The clock circuit is coupled to produce a first clock signal when the SOC is in a low power mode and to produce a second clock signal when the SOC is in a performance mode, where the first clock signal is less accurate than the second clock signal. The clock circuit consumes more power when producing the second clock signal than when producing the first clock signal.
    Type: Grant
    Filed: April 25, 2007
    Date of Patent: March 29, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Marcus W. May
  • Patent number: 7913099
    Abstract: A technique to adjust a processor's operating voltage dynamically while preventing a user from placing the processor into a harmful operating voltage state in relation to the core/bus frequency ratio of the processor. More particularly, embodiments of the invention relate to a technique to control the operating voltage of the processor as a function of the processor's bus and/or core clock frequency.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: March 22, 2011
    Assignee: Intel Corporation
    Inventor: Paul Zagacki
  • Patent number: 7882372
    Abstract: A power control system comprises a plurality of POL regulators, at least one serial data bus operatively connecting the plurality of POL regulators, and a system controller connected to the serial data bus and adapted to send and receive digital data to and from the plurality of POL regulators. The serial data bus further comprises a first data bus carrying programming and control information between the system controller and the plurality of POL regulators. The serial data bus may also include a second data bus carrying fault management information between the system controller and the plurality of POL regulators. The power control may also include a front-end regulator providing an intermediate voltage to the plurality of POL regulators on an intermediate voltage bus.
    Type: Grant
    Filed: April 4, 2007
    Date of Patent: February 1, 2011
    Assignee: Power-One, Inc.
    Inventors: Alain Chapuis, Mikhail Guz
  • Patent number: 7859245
    Abstract: An apparatus outputs a vital output for a processor including an output state. The apparatus includes a first input receiving the output state, two independent circuits each of which includes a second input electrically interconnected with the first input, a third input, a fourth input and an output including the output state. Each of the independent circuits repetitively monitors the output and the third and fourth inputs of a corresponding one of the independent circuits to confirm agreement therebetween. Each of two switches is controlled by the output of the corresponding one of the independent circuits. The switches cooperate to form the vital output. Each of two feedback circuits is between the output and the third input of the corresponding one of the independent circuits, and also between the output of the corresponding one of the independent circuits and the fourth input of the other one of the independent circuits.
    Type: Grant
    Filed: April 27, 2009
    Date of Patent: December 28, 2010
    Assignee: Ansaldo STS USA, Inc.
    Inventors: Mark F. Sarnowski, Kevin N. Wahila
  • Publication number: 20100219805
    Abstract: An electrical power boosting apparatus includes a metal substrate having a monomolecular carbon-based film on first and second surfaces, a conductive core, a positive electrode at one end, and a negative electrode an opposite end and magnets positioned adjacent and in a spaced-apart relationship to the metal substrate, the magnets are oriented so that north and south poles of each magnet are matched with opposite poles of an adjacent magnet. Electrical power is boosted by passing an initial electric current having an initial voltage through the conductive core of the metal substrate and causing or allowing an interaction between the metal substrate, the monomolecular carbon-based film, and the magnets to produce a modified electric current having a final voltage that is greater than the initial voltage.
    Type: Application
    Filed: May 12, 2010
    Publication date: September 2, 2010
    Inventor: Thomas C. Maganas
  • Publication number: 20100195357
    Abstract: A method and apparatus for determining a corrected monitoring voltage, at least a portion of the method being performed by a computing system comprising at least one processor. The method comprises generating power at a first location; monitoring the generated power by measuring a first voltage proximate the first location; measuring a second voltage proximate a second location, the first and the second locations electrically coupled; and determining, based on the measured second voltage, a corrected monitoring voltage to compensate the measured first voltage for a distance between the first and the second locations.
    Type: Application
    Filed: February 5, 2010
    Publication date: August 5, 2010
    Applicant: ENPHASE ENERGY, INC.
    Inventors: MARTIN FORNAGE, MARV DARGATZ
  • Publication number: 20100164472
    Abstract: Embodiments of methods and apparatus for modulating a power source are disclosed. In some embodiments, a method may comprise predicting, by a current control logic, a potential voltage transient on a power supply bus, and modulating, by the current control logic, a current source, based at least in part on said predicting, to control the predicted voltage transient. Additional variants and embodiments may also be disclosed and claimed.
    Type: Application
    Filed: December 30, 2008
    Publication date: July 1, 2010
    Inventors: Pankaj Pant, Don Douglas Josephson
  • Patent number: 7747878
    Abstract: Audible noise related to power state transitions of an information handling system processing component, such as the central processing unit, is reduced by randomizing the time between power state transitions. Random power state transitions are managed by an operating system module that tracks the transitions and selects random times for subsequent transitions within a predetermined time range. Alternatively, an arbitrating circuit intercepts power state transition commands and arbitrates their communication at random times. Random power state transitions reduces audible noise by spreading the frequency of the noise-causing power transition events over a wider band.
    Type: Grant
    Filed: September 6, 2005
    Date of Patent: June 29, 2010
    Assignee: Dell Products L.P.
    Inventors: Nikolai V. Vyssotski, Vinh X. Bui, Daniel W. Kehoe
  • Patent number: 7698580
    Abstract: In a wired data telecommunication network power sourcing equipment coupled to a powered device performs policing of power drawn by the powered device. In one embodiment, a method includes monitoring power drawn by the powered devices at power sourcing equipment, each powered device having a policing limit associated therewith. If power drawn by one of the powered devices exceeds the policing limit, it is determined if a power budget of the power sourcing equipment continues to provide power to the powered devices. If the power budget has been exceeded, action is initiated at the power sourcing equipment. The action may include sending or logging a warning, requesting the powered device to reduce its power requirement or removing power from one of the powered devices. An apparatus for policing inline power is also disclosed.
    Type: Grant
    Filed: August 25, 2006
    Date of Patent: April 13, 2010
    Assignee: Cisco Technology, Inc.
    Inventors: Frederick Roland Schindler, Asok Tiyyagura
  • Publication number: 20100078054
    Abstract: Closed system heat engines can be used to deliver useful electrical power by harvesting ambient energy in the environment. The present invention provides a means of harvesting these low temperature differences in to useful energy and provides while providing rectification and regulation features.
    Type: Application
    Filed: September 28, 2008
    Publication date: April 1, 2010
    Inventor: Manjirnath Chatterjee
  • Patent number: 7689515
    Abstract: A method of evaluating a power plant having a design life based on operating the plant within an allowable chemical exposure range includes accumulating a history of a chemical exposure of a steam generating portion of the power plant. The method also includes determining a remaining life of the plant based on the history of the chemical exposure and assuming continued operation of the plant within the allowable chemical exposure range. The method may also include evaluating an economic value of operating the plant based on the remaining life of the plant.
    Type: Grant
    Filed: December 10, 2004
    Date of Patent: March 30, 2010
    Assignee: Siemens Energy, Inc.
    Inventors: James C. Bellows, Fred W. Shoemaker
  • Publication number: 20100066344
    Abstract: The present invention discloses a soft-start circuit having a reference signal generator, a first current generator, a second current generator, and a soft-start capacitor. The reference signal generator generates a first signal and a second signal. The first current generator generates a first current according to the first signal, and the second current generator generates a second current according to the second signal. The soft-start capacitor is coupled to the first current generator and the second current generator, and charged by a current difference of the first current and the second current to generate a soft-start signal.
    Type: Application
    Filed: April 23, 2009
    Publication date: March 18, 2010
    Inventor: Hai-Po Li
  • Publication number: 20100066345
    Abstract: Various apparatuses and methods for supplying an electrical current are disclosed herein. For example, some embodiments provide an apparatus including a current regulation switch connected in a current path between a power input and a current output. A current regulator is connected to the current regulation switch. The current regulator includes a current set terminal, and the current through the current regulation switch is proportional to the current through current set terminal. An impedance monitor is connected to the current set terminal.
    Type: Application
    Filed: April 10, 2009
    Publication date: March 18, 2010
    Applicant: Texas Instruments Incorporated
    Inventors: Stephen Christopher Terry, Paul L. Brohlin
  • Patent number: 7673157
    Abstract: A power control system comprises at least one point-of-load (POL) regulator adapted to provide an output voltage to a corresponding load and a system controller operatively connected to the at least one POL regulator via a data bus and adapted to send a first data message in a first format to the at least one POL regulator via the data bus. A bus translator is interposed along the data bus between the at least one POL regulator and the system controller. The bus translator converts the first data message from the first format to a second format that is compatible with the at least one POL regulator. The bus translator is adapted for bi-directional operation to convert a second data message communicated from the at least one POL regulator in the second format to the first format compatible with the system controller. The first and second data formats may comprise either a digital data format or an analog data format.
    Type: Grant
    Filed: November 10, 2006
    Date of Patent: March 2, 2010
    Assignee: Power-One, Inc.
    Inventors: Alain Chapuis, Mikhail Guz
  • Publication number: 20090167575
    Abstract: The A/D conversion apparatus and the vehicle power-supply device using the apparatus calculate errors at a plurality of reference voltages and reference errors prior to error correction. Each reference error is applied to a digital-output range that is divided by digital output corresponding to the reference voltages. In the calculation, when the errors obtained at adjacent reference voltages have same signs, the reference error is determined as an average of the errors obtained at adjacent reference voltages; on the other hand, when the errors obtained at adjacent reference voltages have different signs, the reference error is determined to be zero. The apparatus provides a corrected digital output by subtracting the reference error—which is applied to the digital-output range including the digital output—from the digital output corresponding to analog input voltage.
    Type: Application
    Filed: December 19, 2006
    Publication date: July 2, 2009
    Applicant: PANASONIC CORPORATION
    Inventors: Yohsuke Mitani, Kazuki Morita, Yoshimitu Odajima
  • Publication number: 20090115395
    Abstract: A power supply system includes a power supply unit, a conductive wire group and a voltage converter. The conductive wire group consists of a numbers of wires and extends from the power supply unit to electrically connect the voltage converter. The voltage converter can electrically connect at least a working element. Therefore, a first supply voltage is provided from the power supply unit to the voltage converter via the wires, the voltage converter converts the first supply voltage into a second supply voltage for the working element.
    Type: Application
    Filed: June 20, 2008
    Publication date: May 7, 2009
    Applicant: CHANNEL WELL TECHNOLOGY CO., LTD.
    Inventor: Chun-Wei Pan
  • Patent number: 7499640
    Abstract: An image-recording apparatus includes a display unit for displaying an image photographed by an sensing device, an illuminating unit for emitting light by discharging charges charged in a capacitor on photographing, a power source unit in which any one of plural kinds of power sources is selectively usable, and a power source detector to detect which kind of the power source is being used in the power source unit. Displaying on the display unit and charging of the capacitor are performed by using the power source in the power source unit. When the power source detector detects that the power source unit uses a specified kind of the power source, the display unit is operated even during charging the capacitor, whereas when the power source detector detects that the power source other than said specified one is being used in the power source detector unit, the display unit is set in no operation during charging the capacitor.
    Type: Grant
    Filed: July 8, 2005
    Date of Patent: March 3, 2009
    Assignee: Ricoh Company, Ltd.
    Inventor: Kenji Koyama
  • Patent number: 7459886
    Abstract: A method and circuit for simultaneously charging a battery and providing supply voltage to a load. The circuit includes a low-drop-out voltage (LDO) regulator and a constant-current, constant-voltage (CC-CV) regulator. In one embodiment, CC-CV regulator provides a control voltage to the LDO regulator generated by a voltage-controlled current source. As charge voltage approaches battery termination voltage, the control voltage is reduced regulating LDO regulator output to provide constant voltage while decreasing charge current to the battery. In another embodiment, a slow response amplifier and a current mirror in the CC-CV regulator provide a smooth and stable charging current to the battery that is decreased as battery charge approaches a full charge level, while maintaining constant supply voltage to the load. In a further embodiment, an externally programmable amplifier in the CC-CV regulator may enable use of the circuit with varying power sources.
    Type: Grant
    Filed: May 21, 2004
    Date of Patent: December 2, 2008
    Assignee: National Semiconductor Corporation
    Inventors: Vladislav Potanin, Elena Potanina
  • Publication number: 20080180083
    Abstract: A power converter driver that is supplied with two different voltages.
    Type: Application
    Filed: December 11, 2007
    Publication date: July 31, 2008
    Applicant: INTERNATIONAL RECTIFIER CORPORATION
    Inventors: Michael A. Briere, Jason Zhang, HamidTony Bahramian
  • Publication number: 20080157720
    Abstract: According to one exemplary embodiment, an auto-synchronous power gauge for measuring total charge consumed from a power source of an electronic device includes an analog to digital converter for sampling a signal corresponding to current drawn from the power source, and one or more accumulators. The analog to digital converter produces digital outputs which are received and summed by the one or more accumulators. The auto-synchronous power gauge further includes a power mode detector for generating a power mode signal using the signal corresponding to current drawn from the power source, where the power mode signal is used by a controller to enable and disable the one or more accumulators and the analog to digital converter. The total charge consumed can be determined by a processor coupled to the auto-synchronous power gauge. In one embodiment, a sync signal from the processor provides input to the controller.
    Type: Application
    Filed: March 2, 2007
    Publication date: July 3, 2008
    Inventor: Ken G.C. Yang
  • Publication number: 20080071486
    Abstract: In a semiconductor device, when a voltage regulator is halted from operating and a test supply voltage is supplied to second logics, the device is initialized by a reset signal. A register included in the device is then reset by an input signal via first logics. The voltage regulator is halted by a power-down signal. Testing is then carried out as the test supply voltage is applied to the second logics. When plural test items are executed successively, a test reset signal is applied to a test reset terminal for each item. As the initialized state of the register is canceled, the first and second logics are initialized.
    Type: Application
    Filed: May 7, 2007
    Publication date: March 20, 2008
    Inventors: Hideo Ikejiri, Shinsuke Onishi
  • Publication number: 20070296394
    Abstract: A method is disclosed that includes receiving a classification voltage at a powered device from a network. The classification voltage includes a baseline voltage level that is below an operating voltage range of the powered device and includes a sequence of distinct signal elements derived from the classification voltage. The method further includes detecting a number of signal elements of the sequence of distinct signal elements. A current is drawn until the number of signal elements exceeds a predetermined number.
    Type: Application
    Filed: June 22, 2006
    Publication date: December 27, 2007
    Applicant: Silicon Laboratories, Inc.
    Inventors: D. Matthew Landry, Russell J. Apfel
  • Publication number: 20040182696
    Abstract: A sputtering power-supply unit comprises a voltage generation section which generates a sputtering voltage between a negative electrode output terminal and a positive electrode output terminal, and a circuit section which reduces fluctuation in a sputtering current even if an arc discharge occurs between the negative electrode output terminal and the positive electrode output terminal. Thus, fluctuation in the sputtering current can be reduced even if the arc discharge occurs between the negative electrode output terminal and the positive electrode output terminal.
    Type: Application
    Filed: March 15, 2004
    Publication date: September 23, 2004
    Applicant: Shibaura Mechantronics Corporation
    Inventors: Noboru Kuriyama, Kazuhiko Imagawa