Abstract: The directional element, following enablement under selected input current conditions, calculates a zero sequence impedance, in response to values of zero sequence voltage and zero sequence current. The current value is selected between two possible values, one being the value from an associated current transformer, the other being the sum of the currents IA+IB+IC. The calculated zero sequence impedance is then compared against sensitive selected threshold values, established particularly for ungrounded systems. A forward fault indication is provided when the calculated zero sequence impedance is above a first established sensitive threshold value, and a reverse fault indication is provided when the calculated zero sequence impedance is below a second established sensitive threshold value.

Abstract: A method for testing an integrated circuit (IC) for open defects in a printed wire connected to an IC pin of the IC, the method includes measuring the capacitance of the IC pin; comparing the value of the measured capacitance to an expected IC pin capacitance value for the pin unconnected, and determining that an open defect exists proximate the pin when the measured capacitance is less than a predetermined value based on the expected IC pin capacitance value.

Abstract: An apparatus for measuring at least one electrical property of a semiconductor wafer includes a probe including a shaft having at a distal end thereof a conductive tip for electrically communicating with an object area of the semiconductor wafer. The apparatus further includes a device for applying an electrical stimulus between the conductive tip and the object area, and a device for measuring a response of the semiconductor wafer to the electrical stimulus and for determining from the response the at least one electrical property of the object area of the semiconductor wafer. A probe guard is included and surrounds the shaft of the probe adjacent the distal end of the probe. The probe guard also insulates the conductive tip from the semiconductor wafer.

Abstract: The invention relates to a method for monitoring a capacitor bushing (1) to which an electrical operating voltage (UB) is applied and in which a voltage divider is formed with an electrically conductive insert (4), whereby at least one measured value (UM1) of an electrical measured quantity (UM) is recorded and stored by using a measuring tap (7), which is connected to the insert (4), and by using earth potential. The aim of the invention is to improve the method so that it is only slightly influenced by changes in the operating voltage. To this end, the impedance (ZE) between the measuring tap (7) and the earth potential is modified after recording the at least one measured value (UM1), and at least one signal value (US1) of a measurement signal (US) subsequently formed is recorded and stored using the measuring tap (7) and the earth potential.

Abstract: A method for controlling a transducer device (7) featuring supply lines (17, 18) in a level sensor. The transducer device (7) is coupled to a fork resonator with fork tines and is used for both oscillation excitation and also for oscillation detection. For detection of a defective transducer device or an incorrectly connected connection of this transducer device (7), the capacitance value between the supply lines (17,18) or a variable proportional to this value is determined during the oscillation excitation and if there is deviation from a predetermined desired value by a predetermined amount, a fault signal is generated.

Abstract: An apparatus for applying a stress voltage to a device under test includes a stress voltage source, a constant voltage circuit having an input connected to the stress voltage source and an output connected to a control circuit for removing stress when current exceeds a predetermined level which is connected to the device under test. The constant voltage circuit provides a constant stress voltage to the device under test. A monitoring circuit measures the stress voltage applied to the device under test, and measures leakage current through the device under test. A switch has inputs connected to outputs of the monitoring circuit, with the switch being capable of sending a selected output or outputs of the monitoring circuit to a measurement system.

Abstract: One embodiment of the present invention provides a system for capacitively probing electrical signals within an integrated circuit. This system operates by placing a probe conductor in close proximity to, but not touching, a target conductor within the integrated circuit. In this position, the probe conductor and the target conductor form a capacitor that stores a charge between the probe conductor and the target conductor. Next, the system detects a change in a probe voltage on the probe conductor caused by a change in a target voltage on the target conductor, and then determines a logic value for the target conductor based on the change in the probe voltage. In one embodiment of the present invention, determining the logic value for the target conductor involves, determining a first value if the probe voltage decreases, and determining a second value if the probe voltage increases.

Abstract: A hand held test instrument measures cable lengths by applying a square wave signal to a conductor of a pair and detects the induced current in the other conductor of the pair. A synchronous detector measures the induced current, which is representative of the capacitance of the cable, which is representative of the length of the cable.

Abstract: An apparatus (and method) for testing a DC isolation resistance of a large capacitance network experiencing voltage stress, adds capacitance and resistance to a large resistance network under test, such that the direct current (DC) isolation resistance may be determined without distortion from the alternating current (AC) components of the circuit. The capacitance that is added is determined based on the capacitance of the object, the resistance of the object, and the resistance of the testing apparatus. In one embodiment, because the precise capacitance of the network under test may be unknown, the testing apparatus and method may utilize an additional large capacitor designed to obviate small fluctuations in the capacitance of the network.

Abstract: The invention relates to a method for generating an error signal which characterizes a fault current in an electrical conductor (130) provided with two conductor ends (120, 123, 126, 129) and comprising charge measuring devices (100, 103, 106, 109) which are connected to each other by data lines (112). At least one device is attached to each end of the conductor. In the inventive method, charge measuring values are determined using charge measuring devices. The measured charge values take into account the direction of the charge flow and a total measured charge value is formed by addition. Said error signal is generated when the total measured charge value exceeds a certain threshold value. In order to be able to detect errors in amore sensitive manner than had previously been possible, the threshold value is formed by taking into account the individual measuring tolerance of the individual charge measuring devices.

Abstract: A method for verifying on-chip decoupling capacitance by formulating and solving a linear problem is provided. Further, a software tool for determining decoupling capacitance on a computer chip using a linear problem is provided. Further, a method for designing an integrated circuit such that there is enough decoupling capacitance on the integrated circuit is provided.

Abstract: A disconnection-inspecting method for inspecting an electrical disconnection between circuits formed on both surfaces of a board is provided. The method includes the steps of: placing the board on an insulating sheet laid on a reference conductor; measuring a first capacitance between the reference conductor and one of the circuits formed on a surface of both surfaces opposite to the other surface facing the insulating sheet; measuring a second capacitance between the reference conductor and the one of the circuits by changing a first physical quantity of the insulating sheet; calculating a second physical quantity of each of the circuits based on the first capacitance and the second capacitance measured in the steps of measuring; and judging the presence of the electrical disconnection based on the second physical quantity calculated in the step of calculating.

Abstract: An uneven pattern detector has a structure wherein (a) detecting elements, each being provided with a TFT which is a switching element and a detecting electrode, are arranged in a matrix manner, and (b) a CSA connected to each data line detects charged or discharged electric charges at the respective detecting elements on respective rows sequentially selected by a gate line, whereby a capacitance (a coupled capacitance of Cf and Cx) reflecting fingerprint unevenness on a finger as a detection object can be detected. In the uneven pattern detector, each of the detecting elements is provided with an auxiliary capacitor electrode located so as to face the detecting electrode. This forms an auxiliary capacitor Cs between the auxiliary capacitor electrode and the detecting electrode.

Abstract: In a capacitive sensor apparatus, a capacitive sensor includes a plurality of physical-quantity-detection capacitors each having a movable electrode and a fixed electrode. A conversion device operates for converting an output signal of the capacitive sensor into an apparatus output signal. Each of the physical-quantity-detection capacitors is selectively connected and disconnected to and from the conversion device. A determination is made as to whether or not each of the physical-quantity-detection capacitors fails in response to the sensor output signal. When it is determined that first one of the physical-quantity-detection capacitors fails, the first one is disconnected from the conversion device and second one of the physical-quantity-detection capacitors is connected to the conversion device.

Abstract: An apparatus for applying a stress voltage to a device under test includes a stress voltage source, a constant voltage circuit having an input connected to the stress voltage source and an output connected to a control circuit for removing stress when current exceeds a predetermined level which is connected to the device under test. The constant voltage circuit provides a constant stress voltage to the device under test. A monitoring circuit measures the stress voltage applied to the device under test, and measures leakage current through the device under test. A switch has inputs connected to outputs of the monitoring circuit, with the switch being capable of sending a selected output or outputs of the monitoring circuit to a measurement system.

Abstract: One embodiment of the present invention provides a system for capacitively probing electrical signals within an integrated circuit. This system operates by placing a probe conductor in close proximity to, but not touching, a target conductor within the integrated circuit. In this position, the probe conductor and the target conductor form a capacitor that stores a charge between the probe conductor and the target conductor. Next, the system detects a change in a probe voltage on the probe conductor caused by a change in a target voltage on the target conductor, and then determines a logic value for the target conductor based on the change in the probe voltage. In one embodiment of the present invention, determining the logic value for the target conductor involves, determining a first value if the probe voltage decreases, and determining a second value if the probe voltage increases.

Abstract: A disconnection-inspecting method for inspecting an electrical disconnection between circuits formed on both surfaces of a board is provided. The method comprises the steps of: placing the board on an insulating sheet laid on a reference conductor; measuring a first capacitance between the reference conductor and one of the circuits formed on a surface of both surfaces opposite to the other surface facing the insulating sheet; measuring a second capacitance between the reference conductor and the one of the circuits by changing a first physical quantity of the insulating sheet; calculating a second physical quantity of each of the circuits based on the first capacitance and the second capacitance measured in the steps of measuring; and judging the presence of the electrical disconnection based on the second physical quantity calculated in the step of calculating.

Abstract: A silicon chip capacitance measurement circuit including three pairs of completely matched MOS transistors divided into two symmetrical circuits. Capacitance of a capacitor within the silicon chip is measured using the difference in average charging current flowing from the measurement circuit via a left and a right capacitor. A power supply provides a constant voltage source to the measurement circuit. A current measuring device measures the current flowing from the power supply to the measurement circuit. A signal generator provides a group of three-phase non-overlapping signals to the measurement circuit. The capacitance measurement circuit is able to limit measurement error due to the return of different size negative currents leading to the transient switching of MOS transistors in the current measurement device so that accuracy of capacitance measurement improves.

Abstract: In accordance with a circuit modification method, when it is determined that an aggressor (2) causes a glitch error in a victim (1), the one or more positions where one or more buffers are to be inserted into the victim (1) are determined based on the coupling capacity Cc between the victim (1) and the aggressor (2). One or more buffers are inserted at one or more internal points of division of the victim (1) which are determined so that the coupling capacity between each of a plurality of wire segments, into which the victim is to be divided by the one or more internal points of division, and the aggressor 2 is equal to Cc/n, where n is the number of wire segments. Furthermore, since the one or more buffers are inserted so that the coupling capacity Cc is properly divided into the coupling capacities between the plurality of wire segments and the aggressor, the amount of glitch to be caused in each of plurality of wire segment can be reduced and no further addition of buffers is needed.

Abstract: A control unit (1) interacting with a strip packaging material to which are applied, to close respective openings (3) in the packaging material, a number of patch elements (5) and a number of tear-off tongues (6) heat sealed to respective patch elements (5). To determine the integrity of the patch elements (5), the unit has at least one contact surface (21) at an operating electric potential (Va) and cooperating with the side of the packaging material (4) having the patch elements (5) to define one plate of a capacitor (23), the other plate of which is defined by an aluminium film (4a) of the packaging material (4), and the dielectric of which is defined by the heat-seal plastic material interposed between the plates; and a detecting circuit (26) connected to the contact surface (21) and to the aluminium film (4a) to detect an electric quantity related to variations in the dielectric strength of the dielectric of the capacitor (23) and so determine the presence of any microholes in the patch elements (5).

Abstract: An apparatus for measuring the focus of a light exposure system for selectively exposing a photosensitive plate to light rays in a process of fabricating a semiconductor device, wherein there is provided a focus measuring part having opaque region, transparent region, and a transparent electrode arranged in the transparent region, a conducting stage supporting the photosensitive plate; and a capacitance detector for measuring the capacitance between the transparent electrode and the conducting stage.

Abstract: A wide band noise extrapolation test system, which may reside within a processor-controlled test head installed in a central office, or as part of test signal generation and processing circuitry of a craftsperson's test set, processes data derived from applying single ended stimuli to a plurality of wirelines. The processing mechanism accurately and reliably identifies the locations and amplitudes of remote noise sources for each of the wirelines, by determining attenuation along and the lengths of the wirelines, and then modifying values of noise measurements in accordance with the determined attenuation and length values, so as to extrapolate the amplitudes of the noise at their identified source locations.

Abstract: The invention relates to a method of examining the authenticity of a document provided with an optico-diffractively effective element or hologram by subjecting the hologram to capacitive coupling of a voltage and deriving a signal representative of the voltage for comparison with a reference signal representative of a hologram of an authentic document.

Abstract: A voltage sensing apparatus is provided with an output for a voltage tap point that is useful in representing the voltage on a conductor that passes through the voltage sensing apparatus. The voltage sensing apparatus also performs the function of a separable insulated conductor or the like, e.g. a conventional bushing or bushing insert as utilized in the electrical power distribution field. The voltage sensing apparatus includes a molded body having an embedded capacitance screen that provides the output. The body is molded about the capacitance screen. An arrangement is provided for locating the capacitance screen within the molded body. In a preferred embodiment, the capacitance screen is molded from a conductive plastic preferably formed with an open mesh or screen structure that permits the free flow of molding material.

Abstract: The present invention concerns a method and an apparatus for measuring capacitances between electrodes of an ink-jetting head, etc. The apparatus includes a multi-probe having a plurality of probes to contact a plurality of electrode rows as one lump contact, each of the probes contacting one of the electrode rows and a plurality of the probes being divided into a predetermined number of groups; a plurality of scanners, each of which corresponds to each of the groups, to sequentially switch contacting-terminals of a plurality of the probes; and a plurality of capacitance-measuring devices, each of which corresponds to each of the scanners, to measure capacitances between electrodes in all of the groups in parallel.

Abstract: The object of the procedure according to the present invention is to characterise a voltage or current converter (20) intended to be connected to a capacitive circuit (32) arranged so as to provide a capacitance difference (C1−C2) to the converter. Said converter is arranged so as to be able to receive the capacitance difference provided by the circuit, and to provide an output voltage (Vo) which is a function of the capacitance difference and a bias signal. This procedure is characterised in that it includes a sequence of steps which consist in varying the bias signal, while keeping the capacitance difference constant and measuring in response the output voltage. One advantage of such a procedure lies in the fact that it allows the electric performance of the converter to be determined independently of the error link to the capacitance measuring.

Abstract: Disclosed herein is a method of calculating capacitance between conductive patterns of an integrated circuit (IC), comprising defining a mesh of nodes in space between at least two electrodes, calculating the electric potential at each said node, and calculating the parasitic capacitance between said electrodes.

Abstract: A system, an IC chip, a test structure formed on the IC chip, and a corresponding method for modeling one or more target interconnect capacitances is disclosed. The test structure comprises an interconnect configuration comprising a test interconnect and one or more target interconnects. The interconnect configuration has, for each target interconnect, a corresponding target interconnect capacitance between the test interconnect and the target interconnect. The test structure also comprises a test interconnect charging circuit connected to the test interconnect. The test interconnect charging circuit is configured to place a test charge on the test interconnect. The test structure further comprises one or more target interconnect charging circuits. Each target interconnect charging circuit is connected to a corresponding target interconnect.

Abstract: A capacitance measurement circuit detects a change in capacitance between a variable capacitor and a fixed reference capacitor in a bridge network and provides feedback current to null-balance the bridge. An error signal is amplified at high gain by a differential integrator having an output that is converted to a high-frequency stream of digital pulses of constant amplitude and width. The pulse stream is integrated to provide a voltage to control feedback current used to balance the bridge. The average pulse density per unit time, or the frequency of the digital pulses, is linearly proportional to a change in capacitance of said variable capacitor to high accuracy over a wide dynamic range.

Abstract: The insulation resistance of a capacitor is accurately measured within a short period of time by applying AC signals at two different frequencies f1 and f2 to the capacitor to measure the impedance Z1 and Z2 of the capacitor at each frequency. The series resistance Rs and capacity c of the capacitor are obtained from the impedance Z1 at the higher frequency f1, and the insulation resistance Rp of the capacitor is obtained from the impedance Z2, series resistance Rs and capacity C at the lower frequency f2.

Abstract: A process to determine malfunctioning detectors acting as current sinks in a danger signaling system which comprises a control centre and at least a two-wire signaling line joined thereto to which a multiplicity of detectors is connected wherein each detector has a capacitor for energy storage, a measuring resistor interposed in a wire, an evaluation device analyzing the voltage drop on the measuring resistor, an address memory, and a switch adapted to be controlled by the evaluation device between the wires, comprising the following process steps: the control centre cyclically emits voltage-modulated digital control and interrogation data to the detectors, and the detectors when interrogated by the control centre emit current-modulated digital data to the control centre; if faulty data are received following an interrogation by the control centre this one emits a voltage signal to the detectors for closing the switches of all detectors; the power input of the detectors is measured and saved in a measured-val

Abstract: The insulation resistance of a capacitor is accurately measured within a short period of time by applying AC signals at two different frequencies f1 and f2 to the capacitor to measure the impedance Z1 and Z2 of the capacitor at each frequency. The series resistance Rs and capacity C of the capacitor are obtained from the impedance Z1 at the higher frequency f1, and the insulation resistance Rp of the capacitor is obtained from the impedance Z2, series resistance Rs and capacity C at the lower frequency f2.

Abstract: In a 2-wire connection from a telephone exchange to a subscriber, the connection is made via a subscriber line interface circuit (SLIC) and a termination box, the termination box having a capacitor and a resistor connected in series between the two wires of the connection and between the SLIC and the subscriber. The SLIC includes means to reverse the polarity between the two wires of the connection and there is measuring means whereby the current required to change the capacitor to the opposite polarity may be measured enabling determination of the impedance between the two wires of the connection.

Abstract: A method and apparatus for detection of manufacturing defects during in-circuit testing. A preferred embodiment utilizes an onboard controllable signal source and/or an external signal source, in combination with capacitive sensors, to detect defects. In an embodiment of the present invention, prediction equations are implemented to increase both the efficiency and effectiveness of defect detection and location.

Abstract: A charge mode open/short test circuit comprises at least two charge capacitors. A plurality of signal traces under test are connected to the test circuit first through a plurality of test tips on a test prober and then a plurality of transmission gates in a test circuit. In a load mode, reference data are loaded. In a test mode, a charge capacitor is sequentially selected and discharged into the parasitic capacitor corresponding to a sequentially selected signal trace under test for generating a charge balance signal. The signal is amplified and compared with the loaded reference data in either a digital or an analog manner. The compared pass/fail output related to the property of the signal trace is stored in a memory. In a following read mode, the stored pass/fail output is read out to an external unit for further processing.

Abstract: Electromigration (EM) of a multilayer wiring is evaluated accurately and efficiently. A capacitance measuring wiring is disposed through the third insulator film in parallel to the second testing wiring. A stress current is sent to the second testing wiring toward the first testing wiring for a period and subsequently the capacitance of the capacitor composed of the second testing wiring and the capacitance measuring wiring is measured. The volume of voids in the second testing wiring is obtained from the ratio of this capacitance and the capacitance before letting the stress current flow. EM is evaluated by defining the wiring life span by using this volume.

Abstract: A telephone wire pair is qualified for digital signal transmission by central office testing. The tip-to-ring capacitance of the wire pair is measured while applying an test signal in the 20-30 Hz range to the wire pair. The tip-to-ring capacitance is used to compute a first length, and the first length is compared to a pre-determined length. If the first length exceeds the pre-determined length, then the wire pair is qualified based upon another comparison of the measured capacitance to a pre-determined capacitance. On the other hand, the first length is less than the pre-determined length, the tip-to-ring capacitance is measured at a frequency of, preferably, 600 Hz. The test signal at this frequency minimizes errors due to resistive and inductive components of the primary constants of the wire pair and/or a ringing device connected to the wire pair.

Abstract: An electrical static eliminator device performance indicator including a sensor for sensing the ion flow from an emitter point of the static eliminator device and also for sensing the presence of a voltage at an emitter point to accurately detect the fouling of a point or shorted point condition; a display, responsive to the means for sensing, for displaying an indication of a fouled emitter point or a shorted emitter point; and an electrical circuit interconnecting the sensor and the display.

Abstract: A capacitor bushing with a tap for a reduced voltage between its capacitor inserts is monitored with the method. The reduced voltage is supplied to a detection device that monitors the reduced voltage for any change. A change and its time interval from a further change are determined, and an error signal corresponding to the frequency of the change in the reduced voltage is generated. The method may be performed with the disclosed monitoring system.

Abstract: The invention provides a method and apparatus for testing a telecommunications network between timed intervals to detect a fault in order to determine an approximate location of a fault. The method comprises measuring a change in capacitance of a line in the network and then determining from a known ratio of capacitance to length of line, a length of line that corresponds to that change. This length will give an approximate location of a fault from a subscriber's equipment located at premises remote from the measuring apparatus.

Abstract: The accuracy of a capacitive testing procedure is improved by adjusting the ideal values against which comparisons are made during the testing process, for all of the circuit elements (e.g., pin connections) being tested, responsive to cumulative deviations of the measured values from their anticipated ideal values. This can be accomplished by initially comparing all of the capacitance measurements taken for a given printed circuit to their ideal values, and calculating a deviation for each of the comparisons made. Following the testing of an entire printed circuit, the resulting series of calculated deviations are tabulated and averaged, and the resulting average deviation is then added to or subtracted from the tabulated readings for each of the circuit elements before any true defects are identified for the printed circuit being tested. In this way, all of the parts being tested are brought to the same baseline, eliminating overall reference differences (i.e., between different panels).

Abstract: A telephone wire pair is qualified for digital signal transmission by central office testing. The tip-to-ring capacitance of the wire pair is measured while applying to the wire pair an AC test signal at 600 Hz. The test signal at this frequency minimizes errors due to line inductance and/or a ringing device connected to the wire pair. Reliable measurement of the length of the wire pair is achieved. Flaws in cable sheathing can also be detected based on measurement of tip-to-ground capacitance and/or ring-to-ground capacitance.

Abstract: Test fixture includes measurement terminals that connect to an oscillator to be tested and contacts that connect to a printed circuit board. The printed circuit board includes a load capacitance circuit with load capacitance contacts and a direct coupling circuit with direct coupling circuit contacts. By changing the direction or orientation of the printed circuit board or reversing its top or bottom surfaces when attaching it to the test fixture, it is possible to switch between a configuration that connects a load capacitance to the oscillator and that directly couples the oscillator to a measurement system.

Abstract: A capacitor quality discrimination scheme capable of permitting accurate and reliable determination of whether or not a capacitor under inspection is acceptable in quality. To this end, a method for discriminating the quality of a capacitor based on the charge characteristic upon application of a DC voltage thereto includes determining a standardized selection value charge characteristic of the dielectric polarization component of the capacitor, and then quadratically approximating one of (i) the ratio of the capacitor's actual measured current value m(t) and its calculated current value j(t) as obtainable from the standardized selection value charge characteristic, (ii) the difference between m(t) and j(t), (iii) the difference between logarithmic values of m(t) and j(t), and (iv) a ratio of respective logarithmic values of m(t) and j(t).

Abstract: The invention relates to a method of detecting a shielding defect of a shielded cable mounted in a building which defines between an instrument and the shielding of the cable, a first stray capacitance; the method steps are:placing measurement apparatus in such a manner as to define a second stray capacitance between itself and the building;injecting a high frequency signal into the shielding of the cable, by means of the measurement apparatus, the signal circulating back to the apparatus via the first and second stray capacitances; andmeasuring on the core of the cable, a signal that appears by radiation due to the injection of the high frequency signal, and representative of a defect in the shielding of the cable.

Abstract: A high speed dynamic run-out testing apparatus includes a drive source rotatable at a high speed and having an output shaft, a main shaft coupled coaxially with the output shaft of the drive source, a non-contact bearing for rotatably supporting the main shaft in a non-contact fashion, a testpiece carrier shaft provided on one side of the main shaft remote from the drive source for supporting a cylindrical testpiece mounted on such testpiece carrier shaft, and a non-contact displacement detector for measuring a displacement of the cylindrical testpiece.

Abstract: A telephone wire pair is qualified for digital signal transmission by central office testing. The tip-to-ring capacitance of the wire pair is measured while applying to the wire pair an AC test signal at 600 Hz. The test signal at this frequency minimizes errors due to line inductance and/or a ringing device connected to the wire pair. Reliable measurement of the length of the wire pair is achieved. Flaws in cable sheathing can also be detected based on measurement of tip-to-ground capacitance and/or ring-to-ground capacitance.

Abstract: A diagnostic circuit for checking a capacity of a backup condenser having a check circuit in which the clamp means includes a Zener diode and a transistor connected in parallel with the backup condenser and the current flowing through a charge resistor, the Zener diode and the transistor during a time B that the transistor is turned on by a microprocessor, results in the terminal voltage of the backup condenser to be clamped to a predetermined clamp voltage.

Abstract: A remote contamination sensing device for contamination on insulation of electric power lines and substations includes a data logger and a supporting structure to which a sensing capacitor with at least two conductors is attached such that the conductors are spaced apart and insulated from each other. A capacitance measuring device, for measuring capacitance data between the conductors, is connected to the data logger. A hygrometer, for measuring the relative humidity of the ambient air, is also connected to the data logger. A first temperature sensor, for measuring the ambient temperature, and a second temperature sensor, for measuring the surface temperature of the capacitance sensor, are connected to the data logger. The measured capacitance data, relative humidity data, ambient temperature data, and surface temperature data are stored in the data logger.

Abstract: A testing apparatus for determining the integrity of an electrical cable. ccessive portions of electrical cable pass through an aqueous electrolyte with a distance measurement unit providing an indication of the position of a portion of the cable located in the electrolyte. A capacitance measurement unit connects to a selected conductor in the cable and to an electrode in the electrolyte to continuously generate a measured capacitance signal. An X-Y plotter produces an output that displays the measured capacitance as a function of the length of the cable passing through the electrolyte.