For Response Signal Evaluation Or Processing Patents (Class 324/605)
  • Patent number: 11510601
    Abstract: A sensor (110), a sensor assembly (256) for detecting at least one analyte in a body fluid and methods of manufacturing a sensor (110) and a sensor assembly (256) for detecting at least one analyte in a body fluid are disclosed. The sensor (110) has at least one substrate (114). The sensor (110) further has at least two electrodes (116) applied to the substrate (114), wherein the electrodes (116) are adapted for detecting the analyte. The sensor (110) further has at least two contact pads (118) applied to the substrate (114) and at least two electrical traces (120) applied to the substrate (114). The electrical traces (120) electrically connect the electrodes (116) and the contact pads (118). The sensor (110) further comprises a sealing ring (134) fixedly applied to the substrate (114). The sealing ring (134) surrounds the contact pads (118).
    Type: Grant
    Filed: November 18, 2016
    Date of Patent: November 29, 2022
    Assignee: ROCHE DIABETES CARE, INC.
    Inventor: Herbert Harttig
  • Patent number: 11226371
    Abstract: A test system for testing RF PCBs including an RF probe for interfacing an intermediate node of each RF PCB, an RF source providing an RF test signal, a reflectometer, and a test measurement system that makes a pass/fail determination of each RF PCB using a measured reflection coefficient. Each RF PCB includes an IC matching circuit and an antenna matching circuit coupled between an RFIC and an antenna, in which the intermediate RF node is between the matching circuits. The reflectometer outputs a measured reflection coefficient indicative of a comparison between a reflected RF signal and the RF test signal. The measured reflection coefficient may be corrected using error values based on a calibration procedure using a calibration kit with modified RF PCBs with known loads. The modified RF PCBs are measured with a network analyzer and the test system to calculate the error values used for production testing.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: January 18, 2022
    Assignee: Silicon Laboratories Inc.
    Inventors: Yuwono Kurnia Rahman, Pasi Rahikkala, Kian Jin Chua, Zhiyuan Guan, Wei Jue Lim
  • Patent number: 10591526
    Abstract: Disclosed herein are embodiments of systems, methods, and products to automatically and intelligently generate a test bench to test an electrostatic discharge (ESD) protection circuit in an integrated circuit (IC) design. A computer may receive netlist of the IC design forming a device under test (DUT). From the DUT, the computer may extract and/or calculate one or more parameters. Based on the one or more parameters, the computer may generate a test bench comprising a resistance inductance capacitance (RLC) circuit to provide ESD stimulus to the DUT. The ESD stimulus and therefore the test bench may be based on a human body model (HBD) or a charged device model (CDM). In case of the CDM, the computer may allow a circuit designer to select or deselect package parameters for testing the ESD protection circuit.
    Type: Grant
    Filed: April 9, 2018
    Date of Patent: March 17, 2020
    Assignee: Cadence Design Systems, Inc.
    Inventors: Nandu Kumar Chowdhury, Parveen Khurana, Yue-Zhong Shu, Yoshimi Kitagawa
  • Patent number: 10291281
    Abstract: Disclosed is an electronic transmitter-receiver device for integrating into an electronic module connected to a communication network by a bus, the bus being of the CAN or FlexRay type, the electronic transmitter-receiver device including a receiving assembly (R) and a control part (D) which are configured so as to allow switching from a CAN operating mode to a FlexRay operating mode of the device, and vice versa, without needing to change the electronic component.
    Type: Grant
    Filed: July 5, 2016
    Date of Patent: May 14, 2019
    Assignees: CONTINENTAL AUTOMOTIVE FRANCE, CONTINENTAL AUTOMOTIVE GMBH
    Inventor: Thierry Bavois
  • Patent number: 10215676
    Abstract: A moisture probe or sensor including an attachment element configured for attachment to a plant, bush or tree to determine a moisture content of the plant bush or tree. The moisture probe including a transceiver configured to transmit a moisture signal indicative of the moisture content of the plant, tree or plant.
    Type: Grant
    Filed: October 22, 2012
    Date of Patent: February 26, 2019
    Inventor: Carl L. C. Kah, Jr.
  • Patent number: 10171282
    Abstract: Dynamic amplitude modulation in a telecommunications network in response to user reported performance indicators is described. The performance indicators may be associated with at least one user device and/or at least one antenna. For example, the performance indicators may include reference signal received power (RSRP), antenna gain, and/or insertion loss (IL). The performance indicators may trigger generation of new amplitude weights or values and application of the new amplitude weights or values to the telecommunications network.
    Type: Grant
    Filed: November 9, 2017
    Date of Patent: January 1, 2019
    Assignee: Sprint Communications Company L.P.
    Inventors: Sreekar Marupaduga, Andrew M. Wurtenberger
  • Patent number: 10122355
    Abstract: The present invention provides a high-power adjustable high-frequency fractional order capacitor with an order greater than 1, and a control method thereof. The fractional-order capacitor comprises an alternating current input module, a coupling impedance, a high-frequency alternating current controlled voltage source, a controller and an alternating current input sampling module. The controller generates a corresponding control signal according to an input voltage signal and an input current signal which are acquired by the alternating current input sampling module, and controls an output voltage of the controlled power source, such that an input current and an input voltage satisfy a current-voltage relationship of the fractional-order capacitor. The obtained relationship between the input current and the input voltage is consistent with the definition of the fractional-order capacitor with the order greater than 1.
    Type: Grant
    Filed: December 17, 2016
    Date of Patent: November 6, 2018
    Assignee: SOUTH CHINA UNIVERSITY OF TECHNOLOGY
    Inventors: Bo Zhang, Yanwei Jiang
  • Patent number: 10114991
    Abstract: Focusing on providing a plurality of device antennas along a transfer path of the RFID media, and providing a device antenna for verification, the reading and writing verification device comprises: a data reading and writing unit having a first device antenna, a second device antenna and a third device antenna provided sequentially in the transfer path; and a data verification unit having a fourth device antenna provided on a downstream side of the third device antenna, reading and writing of medium data being made sequentially executable by wireless data communication between the data reading and writing unit and the RFID medium, and in the data verification unit, the medium data being read from the RFID medium to enable verification of the medium data.
    Type: Grant
    Filed: July 28, 2014
    Date of Patent: October 30, 2018
    Assignee: SATO HOLDINGS KABUSHIKI KAISHA
    Inventor: Naoki Kowata
  • Patent number: 9817046
    Abstract: A system includes a test signal generator generating a test signal having a carrier and at least two sidebands, and provides the test signal to a device under test (DUT). A plurality of couplers sense an incident signal, a reflected signal, and a transmitted signal for the DUT at corresponding test ports of the test system when the test signal is supplied to the DUT. A signal processing apparatus: detects S-parameters for the DUT from the carrier present in each of the incident signal, reflected signal, and transmitted signal for the device under test; measures a dispersion for the DUT at each of the test ports from the two sidebands present in the incident signal, reflected signal, and transmitted signal for the device under test using the two frequencies; and combines the detected S-parameters and the measured dispersions to output enhanced measurements of the S-parameters and the dispersions.
    Type: Grant
    Filed: August 10, 2015
    Date of Patent: November 14, 2017
    Assignee: Keysight Technologies, Inc.
    Inventor: Bogdan Szafraniec
  • Patent number: 9742445
    Abstract: A solid-state amplifier architecture is disclosed. In some embodiments, the disclosed architecture may include first and second channel chipsets configured to amplify either the entire instantaneous frequency band of a radio frequency (RF) input signal or, respectively, sub-bands thereof, which may be divided proportionally between the two chipsets. In some cases, the chipsets may be configured to amplify frequencies in excess of the entire K-band and Ka-band frequencies simultaneously. In some cases, the architecture may be configured to address a signal received, for instance, from an electronic warfare (EW) system to a log amplifier stage configured to output a signal to the EW system, in response to which the EW system may generate a RF signal for amplification by the architecture for transmission. To facilitate heat dissipation, the architecture may be coupled, in part or in whole, with a thermally conductive carrier, optionally with an intervening diamond heat spreader layer.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: August 22, 2017
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventors: Robert Actis, Robert J. Lender, Jr., Jared P. Majcher, John R. Muir, Edwin C. Powers
  • Patent number: 9727163
    Abstract: According to an aspect, a touch detection device includes drive electrodes, touch detection electrodes, a signal generation unit that generates direct-current signals having voltages different from one another, a first drive unit that selectively supplies one of the direct-current signals to the drive electrodes, an element, a second drive unit that selectively supplies one of the direct-current signals to one end of the element in synchronization with the first drive unit, and a detection unit that acquires output values from the touch detection electrodes and an output value from the element at the same time, and detects proximity or contact of a target object based on values obtained by correcting the output values from the touch detection electrodes using the output value from the element.
    Type: Grant
    Filed: January 16, 2015
    Date of Patent: August 8, 2017
    Assignee: Japan Display Inc.
    Inventors: Hiroshi Mizuhashi, Tadayoshi Katsuta, Kohei Azumi, Daisuke Ito
  • Patent number: 9470647
    Abstract: A measuring circuit used for the capacitive examination of a moving elongated textile test material such as card sliver, roving, yarn or woven fabric, having a measuring capacitor for accommodating the test material, and a component with a capacitance which can be changed by an electric control signal. The measuring circuit can thus be balanced in a simple, rapid, cost-effective and especially automatic way.
    Type: Grant
    Filed: April 7, 2014
    Date of Patent: October 18, 2016
    Assignee: Uster Technologies, AG
    Inventors: Reto Gehrig, Phillipp Ott, Rolf Joss
  • Patent number: 9383413
    Abstract: A system and method for locating inter-turn short circuits or ground faults in a rotor winding of an electrical generator. The method analyzes data from a Recurrent Surge Oscillograph (RSO) test, identifies a spike or anomaly in a reflected RSO signal, determines an elapsed time between a transmitted signal and the anomaly in the reflected signal, calculates a distance along the winding conductor to the inter-turn short circuit or ground fault based on the elapsed time, and uses a geometric model of the winding conductor to identify a location of the fault based on the distance. The location of the inter-turn short circuit or ground fault specifies a coil number, a turn number within the coil and a position within the turn.
    Type: Grant
    Filed: November 12, 2013
    Date of Patent: July 5, 2016
    Assignee: Siemens Demag Delaval Turbomachinery, Inc.
    Inventor: Allan G. Concepcion
  • Patent number: 9366711
    Abstract: In order to test a power engineering test object (14), a test signal is generated by a first test device (2), which is supplied by the first test device (2) to a second test device (3) to be amplified by the same and to be output to the power engineering test object (14). Further, the test signal may be applied by the first test device (2) to the power engineering test object (14), the test signal preferably being time-synchronously output by the first test device (2) and the second test device (3) to the power engineering test object (14).
    Type: Grant
    Filed: April 23, 2013
    Date of Patent: June 14, 2016
    Assignee: OMICRON ELECTRONICS GMBH
    Inventor: Ulrich Klapper
  • Patent number: 9047425
    Abstract: Methods and apparatus disclosed herein operate to receive a plurality of cycles characterized by a set of time-domain aspects, to modify at least one of the time-domain aspects of at least some of the plurality of cycles to produce a plurality of modified cycles, to process at least some of the modified cycles to produce time-domain cycles, and to create a time-domain signal based at least in part on concatenating the time-domain cycles.
    Type: Grant
    Filed: November 18, 2013
    Date of Patent: June 2, 2015
    Assignee: Micron Technology, Inc.
    Inventor: Timothy M. Hollis
  • Publication number: 20150097577
    Abstract: A capacitance detection circuit detects changes in the capacitance of a variable capacitor by using the change in capacitance to change the resonant frequency of a variable capacitor oscillator. The resonant frequency of the variable capacitor oscillator is converted from the time domain to the frequency domain, and then selected frequencies values are compared to known frequency domain values to detect the magnitude of the change in capacitance.
    Type: Application
    Filed: October 6, 2014
    Publication date: April 9, 2015
    Applicant: Texas Instruments Incorporated
    Inventors: Peyman Hojabri, Charles Yong Yi Guan
  • Publication number: 20150084644
    Abstract: A phase measurement method in a microwave tomography system may include: transmitting a first Tx frequency signal, receiving a signal corresponding to the first Tx frequency signal, and measuring a first phase value; transmitting a second Tx frequency signal separated by a predetermined discrete frequency from the first Tx frequency signal, receiving a signal corresponding to the second Tx frequency signal, and measuring a second phase value; calculating a first phase difference based on a difference between the first and second phase values; calculating a second phase difference based on the discrete frequency; and determining an unwrapped phase value through comparison between the first and second phase differences.
    Type: Application
    Filed: September 25, 2014
    Publication date: March 26, 2015
    Inventors: Hyuk-Je KIM, Jong-Moon LEE, Seong-Ho SON, Soon-Ik JEON, Hyung-Do CHOI
  • Publication number: 20150084717
    Abstract: A measurement device includes an electric current generation circuit and a monitor device. The electric current generation circuit supplies an electric current whose electric current amount monotonically increases during a setup period of time to the electric circuit including a power supply. The monitor device detects a voltage of the power supply via the electric circuit. A frequency of the detected voltage having a waveform is a frequency at which the impedance of the electric circuit becomes high.
    Type: Application
    Filed: September 22, 2014
    Publication date: March 26, 2015
    Inventor: TOSHIHIRO KATOH
  • Publication number: 20150077135
    Abstract: A method for amplifying an echo signal, in which an analog echo signal suitable for detection of a vehicle's surroundings is amplified by a gain dependent on the transit time of the echo signal, the analog echo signal being amplified by an amplifier having a plurality of outputs, each having a different gain, and a downstream A/D converter having a time-variable reference voltage. In the process, there is a switch between the different outputs of the amplifier at predefined switching points in time, and the reference voltage of the A/D converter varies over time between the switching points in time in such a way that the echo signal is present at the output of the A/D converter with a transit time-dependent total gain having a predefined characteristic.
    Type: Application
    Filed: July 17, 2012
    Publication date: March 19, 2015
    Inventor: Matthias Karl
  • Patent number: 8892380
    Abstract: Methods are described for measuring data in a test setup including an impedance tuner. In an exemplary embodiment, the data is data for measuring noise parameters. The data is measured versus a sweep parameter for one tuner state at a time.
    Type: Grant
    Filed: July 24, 2009
    Date of Patent: November 18, 2014
    Assignee: Maury Microwave, Inc.
    Inventor: Gary R. Simpson
  • Patent number: 8841922
    Abstract: An enhanced loop in a passive tuner consists of an extremely low loss coupler and a high directivity circulator. In the case of source reflection factor synthesis, a passive loop generates an additional incident traveling wave. This wave, added to the primary incident traveling wave, augments the traveling wave and thus increases the magnitude of the synthesized reflection factor at the source port of a device, such as a transistor. In the case of load reflection factor synthesis, the passive loop augments the initial reflected traveling wave by pumping an additional traveling wave. This additional traveling wave helps in synthesizing a higher load reflection factor at the load port. This architecture is capable of high reflection factor synthesis that enables load synthesis even on the border of the Smith chart. There is no problem of instability with the architecture of the present invention.
    Type: Grant
    Filed: April 29, 2011
    Date of Patent: September 23, 2014
    Inventors: Fadhel M. Ghannouchi, Souheil Ben Smida, Mohammad Shabi Hashmi, Mohamed Helaoui
  • Patent number: 8841921
    Abstract: Wideband low loss signal couplers use an electric field antenna for voltage detection and a magnetic loop for current detection both placed inside and coupled to the center conductor of a coaxial or parallel plate airline. The signal coupling factor increases with frequency thus favoring detection of harmonic components generated by the nonlinearly operated RF transistors. In order to adapt also to various power levels and associated harmonic receiver sensitivity the detectors can be adjusted such as to vary the basic level of coupling. A calibration method allows considering non-infinite directivity of the signal couplers to be accurately considered even when they are terminated with very high VSWR, generated by impedance tuners connected to the signal couplers.
    Type: Grant
    Filed: July 12, 2011
    Date of Patent: September 23, 2014
    Inventor: Christos Tsironis
  • Patent number: 8829920
    Abstract: Disclosed are a circuit and method for amplifying the power of a multi-tone input signal. The multi-tone input signal is filtered separating out one signal having a tone at a fundamental frequency from another signal having additional tones at additional frequencies. The signal having the tone at the fundamental frequency is amplified and then filtered removing any harmonics added during amplification. The signals are then recombined generating a multi-tone output signal, wherein the tone at the fundamental frequency is boosted (i.e., has a higher power in the multi-tone output signal than in the multi-tone input signal), but the additional tones at the additional frequencies are not (i.e., the additional tones at the additional frequencies have essentially the same power in the multi-tone output and input signals). Also disclosed herein are embodiments of a testing system and method incorporating the above-described circuit to allow for testing of high power devices.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: September 9, 2014
    Assignee: International Business Machines Corporation
    Inventor: Randy L. Wolf
  • Patent number: 8736280
    Abstract: A circuit for testing a high speed data bus comprises a test port, a data bus port, a signal generator, a polarity monitor, and an attenuation monitor. The test port is coupled to a test controller. The data bus port is coupled to the data bus. The signal generator may generate a test signal to the data bus port at a first voltage level with a duty cycle of fifty percent or greater. The polarity monitor may receive the test signal from the data bus port and generate a voltage that is proportional to the duty cycle and indicative of a polarity of a portion of the data bus. The attenuation monitor may receive the test signal from either the signal generator or the data bus port and determine a second voltage level of the received test signal, with the second voltage level being communicated to the test port.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: May 27, 2014
    Assignee: DIT-MCO International Corporation
    Inventors: Harold R. King, Sang Burton
  • Patent number: 8698508
    Abstract: A method and system for detecting and localizing damage on a radome. In one example, the system includes a detection mesh made up of an arrangement of conductive wires integral with the radome structure, and a digital strobe circuit coupled to the detection mesh that measures the detection mesh and reports results. In one example, the system includes a controller coupled to the strobe circuit and configured to assess the results and localize the damage based on measured changes in impedance of individual wires within the detection mesh. The controller may be further configured to provide a damage report to a user interface, the damage report optionally identifying the damaged area(s) of the radome.
    Type: Grant
    Filed: August 23, 2011
    Date of Patent: April 15, 2014
    Assignee: Raytheon Company
    Inventors: Jerry M. Grimm, James A. Pruett
  • Publication number: 20140091811
    Abstract: A method for multivariable measurements using a single-chip impedance analyzer includes providing a sensor, exposing the sensor to an environmental parameter, determining a complex impedance of the sensor over a measured spectral frequency range of the sensor, and monitoring at least three spectral parameters of the sensor.
    Type: Application
    Filed: September 28, 2012
    Publication date: April 3, 2014
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Radislav Alexandrovich Potyrailo, Jeffrey Michael Ashe, Sm Shajed Hasan, Naresh Kesavan Rao, Krishnakumar Sundaresan
  • Patent number: 8686746
    Abstract: Disclosed is a test apparatus for measuring the common-mode parasitic capacitance between a first element and a second element being isolated from the first element. The test apparatus includes a signal generating device connected to the first element and having an internal signal source connected in series with a first internal impedance for sending a signal to the first element, and a signal receiving device connected between the second element and the first element and having a second internal impedance for measuring a signal response between the first element and the second element, thereby calculating the common-mode capacitance between the first element and the second element based on the signal response.
    Type: Grant
    Filed: June 30, 2010
    Date of Patent: April 1, 2014
    Assignee: Delta Electronics, Inc.
    Inventors: Min Zhou, Yicong Xie, Jinping Zhou, Jianping Ying
  • Patent number: 8633709
    Abstract: A system for testing a motherboard performance includes a control device, a voltage processing circuit, a voltage regulating circuit and a voltage feedback circuit. The control device stores a plurality of predetermined voltage values and outputs control signals according to the plurality of predetermined voltage values. The voltage processing circuit receives the control signal and outputs a plurality of PWM signals according to the control signal. The voltage regulating circuit receives the plurality of PWM signal and outputs a plurality of DC voltage to a plurality of voltage input terminals of the motherboard. The voltage feedback circuit collects voltage signals at the plurality of voltage input terminals of the motherboard.
    Type: Grant
    Filed: July 5, 2011
    Date of Patent: January 21, 2014
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Ling-Yu Xie, Xing-Ping Xie
  • Patent number: 8615210
    Abstract: Methods and apparatus for power measurement in a communication system. In an aspect, a method is provided for power measurement. The method includes selecting between a signal decoding mode and a power measurement mode, decoding an input signal if the signal decoding mode is selected, and calculating a power measurement associated with the input signal if the power measurement mode is selected. In another aspect, an apparatus is provided for power measurement. The apparatus includes means for selecting between an active mode and a power measurement mode, means for decoding an input signal if the active mode is selected, and means for calculating a power measurement associated with the input signal if the power measurement mode is selected.
    Type: Grant
    Filed: January 18, 2007
    Date of Patent: December 24, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Ashok Mantravadi, Phani Bhushan Avadhanam, Vinay Murthy
  • Publication number: 20130320995
    Abstract: Disclosed are a circuit and method for amplifying the power of a multi-tone input signal. The multi-tone input signal is filtered separating out one signal having a tone at a fundamental frequency from another signal having additional tones at additional frequencies. The signal having the tone at the fundamental frequency is amplified and then filtered removing any harmonics added during amplification. The signals are then recombined generating a multi-tone output signal, wherein the tone at the fundamental frequency is boosted (i.e., has a higher power in the multi-tone output signal than in the multi-tone input signal), but the additional tones at the additional frequencies are not (i.e., the additional tones at the additional frequencies have essentially the same power in the multi-tone output and input signals). Also disclosed herein are embodiments of a testing system and method incorporating the above-described circuit to allow for testing of high power devices.
    Type: Application
    Filed: May 31, 2012
    Publication date: December 5, 2013
    Applicant: International Business Machines Corporation
    Inventor: Randy L. Wolf
  • Patent number: 8493082
    Abstract: A seating sensing device embedded in a seat includes: a variable resistance unit generating resistance values corresponding to the circumference of the seat through a plurality of conductive threads installed in the seat; and a signal analysis unit analyzing variable quantities of the resistance values to acquire activity information on one or more of whether a user is seated or not, a seating posture, and a seating posture change.
    Type: Grant
    Filed: September 15, 2010
    Date of Patent: July 23, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventor: Ji Wook Jeong
  • Publication number: 20130049767
    Abstract: A circuit for testing a high speed data bus comprises a test port, a data bus port, a signal generator, a polarity monitor, and an attenuation monitor. The test port is coupled to a test controller. The data bus port is coupled to the data bus. The signal generator may generate a test signal to the data bus port at a first voltage level with a duty cycle of fifty percent or greater. The polarity monitor may receive the test signal from the data bus port and measure a voltage proportional to the duty cycle to determine a polarity of a portion of the data bus, with the voltage level representative of the polarity being communicated to the test port. The attenuation monitor may receive the test signal from either the signal generator or the data bus port and determine a second voltage level of the received test signal, with the second voltage level being communicated to the test port.
    Type: Application
    Filed: August 31, 2011
    Publication date: February 28, 2013
    Applicant: DIT-MCO INTERNATIONAL CORPORATION
    Inventors: Harold R. King, Sang Burton
  • Patent number: 8378693
    Abstract: A front end of a vector network analyzer (VNA) on an integrated circuit includes a clock generator and two ports. The VNA couples to a device under test (DUT) using the two ports. Each port may include a plurality of receivers and a VSWR bridge, and can be configured as either an input or an output. The clock generator can generate a stimulus signal, an in-phase I clock signal, and a quadrature-phase Q clock signal. The output port provides the stimulus signal to the DUT and measures both reference and reflected power from the DUT, such as by utilizing two receivers by using direct conversion and the I and Q clock signals. The input port measures transmitted power through the DUT using a second VSWR bridge and one of its receivers by using direct conversion along with the I and Q clock signals. The VNA IC can provide S-parameter measurements to a processing unit for further processing and/or analysis to compute the DUT S-parameters.
    Type: Grant
    Filed: October 27, 2008
    Date of Patent: February 19, 2013
    Assignee: National Instruments Corporation
    Inventor: Michel M. Azarian
  • Patent number: 8339146
    Abstract: Calibration method for calibrating transient behavior of a TLP test system. The system comprises a TLP generator, probe needles, nominally impedance matched transmission lines and measurement equipment, connected between the transmission lines and the TLP generator, for detecting transient behavior of a device under test by simultaneously capturing voltage and current waveforms as a result of generated pulses. The calibration method comprises (a) applying the TLP test system on an open and capturing first voltage and current waveforms; (b) applying the TLP test system on a calibration element having a known finite impedance and a known transient response and capturing second voltage and current waveforms; (c) transforming the captured first and second current and voltage waveforms to the frequency domain, and (d) determining calibration data for the transient behavior of the TLP test system on the basis of the transformed first and second voltage and current waveforms.
    Type: Grant
    Filed: December 21, 2009
    Date of Patent: December 25, 2012
    Assignees: IMEC, Hanwa Electronic Ind. Co., Ltd.
    Inventors: Philippe Roussel, Dimitri Linten
  • Patent number: 8309365
    Abstract: A method for evaluating a target molecule bound to a probe molecule provided with a marker includes: applying AC voltage between a working electrode provided on a substrate and a counter electrode; and using a signal obtained from the marker on the probe molecule bound to the working electrode when a frequency of the AC voltage is varied, or an average value of the signal, to determine at least one of a Stokes radius or molecular weight of the target molecule, a binding rate between the probe molecule and the target molecule, a binding rate constant therebetween, a dissociation rate therebetween, and a dissociation rate constant therebetween.
    Type: Grant
    Filed: November 27, 2009
    Date of Patent: November 13, 2012
    Assignees: Fujitsu Limited, Technical University of Munich
    Inventors: Kenji Arinaga, Ulrich Rant, Erika Pringsheim, Wolfgang Kaiser, Jelena Knezevic
  • Patent number: 8299805
    Abstract: An evaluation device 20 comprises a circuit element comprising respective pairs of inputs and outputs including several capacitances 25a-25c and resistances 26a-26d, one end of each being connected to both ends of the capacitances 25a-25c, wherein a resistance value of a signal input side is generally equal to that of a signal output side. The evaluation device 20 is further provided with a connecting terminal with an output device 10 for outputting signals to a device to be evaluated 30 on the signal input side, and is provided with a connecting terminal with the device to be evaluated 30 on the signal output side.
    Type: Grant
    Filed: January 23, 2008
    Date of Patent: October 30, 2012
    Assignee: Step Technica Co., Ltd
    Inventors: Tomihiro Mugitani, Takashi Kobayashi, Tatsuhiko Nakajima
  • Patent number: 8294469
    Abstract: A distance to PIM measurement circuit is made using a device such as an AWS transceiver that has separate transmit and receive bands. With a typical AWS transceiver placed in close proximity to a PCS transceiver, the AWS device will include a band reject filter to eliminate interference from the PCS signals. The PIM measurement circuit includes two frequency sources F1 and F2 that are provided through a combiner for characterization of the PIM circuit. To enable distance determination, an FM measurement is created by using an offset sweep generator attached to one of the two frequency sources. To avoid frequencies blocked by the band reject filter, a desired harmonic of a test PIM harmonic signal is selected outside the band of the band reject filter.
    Type: Grant
    Filed: March 12, 2010
    Date of Patent: October 23, 2012
    Assignee: Anritsu Company
    Inventor: Donald Anthony Bradley
  • Publication number: 20120101773
    Abstract: The invention provides a marker (20). The marker (20) comprises a circuit (22) actuated by a first frequency into conductive status to track position information of an object (40). The circuit (22) of the marker (20) is in a non-conductive status based on the second frequency, and the first frequency is not in the range of the second frequency for measuring the conductivity information of the object (40). The invention further provides a device for measuring conductivity information of the object by generating the first frequency and the second frequency.
    Type: Application
    Filed: July 6, 2010
    Publication date: April 26, 2012
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventors: Alistair Lee Mcewan, Matthias Hamsch, Roland Eichardt, Joachim Kahlert
  • Patent number: 8143910
    Abstract: Provided is a semiconductor integrated circuit including: a first path that includes a first logic circuit; a second path that includes a second logic circuit; and a subsequent-stage circuit that is connected to an output of the first path and is connected to an output of the second path, in which the second path further includes a first internal path that is selected as a propagation path during a normal operation period; and a second internal path that is selected as a propagation path during a test operation period and includes a delay circuit having a delay amount larger than a delay amount of the first internal path.
    Type: Grant
    Filed: June 15, 2009
    Date of Patent: March 27, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Hiroyuki Kobatake
  • Patent number: 8135563
    Abstract: An apparatus for evaluating a system. The apparatus can include a storage element for receiving at least one time-varying output characteristic of the system, the time-varying output characteristic comprising a plurality of raw data points representing a plurality of measurements at a plurality of times; and a processing element communicatively coupled to the storage element. The processing element can be configured for partitioning the plurality of raw data points into a plurality of segments, calculating a plurality of estimated data points based on a plurality of mathematical expressions, and characterizing the system based on at least one figure of merit (FOM) computed from the plurality of estimated data points. In the apparatus, at least one of the plurality of mathematical expressions is associated with each of the plurality of segments.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: March 13, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Ganesh Parasuram Srinivasan, Friedrich Johannes Taenzler
  • Patent number: 8120209
    Abstract: A voltage sensing device with which high-precision voltage sensing is possible without the need to obtain a unique correction constant for each device. A pair of voltage input nodes NCk and NCk-1 is selected from voltage input nodes NC0-NCn in switch part 10, and they are connected to sensing input nodes NA and NB in two types of patterns with different polarity (forward connection, reverse connection). Sensing input nodes NA and NB are held at reference potential Vm by voltage sensing part 20, and current Ina and Inb corresponding to the voltage at voltage input nodes NCk and NCk-1 flows to input resistors RIk and RIk-1. Currents Ina and Inb are synthesized at different ratios in voltage sensing part 20, and sensed voltage signal S20 is generated according to the synthesized current Ic. Sensed voltage data S40 with low error is generated according to the difference between the two sensed voltage signals S20 generated in the two connection patterns.
    Type: Grant
    Filed: September 3, 2009
    Date of Patent: February 21, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Toru Tanaka, Akio Ogura, Kazuya Omagari, Nariaki Ogasawara
  • Patent number: 8120434
    Abstract: The invention relates to a method and system and microchip for determining impedance of a variable impedance component. The method comprises tuning a tunable oscillator over a predefined tuning range, the tunable oscillator having the variable impedance component coupled as a load thereof. The frequency response of the tunable oscillator is measured as a function of said tuning. Finally, the measured frequency response is analyzed for determining the impedance of the variable impedance component. The invention makes possible to manufacture smaller and simpler monolithic sensor microchips.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: February 21, 2012
    Assignee: Valtion Teknillinen Tutkimuskeskus
    Inventor: Arto Rantala
  • Patent number: 8063649
    Abstract: A measuring system minimizes the parasitic affects of lumped circuit elements. The system includes two or more in-situ interfaces configured to conductively link a source to an internal load and an external load. The in-situ interfaces are linked to a shunt conductor. Two or more linear and dynamic elements conductively link the in-situ interfaces in series. The dynamic elements are configured to overwhelm the parasitic self-capacitance of an input circuit coupled to at least one of the in-situ interfaces. A shield enclosing at least one of the linear and dynamic elements has a conductive surface to fields and electromagnetic interference. The shield has attenuation ratios that substantially dampen the parasitic capacitance between the linear and dynamic elements that bridge some of the in-situ interfaces.
    Type: Grant
    Filed: April 3, 2009
    Date of Patent: November 22, 2011
    Assignee: UT-Battelle, LLC
    Inventors: Craig E. Deibele, George Brian Link, Vladimir V. Peplov
  • Patent number: 8063626
    Abstract: The present invention refers to a method for the precise measurement of dependency on amplitude and phase of a plurality of high frequency signals, preferably in the synchrotron accelerator of elementary particles. The essence of the solution according to the invention lies in that with a single measuring device and without any aliasing it is achieved a resolution of 0.2 micron and repeatability of measurements of 1 micron down to the lower frequency limit of a few MHz.
    Type: Grant
    Filed: May 14, 2009
    Date of Patent: November 22, 2011
    Assignee: Instrumentation Technologies d.d.
    Inventors: Borut Solar, Primoz Lemut, Vladimir Poucki, Borut Baricevic, Tomaz Karcnik
  • Publication number: 20110273187
    Abstract: An enhanced loop in a passive tuner consists of an extremely low loss coupler and a high directivity circulator. In the case of source reflection factor synthesis, a passive loop generates an additional incident traveling wave. This wave, added to the primary incident traveling wave, augments the traveling wave and thus increases the magnitude of the synthesized reflection factor at the source port of a device, such as a transistor. In the case of load reflection factor synthesis, the passive loop augments the initial reflected traveling wave by pumping an additional traveling wave. This additional traveling wave helps in synthesizing a higher load reflection factor at the load port. This architecture is capable of high reflection factor synthesis that enables load synthesis even on the border of the Smith chart. There is no problem of instability with the architecture of the present invention.
    Type: Application
    Filed: April 29, 2011
    Publication date: November 10, 2011
    Inventors: FADHEL M. GHANNOUCHI, Souheil Ben Smida, Mohammad Shabi Hashmi, Mohamed Helaoui
  • Patent number: 8036841
    Abstract: A method and device are disclosed for measuring potentiometric measuring probes. An exemplary method includes feeding two test voltages comprising a harmonic wave Ueg with a base frequency fg and the harmonic wave Uer with a base frequency fr into two cores of a connecting cable through voltage source impedances, respectively. The voltage between an indicating electrode and a reference electrode, and the AC responding signal resulting from the two test voltages are passed to an amplifier and further to a transfer function unit having transfer functions (Hg, Hr), an A/D converter, and a Fourier transformation unit, to calculate a potential Ux and the two test responses Ug and Ur, respectively. Two calibration responses Uehg and Uehr are determined, wherein Uehg includes a product of Ueg and Hg, and wherein Uehr includes a product of Uer and Hr.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: October 11, 2011
    Assignee: Mettler-Toledo AG
    Inventor: Changlin Wang
  • Patent number: RE42872
    Abstract: A plurality of battery-operated transceivers encapsulated by lamination to form a sheet of independent transceivers is tested in a two piece fixture that forms an enclosure surrounding each in-sheet transceiver. Each enclosure has an antenna for transmitting a command signal to the transceiver at a known power level and for receiving a reply message from the transceiver containing a power level measurement made by the transceiver. Test methods using the fixture of the present invention are also described. Flexible radio frequency identification (RFID) devices are coupled to a roll of flexible material. Each RFID device coupled to the roll is advanced into a wireless communication region. An antenna in the region separately communicates with each of the RFID devices in a manner that isolates the communication from other REID devices counted to the roll outside the region.
    Type: Grant
    Filed: November 24, 2004
    Date of Patent: October 25, 2011
    Assignee: Round Rock Research, LLC
    Inventors: Mark E. Tuttle, Rickie C. Lake, Steven F. Schicht, John R. Tuttle
  • Patent number: RE43918
    Abstract: A plurality of battery-operated transceivers encapsulated by lamination to form a sheet of independent transceivers is tested in a two piece fixture that forms an enclosure surrounding each in-sheet transceiver. Each enclosure has an antenna for transmitting a command signal to the transceiver at a known power level and for receiving a reply message from the transceiver containing a power level measurement made by the transceiver. Test methods using the fixture of the present invention are also described. An RFID tag and interrogator may each include a transmitter and a receiver. The tag and interrogator may communicate with each other at different frequency bands and may communicate in accordance with a wireless communication protocol.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: January 8, 2013
    Assignee: Round Rock Research, LLC
    Inventors: Mark E. Tuttle, Rickie C. Lake, Steven F. Schicht, John R. Tuttle
  • Patent number: RE43935
    Abstract: A plurality of battery-operated transceivers encapsulated by lamination to form a sheet of independent transceivers is tested in a two piece fixture that forms an enclosure surrounding each in-sheet transceiver. Each enclosure has an antenna for transmitting a command signal to the transceiver at a known power level and for receiving a reply message from the transceiver containing a power level measurement made by the transceiver. Test methods using the fixture of the present invention are also described. An RFID tag and interrogator may each include a transmitter and a receiver. The tag and interrogator may communicate with each other at different frequency bands and may communicate in accordance with a wireless communication protocol.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: January 15, 2013
    Assignee: Round Rock Research, LLC
    Inventors: Mark E. Tuttle, Rickie C. Lake, Steven F. Schicht, John R. Tuttle
  • Patent number: RE43940
    Abstract: A plurality of battery-operated transceivers encapsulated by lamination to form a sheet of independent transceivers is tested in a two piece fixture that forms an enclosure surrounding each in-sheet transceiver. Each enclosure has an antenna for transmitting a command signal to the transceiver at a known power level and for receiving a reply message from the transceiver containing a power level measurement made by the transceiver. Test methods using the fixture of the present invention are also described. An RFID tag and interrogator may each include a transmitter and a receiver. The tag and interrogator may communicate with each other at different frequency bands and may communicate in accordance with a wireless communication protocol.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: January 22, 2013
    Assignee: Round Rock Research, LLC
    Inventors: Mark E. Tuttle, Rickie C. Lake, Steven F. Schicht, John R. Tuttle