By Fluid Patents (Class 324/750.08)
  • Patent number: 9442025
    Abstract: In some embodiments, a method may be provided for calibrating integrated circuit temperature sensors. The method may include sensing a first temperature using a first temperature sensor and a second temperature using a second temperature sensor. The first temperature sensor may be calibrated and is external to a package of the integrated circuit. The second temperature sensor may be included in the integrated circuit. The method may include increasing a temperature of the integrated circuit. The method may include allowing the integrated circuit and the package to thermally equilibrate over a first period of time. The method may include sensing a first slope of a temperature decay by the first temperature sensor. The method may include sensing a second slope of a temperature decay by the second temperature sensor. The method may include calibrating the second temperature sensor responsive to a difference between the first and second temperatures and the first and second slopes.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: September 13, 2016
    Assignee: Apple Inc.
    Inventors: Yizhang Yang, Jun Zhai
  • Patent number: 9434555
    Abstract: A handler includes a supply shuttle plate on which a device is placed and cooled, and a transfer robot configured to transfer the device placed on the supply shuttle plate from the supply shuttle plate. The transfer robot includes an adsorbing portion configured to adsorb the device placed on the supply shuttle plate thereon, a vertical movement arm configured to move the adsorbing portion away from the supply shuttle plate, an arm box configured to accommodate the adsorbing portion together with the device in a state of being kept away from the supply shuttle plate, and a dry air supply unit configured to supply dry gas into the arm box.
    Type: Grant
    Filed: February 12, 2013
    Date of Patent: September 6, 2016
    Assignee: Seiko Epson Corporation
    Inventors: Masami Maeda, Toshioki Shimojima
  • Patent number: 9335367
    Abstract: A method and structure are provided for implementing low temperature wafer testing of a completed wafer. A coolant gel is applied to the completed wafer, the gel coated wafer is cooled and one or more electrical test probes are applied through the gel to electrical contacts of the cooled wafer, and testing is performed.
    Type: Grant
    Filed: August 27, 2013
    Date of Patent: May 10, 2016
    Assignee: International Business Machines Corporation
    Inventors: Travis R. Hebig, Joseph Kuczynski, Steven R. Nickel
  • Patent number: 9151780
    Abstract: A wafer inspection interface 18 includes a probe card 20 having a substrate 20a and a multiple number of probes 25 that are provided at a surface of the substrate 20a facing a wafer W and arranged to correspond to electrodes of a plurality of semiconductor devices formed on the wafer W; a pogo frame 40 that is in contact with a surface of the probe card 20 opposite to a surface of the probe card 20 facing the wafer W and supports the probe card 20; and a shim 51 provided on the surface of the probe card 20 in contact with the pogo frame 40 and configured to adjust a thickness of the probe card 20. The shim 51 has a cross shape when viewed from the top.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: October 6, 2015
    Assignee: TOKYO ELECTRON LIMITED
    Inventor: Hiroshi Yamada
  • Patent number: 9146256
    Abstract: A probe assembly for inspecting power semiconductor devices, which includes a probe block having more than one probe holding hole, more than one probe, each of which is contained in one of the probe holding holes with its outer surface being in contact with the inner surface of the probe holding hole, and which has lower end protruding from the probe block and coming into contact with the power semiconductor device on inspection, and one or more cooling units which cool the probe block. According to the probe assembly and the inspection apparatus, it is possible to inspect characteristics of power semiconductor devices accurately by suppressing temperature rises of the probes as well as the power semiconductor device under test.
    Type: Grant
    Filed: December 5, 2012
    Date of Patent: September 29, 2015
    Assignee: KABUSHIKI KAISHA NIHON MICRONICS
    Inventors: Katsuo Yasuta, Hikaru Masuta, Hideki Nei, Tatsuya Ishiwatari
  • Patent number: 9140726
    Abstract: A support body for a plurality of contact terminals included in a probe card for inspecting semiconductor devices formed in a semiconductor substrate is provided. The support body includes a main body formed by stacking a plurality of plate-shaped members, a plurality of contact terminal holes formed through the main body in a thickness direction of the plate-shaped members, and one or more coolant paths provided in the main body. Further, the contact terminals respectively are inserted into the contact terminal holes.
    Type: Grant
    Filed: October 16, 2012
    Date of Patent: September 22, 2015
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Jun Mochizuki, Kunihiro Furuya
  • Patent number: 9075266
    Abstract: The present invention relates to a device for prebaking an alignment film by using a temperature-controllable pin to support a substrate and a method thereof. The device includes heater that prebakes a substrate from an underside of the substrate, a plurality of temperature-controllable pins for upward supporting the substrate, and a temperature control system. The temperature-controllable pins are coupled to the temperature control system and each of the temperature-controllable pins is independently controlled of temperature thereof by the temperature control system so as to uniformly heat a site of the substrate that is supported by the temperature-controllable pin and a periphery of the supported site. The device for prebaking alignment film by using temperature-controllable pin to support substrate and a method thereof according to the present invention alleviate non-uniform heating of a surface of glass substrate and thus alleviate pin mura.
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: July 7, 2015
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd.
    Inventors: Meina Zhu, Jianjun Zhao, Hsiangyin Shih
  • Patent number: 9057757
    Abstract: Forward voltage drift in a probe system for the characterization of a light-emitting wafer is virtually eliminated by directing compressed air to the probe so as to ensure that the exact same temperature conditions exist during repeated measurements of the wafer. In one embodiment of the invention, an air flow at room temperature is used, either continuously or intermittently. In another embodiment, the temperature of the probe is controlled by flowing a liquid or a gas through micro-channels built into the probe. In yet another embodiment, the probe is connected to a solid-state Peltier cell that is computer-controlled to maintain the probe's temperature at a predetermined set-point. A temperature-controlled chamber or a thermal reservoir enclosing the probe could be used as well. The results obtained showed remarkable repeatability.
    Type: Grant
    Filed: December 21, 2011
    Date of Patent: June 16, 2015
    Assignee: BRUKER NANO, INC.
    Inventor: Dong Chen
  • Patent number: 9046569
    Abstract: Embodiments of an apparatus and method for providing cooling of probes for testing of integrated circuits are generally described herein. In some embodiments, an apparatus comprises a probe head assembly configured to hold one or more probes that are adapted to provide electrical contact with an integrated circuit device under test (DUT), a DUT chuck adapted to hold the DUT for contact with the probes, a seal arranged between the probe head assembly and the DUT chuck to form a chamber when the seal is in contact with the probe head assembly and the DUT chuck, and a first port and a second port arranged to provide fluid flow into and fluid flow out of the chamber.
    Type: Grant
    Filed: November 5, 2012
    Date of Patent: June 2, 2015
    Assignee: Intel Corporation
    Inventors: Ronald Kirby, James G. Maveety, Joe Walczyk
  • Patent number: 9035669
    Abstract: An apparatus for testing electronic devices, having a test head coupled to at least one immovably mounted test socket, a positioning device for positioning the electronic device in testing position and a lead-backer attached to the positioning device for supporting the electronic device and pressing it against the test socket. A supply port for supplying a temperature control medium to a temperature control system of the said lead-backer is immovably mounted beside the said test socket, the said temperature control system of the said lead-backer and the said supply port communicate with each other when the electronic device is in testing position, whereby the said temperature control medium flows from the said supply port to the said temperature control system of the said lead-backer.
    Type: Grant
    Filed: February 20, 2013
    Date of Patent: May 19, 2015
    Assignee: Multitest Elektronische Systeme GmbH
    Inventors: Franz Pichl, Michael Hertkorn, Guenther Jeserer
  • Patent number: 9024651
    Abstract: A test apparatus for testing a semiconductor device includes a circuit board having a contact pattern on one side and an opening therethrough, and a probe card supporting a probe needle array. The probe needle array is insertable into the opening of the circuit board and is configured to probe a device under test. The probe needle array is in electrical contact with the contact pattern of the circuit board, to allow signals through the probe card and circuit board to a test equipment. A holder supports the probe card and other probe cards. The holder has multiple sides, each of which is supportable of a probe card having a probe needle array. The holder is rotatable to manipulate and position the probe needle arrays of the probe cards relative to a device under test. The holder allows disconnection and replacement of the probe needle arrays from the holder.
    Type: Grant
    Filed: July 6, 2012
    Date of Patent: May 5, 2015
    Assignees: Celadon Systems, Inc., Intel Corporation
    Inventors: Bryan J. Root, William A. Funk, Michael Palumbo, John L. Dunklee
  • Patent number: 9007080
    Abstract: An integrated circuit (IC) device tester maintains a set point temperature on an IC device under test (DUT) having a die attached to a substrate. The tester includes a thermal control unit and a fluid management system configured to supply the thermal control unit with fluids for pneumatic actuation, cooling, and condensation abating. The tester can includes a box enclosing the thermal control unit thereby providing a substantially isolated dry environment during low humidity testing of the DUT. The heat exchange plate may include an inner structure for thermal conductivity enhancement.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: April 14, 2015
    Assignee: Essai, Inc.
    Inventors: Nasser Barabi, Chee Wah Ho, Joven R. Tienzo, Oksana Kryachek, Elena V. Nazarov
  • Patent number: 8981802
    Abstract: A device tester for an IC device under test (DUT), the DUT having a substrate and an attached die. The device tester includes a thermal control unit and a test socket assembly which conforms to the DUT's profile. The thermal control unit includes a pedestal assembly, a heater having a fuse coupled to a heating element, a substrate pusher, and a force distributor for distributing force between the pedestal assembly and the substrate pusher. The test socket assembly includes a socket insert that supports and also conforms to the DUT's profile.
    Type: Grant
    Filed: July 30, 2012
    Date of Patent: March 17, 2015
    Assignee: Essai, Inc.
    Inventors: Nasser Barabi, Chee Wah Ho, Joven R. Tienzo, Oksana Kryachek, Elena V. Nazarov
  • Publication number: 20150061712
    Abstract: A method and structure are provided for implementing low temperature wafer testing of a completed wafer. A coolant gel is applied to the completed wafer, the gel coated wafer is cooled and one or more electrical test probes are applied through the gel to electrical contacts of the cooled wafer, and testing is performed.
    Type: Application
    Filed: August 27, 2013
    Publication date: March 5, 2015
    Applicant: International Business Machines Corporation
    Inventors: Travis R. Hebig, Joseph Kuczynski, Steven R. Nickel
  • Patent number: 8896335
    Abstract: An apparatus controls a temperature of a device by circulating a fluid through a heat sink in thermal contact with the device. The apparatus includes an adjustable cold input, which inputs a cold portion of the fluid having a first temperature, and an adjustable hot input, which inputs a hot portion of the fluid having a second temperature higher than the first temperature. The apparatus further includes a chamber, connected to the cold input and hot input, in which the cold and hot portions of the fluid mix in a combined fluid portion that impinges on the heat sink. The combined fluid portion has a combined temperature that directly affects a temperature of the heat sink. The cold input and hot input are adjusted to dynamically control the combined temperature, enabling the heat sink temperature to compensate for changes in the device temperature, substantially maintaining a set point temperature of the device.
    Type: Grant
    Filed: July 30, 2007
    Date of Patent: November 25, 2014
    Assignee: Advantest Corporation
    Inventors: Larry Stuckey, Anastasios Golnas, Robert Edward Aldaz, David Yu
  • Patent number: 8872531
    Abstract: A semiconductor device and a test apparatus including the same, the semiconductor device including a command distributor receiving a serial command that is synchronized with a first clock signal and converting the serial command into a parallel command, a command decoder receiving the parallel command and generating a pattern sequence based on the parallel command, and a signal generator receiving the pattern sequence and generating operating signals synchronized with a second clock signal, wherein a frequency of the first clock signal is less than a frequency of the second clock signal.
    Type: Grant
    Filed: March 16, 2011
    Date of Patent: October 28, 2014
    Assignees: Samsung Electronics Co., Ltd., Postech Academy Industry Foundation
    Inventors: Ki-jae Song, Ung-jin Jang, Jun-young Park, Sung-gu Lee, Hong-seok Yeon
  • Publication number: 20140312924
    Abstract: A handler includes: a rotating section which is a holding unit mounting section which can take a mounted state in which a holding unit for holding an IC device is mounted; and a transportation mechanism which transports the IC device held by the holding unit. The rotating section includes a heat generation section which generates heat and a heating flow path through which fluid which is heated by the heat generation section and is used for heating of the IC device passes.
    Type: Application
    Filed: March 7, 2014
    Publication date: October 23, 2014
    Applicant: Seiko Epson Corporation
    Inventors: Takayuki Imai, Haruhiko Miyamoto, Fuyumi Takata, Toshioki Shimojima
  • Publication number: 20140306728
    Abstract: An example system for testing electronic assemblies (EAs) may include carriers for holding EAs and slots for testing at least some of the EAs in parallel. Each slot may be configured to receive a corresponding carrier containing an EA and to test the EA. An example carrier in the system may include a first part and a second part. At least one of the first part and the second part include a first structure, and the first structure is movable to enable electrical connection between an EA and an electrical connector.
    Type: Application
    Filed: April 10, 2013
    Publication date: October 16, 2014
    Applicant: Teradyne, Inc.
    Inventors: John Joseph Arena, Anthony J. Suto
  • Patent number: 8854069
    Abstract: Production test of integrated circuit face thermal management challenges with higher power devices. Current production handlers do not have adequate thermal management characteristics. This invention employs thermal diodes on each device under test and a closed loop microprocessor controlled feedback system for thermal control during production test. The feedback system controls the open/close state of a valve supplying cooling fluid to bathe the integrated circuit based upon the difference between a temperature indicated by at least one thermal diode and a set point temperature.
    Type: Grant
    Filed: January 5, 2012
    Date of Patent: October 7, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Joseph Shelton Mayfield, Nolan Riley, Chad Turner, Angelo Sanchez
  • Patent number: 8836356
    Abstract: A vertical probe assembly includes an upper die; a lower die; a plurality of probes, the probes including an electrically conductive material, wherein the probes extend from the upper die through the lower die; and an air channel located between the upper die and the lower die, such that airflow through the air channel passes through the plurality of probes.
    Type: Grant
    Filed: December 12, 2011
    Date of Patent: September 16, 2014
    Assignee: International Business Machines Corporation
    Inventors: David M. Audette, Dustin M. Fregeau, David L. Gardell, Daniel J. Murphy, Grant Wagner
  • Publication number: 20140239991
    Abstract: A method and an apparatus for verifying or testing test substrates, i.e. wafers and other electronic semiconductor components, in a prober under defined thermal conditions. Such a verifying apparatus, known to the person skilled in the art as a prober, has a housing having at least two housing sections, in one housing section of which, designated hereinafter as test chamber, the test substrate to be verified is held by a chuck and is set to a defined temperature, and in the other housing section of which, designated hereinafter as probe chamber, probes are held. For verification purposes, the test substrate and the probes are positioned relative to one another by means of at least one positioning device and the probes subsequently make contact with the test substrate.
    Type: Application
    Filed: April 2, 2014
    Publication date: August 28, 2014
    Applicant: CASCADE MICROTECH, INC.
    Inventors: Michael Teich, Stojan Kanev, Hans-Jurgen Fleischer
  • Publication number: 20140232423
    Abstract: An apparatus for testing electronic devices, having a test head coupled to at least one immovably mounted test socket, a positioning device for positioning the electronic device in testing position and a lead-backer attached to the positioning device for supporting the electronic device and pressing it against the test socket. A supply port for supplying a temperature control medium to a temperature control system of the said lead-backer is immovably mounted beside the said test socket, the said temperature control system of the said lead-backer and the said supply port communicate with each other when the electronic device is in testing position, whereby the said temperature control medium flows from the said supply port to the said temperature control system of the said lead-backer.
    Type: Application
    Filed: February 20, 2013
    Publication date: August 21, 2014
    Applicant: MULTITEST ELEKTRONISCHE SYSTEME GMBH
    Inventors: Franz Pichl, Michael Hertkorn, Guenther Jeserer
  • Patent number: 8810266
    Abstract: A micro-spray cooling system beneficial for use in testers of electrically stimulated integrated circuit chips is disclosed. The system includes micro-spray heads disposed about a probe head. The spray heads and probe head are disposed in a sealed manner inside a spray chamber that, during operation, is urged in a sealing manner onto a sealing plate holding the integrated circuit under test. The atomized mist cools the integrated circuit and then condenses on the spray chamber wall. The condensed fluid is pumped out of the chamber and is circulated in a chiller, so as to be re-circulated and injected again into the micro-spray heads. The pressure inside the spray chamber may be controlled to provide a desired boiling point.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: August 19, 2014
    Assignees: DCG Systems, Inc., Isothermal Systems Research, Inc.
    Inventors: Tahir Cader, Charles Lester Tilton, Benjamin Hewett Tolman, George Joseph Wos, Alan Brent Roberts, Thomas Wong, Jonathan D. Frank
  • Publication number: 20140210499
    Abstract: Testing methods and systems are described. One method for testing an electronic device includes providing a probe in electrical contact with a device. The method also includes positioning an interface of the probe and the device in a liquid medium. The method also includes transmitting a current from the probe through the interface while the interface is in the liquid medium. Other embodiments are described and claimed.
    Type: Application
    Filed: December 31, 2011
    Publication date: July 31, 2014
    Inventors: Warren S. Crippen, Brett Grossman, Roy E. Swart, Pooya Tadayon
  • Publication number: 20140203829
    Abstract: The test jig includes: a package mounting plate on which a semiconductor device is placed; a plurality of penetrating holes provided in the package mounting plate; a socket portion in which a plurality of probe pins are disposed, the probe pins designed to come in contact with electrodes of the semiconductor device through the penetrating holes; and a gas injecting unit configured to inject gas to the package mounting plate through the socket portion. The test of the semiconductor device is performed with the gas injected from the gas injecting unit to the package mounting plate.
    Type: Application
    Filed: March 20, 2014
    Publication date: July 24, 2014
    Applicant: FUJITSU LIMITED
    Inventor: Hiroshi Yamada
  • Patent number: 8736288
    Abstract: A system includes electronics for testing a device, a reservoir to store coolant, where the reservoir includes a bellows that is compressible, a pump system to move coolant out of the reservoir to cool the electronics, and means to compress the bellows and thereby pressurize the coolant stored in the reservoir so that the coolant remains substantially flush with an interface to the pump system.
    Type: Grant
    Filed: May 16, 2011
    Date of Patent: May 27, 2014
    Assignee: Teradyne, Inc.
    Inventors: David Walter Lewinnek, Ray Mirkhani, Jack Michael Thompson, John Kenji Narasaki
  • Patent number: 8729918
    Abstract: An apparatus comprising a test circuit that is provided on a test substrate and tests the device under test; a sealing section that covers a region of the test substrate on which the test circuit is formed, and seals the test circuit to form a sealed space that is filled with a cooling agent; and a through-connector that passes through the sealing section and electrically connects the test circuit to an element provided outside the sealing section, such that the connection is not through the test substrate.
    Type: Grant
    Filed: April 7, 2011
    Date of Patent: May 20, 2014
    Assignee: Advantest Corporation
    Inventors: Tsuyoshi Ataka, Atsushi Ono
  • Publication number: 20140125367
    Abstract: Embodiments of an apparatus and method for providing cooling of probes for testing of integrated circuits are generally described herein. In some embodiments, an apparatus comprises a probe head assembly configured to hold one or more probes that are adapted to provide electrical contact with an integrated circuit device under test (DUT), a DUT chuck adapted to hold the DUT for contact with the probes, a seal arranged between the probe head assembly and the DUT chuck to form a chamber when the seal is in contact with the probe head assembly and the DUT chuck, and a first port and a second port arranged to provide fluid flow into and fluid flow out of the chamber.
    Type: Application
    Filed: November 5, 2012
    Publication date: May 8, 2014
    Inventors: Ronald Kirby, James G. Maveety, Joe Walczyk
  • Publication number: 20140077829
    Abstract: A test handler and a test method of a semiconductor device using the same includes a plurality of chambers to provide a sealed inner space accommodating a first tray on which semiconductor devices are mounted, a test module electrically connected to the semiconductor devices in the chambers to perform a test process of the semiconductor devices, and a sort part to load and unload the first tray in the chambers and to sort semiconductor devices determined to be failed in the test process. The plurality of chambers have a fluid path circulating a coolant or a heat medium in the walls so that a temperature of the plurality of chambers is rapidly changed at the test process of the semiconductor devices between a first temperature that is less than room temperature and a second temperature that is greater than room temperature.
    Type: Application
    Filed: September 13, 2013
    Publication date: March 20, 2014
    Applicant: Samsung Electronics Co., Ltd
    Inventors: Jea-Muk OH, SANGIL Kim, BYOUNGJUN MIN, JONGPIL PARK
  • Patent number: 8653842
    Abstract: Thermal control units (TCU) for maintaining a set point temperature on an IC device under test (DUT) are provided. The units include a pedestal assembly comprising a heat-conductive pedestal, a fluid circulation block, a thermoelectric module (Peltier device) between the heat-conductive pedestal and the block for controlling heat flow between the pedestal and fluid circulation block, and a force distribution block for controllably distributing a z-axis force between different pushers of the TCU. Alternatively, instead of a thermoelectric module, a heater can provide heat to the DUT. Optionally, a swivelable temperature-control fluid inlet and outlet arms may be provided to reduce instability of the thermal control unit due to external forces exerted on the TCU such as by fluid lines attached to the fluid inlet and outlet arms. Also optionally, an integrated means for abating condensation on surfaces of the TCU during cold tests may be provided.
    Type: Grant
    Filed: April 6, 2011
    Date of Patent: February 18, 2014
    Assignee: Essai, Inc.
    Inventors: Nasser Barabi, Chee Wah Ho, Joven R. Tienzo, Oksana Kryachek, Elena V. Nazarov
  • Publication number: 20130271170
    Abstract: An integrated circuit (IC) device tester maintains a set point temperature on an IC device under test (DUT) having a die attached to a substrate. The tester includes a thermal control unit and a fluid management system configured to supply the thermal control unit with fluids for pneumatic actuation, cooling, and condensation abating. The tester can includes a box enclosing the thermal control unit thereby providing a substantially isolated dry environment during low humidity testing of the DUT. The heat exchange plate may include an inner structure for thermal conductivity enhancement.
    Type: Application
    Filed: March 14, 2013
    Publication date: October 17, 2013
    Inventors: Nasser Barabi, Chee Wah Ho, Joven R. Tienzo, Oksana Kryachek, Elena V. Nazarov
  • Patent number: 8508245
    Abstract: Thermal control units (TCU) for maintaining a set point temperature on an IC device under test (DUT) are provided. The units include a pedestal assembly comprising a heat-conductive pedestal, a fluid circulation block, a thermoelectric module (Peltier device) between the heat-conductive pedestal and the block for controlling heat flow between the pedestal and fluid circulation block, and a force distribution block for controllably distributing a z-axis force between different pushers of the TCU. Optionally, a swivelable temperature-control fluid inlet and outlet arms may be provided to reduce instability of the thermal control unit due to external forces exerted on the TCU such as by fluid lines attached to the fluid inlet and outlet arms. Also optionally, an integrated means for abating condensation on surfaces of the TCU during cold tests may be provided.
    Type: Grant
    Filed: November 30, 2010
    Date of Patent: August 13, 2013
    Assignee: Essai, Inc.
    Inventors: Nasser Barabi, Elena Nazarov, Joven R. Tienzo, Chee-Wah Ho
  • Publication number: 20130147502
    Abstract: A vertical probe assembly includes an upper die; a lower die; a plurality of probes, the probes comprising an electrically conductive material, wherein the probes extend from the upper die through the lower die; and an air channel located between the upper die and the lower die, such that airflow through the air channel passes through the plurality of probes.
    Type: Application
    Filed: December 12, 2011
    Publication date: June 13, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: David M. Audette, Dustin M. Fregeau, David L. Gardell, Daniel J. Murphy, Grant Wagner
  • Publication number: 20130127483
    Abstract: A radiator module system for automatic test equipment, wherein the automatic test equipment comprises at least one test arm, with the front end of the test arm being configured with a test head, and a closed-loop circulating cooling device is installed on the test arm. The closed-loop circulating cooling device includes a conduit which is in contact with the cooling device, internally contains an working fluid and is connected to the test head, a cooling device, a set of fans and a driving source for driving the working fluid. The closed-loop circulating cooling device can operate to circulate and exchange heat energy generated by a device under test (DUT) tightly stressed by downward pressure applied with the test arm, and brings up airflows by means of the fans to perform heat exchange on the cooling device thereby dissipating the generated heat energy.
    Type: Application
    Filed: March 8, 2012
    Publication date: May 23, 2013
    Inventors: Xin-Yi WU, Jui-Che Chou, Meng-Kung Lu, Chin-Yi Ou Yang
  • Publication number: 20130093446
    Abstract: A support body for a plurality of contact terminals included in a probe card for inspecting semiconductor devices formed in a semiconductor substrate is provided. The support body includes a main body formed by stacking a plurality of plate-shaped members, a plurality of contact terminal holes formed through the main body in a thickness direction of the plate-shaped members, and one or more coolant paths provided in the main body. Further, the contact terminals respectively are inserted into the contact terminal holes.
    Type: Application
    Filed: October 16, 2012
    Publication date: April 18, 2013
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: TOKYO ELECTRON LIMITED
  • Patent number: 8395400
    Abstract: A testing device of semiconductor devices includes a temperature detector detecting temperatures of semiconductor devices, and a temperature control unit controlling the temperatures of the semiconductor devices based on a detected temperature, in which the temperature control unit includes thermal heads cooling or heating the semiconductor devices, solution pipes through which solutions set to different temperatures flow, and a channel switching part switching whether or not to make the solution flow through the thermal head, and when a test is conducted, the solution flown through the thermal head is switched according to heating amount of the semiconductor device.
    Type: Grant
    Filed: October 27, 2009
    Date of Patent: March 12, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Hideaki Nakamura
  • Patent number: 8384405
    Abstract: A method of the invention for performing burn-in test includes assembling, on a fixture stand, a plurality of light source elements and a plurality of light detectors for monitoring a light output from a corresponding one of the plurality of light source elements; and electrifying the plurality of light source elements in a state where at least the plurality of light source elements and the plurality of light detectors are immersed in an insulation liquid. Thereby, it is realized to hold a stable temperature in a short period of time, to maintain a temperature that does not deviate from normal load conditions, and to perform a sorting test between defect parts and good part for light source unit chips without causing damage to the elements.
    Type: Grant
    Filed: April 20, 2011
    Date of Patent: February 26, 2013
    Assignee: TDK Corporation
    Inventors: Koji Shimazawa, Ryo Hosoi, Yasuhiro Ito, Masaaki Kaneko, Takashi Honda, Ryuji Fujii, Koji Hosaka
  • Publication number: 20130021049
    Abstract: A device tester for an IC device under test (DUT), the DUT having a substrate and an attached die. The device tester includes a thermal control unit and a test socket assembly which conforms to the DUT's profile. The thermal control unit includes a pedestal assembly, a heater having a fuse coupled to a heating element, a substrate pusher, and a force distributor for distributing force between the pedestal assembly and the substrate pusher. The test socket assembly includes a socket insert that supports and also conforms to the DUT's profile.
    Type: Application
    Filed: July 30, 2012
    Publication date: January 24, 2013
    Inventors: Nasser Barabi, Chee Wah Ho, Joven R. Tienzo, Oksana Kryachek, Elena V. Nazarov
  • Publication number: 20120268149
    Abstract: The present invention relates to electrical test apparatuses for photovoltaic modules and methods of testing photovoltaic modules.
    Type: Application
    Filed: April 23, 2012
    Publication date: October 25, 2012
    Inventors: Pat Buehler, David Kahle, Matthew J. Mattin, Kevin Niebel
  • Patent number: 8274300
    Abstract: A thermal control unit with a heat pipe that conducts heat away from a device under test during burn-in. The heat pipe has a heater that allows control of the rate at which heat is transferred from the DUT to the heat pipe. A sensor and controller are provided to control the heat in response to the measured temperature of the DUT. The sensor and controller control the heater to maintain the surface temperature of the DUT within a specified range.
    Type: Grant
    Filed: January 14, 2009
    Date of Patent: September 25, 2012
    Assignee: KES Systems & Service (1993) Pte Ltd.
    Inventors: Naoto Sakaue, Fook Seng Kong
  • Publication number: 20120169363
    Abstract: Production test of integrated circuit face thermal management challenges with higher power devices. Current production handlers do not have adequate thermal management characteristics. This invention employs thermal diodes on each device under test and a closed loop microprocessor controlled feedback system for thermal control during production test.
    Type: Application
    Filed: January 5, 2012
    Publication date: July 5, 2012
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Joseph Shelton Mayfield, Nolan Riley, Chad Turner, Angelo Sanchez
  • Publication number: 20120112777
    Abstract: An electronic device pushing apparatus includes a pushing unit which has: a plurality of pushers which contact DUTs; and base plate on which the plurality of pushers are provided. A rigidity of the base plate is set to a rigidity which is lower relative to the rigidity of a spacing frame of the HIFIX.
    Type: Application
    Filed: July 14, 2009
    Publication date: May 10, 2012
    Applicant: ADVANTEST CORPORATION
    Inventors: Mitsunori Aizawa, Akihiko Ito, Noboru Masuda
  • Publication number: 20120113556
    Abstract: An apparatus is described for burn-in and/or functional testing of microelectronic circuits of unsingulated wafers. A large number of power, ground, and signal connections can be made to a large number of contacts on a wafer. The apparatus has a cartridge that allows for fanning-in of electric paths. A distribution board has a plurality of interfaces that are strategically positioned to provide a dense configuration. The interfaces are connected through flexible attachments to an array of first connector modules. Each one of the first connector modules can be independently connected to a respective one of a plurality of second connector modules, thereby reducing stresses on a frame of the apparatus. Further features include for example a piston that allows for tight control of forces exerted by terminals onto contacts of a wafer.
    Type: Application
    Filed: January 18, 2012
    Publication date: May 10, 2012
    Applicant: Aehr Test Systems
    Inventors: Donald P. Richmond, II, Kenneth W. Deboe, Frank O. Uher, Jovan Jovanovic, Scott E. Lindsey, Thomas T. Maenner, Patrick M. Shepherd, Jeffrey L. Tyson, Mark C. Carbone, Paul W. Burke, Doan D. Cao, James F. Tomic, Long V. Vu
  • Publication number: 20120007623
    Abstract: A micro-spray cooling system beneficial for use in testers of electrically stimulated integrated circuit chips is disclosed. The system includes micro-spray heads disposed about a probe head. The spray heads and probe head are disposed in a sealed manner inside a spray chamber that, during operation, is urged in a sealing manner onto a sealing plate holding the integrated circuit under test. The atomized mist cools the integrated circuit and then condenses on the spray chamber wall. The condensed fluid is pumped out of the chamber and is circulated in a chiller, so as to be re-circulated and injected again into the micro-spray heads. The pressure inside the spray chamber may be controlled to provide a desired boiling point.
    Type: Application
    Filed: September 22, 2011
    Publication date: January 12, 2012
    Applicant: DCG SYSTEMS, INC.
    Inventors: Tahir Cader, Charles Lester Tilton, Benjamin Hewett Tolman, George Joseph Wos, Alan Brent Roberts, Thomas Wong, Jonathan D. Frank
  • Patent number: 8082977
    Abstract: A mounting apparatus includes a surface plate; a temperature control unit integrated with the surface plate; and a bottom plate integrated with the temperature control unit via a heat insulation ring, wherein a temperature of a target object held on the surface plate is capable of being controlled and the surface plate is formed of ceramic. The surface plate and the temperature control unit are coupled to each other by a first coupling member at each portion thereof except for each peripheral portion thereof such that the peripheral portion of the surface plate being not coupled thereto. The peripheral portion of the temperature control unit is coupled to the heat insulation ring by a second coupling member.
    Type: Grant
    Filed: March 12, 2007
    Date of Patent: December 27, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Yutaka Akaike, Munetoshi Nagasaka
  • Patent number: 8076951
    Abstract: A micro-spray cooling system beneficial for use in testers of electrically stimulated integrated circuit chips is disclosed. The system includes micro-spray heads disposed about a probe head. The spray heads and probe head are disposed in a sealed manner inside a spray chamber that, during operation, is urged in a sealing manner onto a sealing plate holding the integrated circuit under test. The atomized mist cools the integrated circuit and then condenses on the spray chamber wall. The condensed fluid is pumped out of the chamber and is circulated in a chiller, so as to be re-circulated and injected again into the micro-spray heads. The pressure inside the spray chamber may be controlled to provide a desired boiling point.
    Type: Grant
    Filed: March 11, 2009
    Date of Patent: December 13, 2011
    Assignees: DCG Systems, Inc., Isothermal Systems Research, Inc.
    Inventors: Tahir Cader, Charles Lester Tilton, Benjamin Hewett Tolman, George Joseph Wos, Alan Brent Roberts, Thomas Wong, Jonathan D. Frank
  • Patent number: 8035405
    Abstract: A probing apparatus includes a housing, a device holder positioned in the housing and configured to receive a device under test, a temperature-controller positioned in the device holder, a platen positioned on the housing and configured to retain at least one probe, and a flow line positioned in the platen, wherein the flow line is configured to flow a fluid therein to adjust the temperature of the platen.
    Type: Grant
    Filed: March 11, 2009
    Date of Patent: October 11, 2011
    Assignee: Star Technologies Inc.
    Inventor: Choon Leong Lou
  • Patent number: 8008934
    Abstract: A burn-in system (10) includes an enclosure (12) defining a burn-in chamber (14). The enclosure (12) is configured to be mounted on a burn-in board (34) over a burn-in socket (36). A heating element (16) is configured to generate heat within the burn-in chamber (14) and a temperature sensor (18) is configured to sense a temperature within the burn-in chamber (14). An opening (24) is formed in the enclosure (12) for receiving a fluid (26). A controller (20) is configured to control the heating element (16) and fluid flow into the enclosure (12) in response to the temperature sensed by the temperature sensor (18).
    Type: Grant
    Filed: June 10, 2009
    Date of Patent: August 30, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Wei Ping Wong, Chee Keong Chiew, Kok Hua Lee
  • Publication number: 20110109335
    Abstract: An apparatus to test a semiconductive device includes a base plane that holds at least one heat-transfer fluid unit cell. The at least one heat-transfer fluid unit cell includes a fluid supply structure including a supply-orifice cross section as well as a fluid return structure including a return-orifice cross section. The supply-orifice cross section is greater than the return-orifice cross section. A die interface is also included to be a liquid-impermeable material.
    Type: Application
    Filed: November 6, 2009
    Publication date: May 12, 2011
    Inventors: Christopher R. Schroeder, Christopher W. Ackerman, James C. Shipley, Tolga Acikalin, Ioan Sauciuc, Michael L. Rutigliano, James G. Maveety, Ashish X. Gupta
  • Publication number: 20100315109
    Abstract: A burn-in system (10) includes an enclosure (12) defining a burn-in chamber (14). The enclosure (12) is configured to be mounted on a burn-in board (34) over a burn-in socket (36). A heating element (16) is configured to generate heat within the burn-in chamber (14) and a temperature sensor (18) is configured to sense a temperature within the burn-in chamber (14). An opening (24) is formed in the enclosure (12) for receiving a fluid (26). A controller (20) is configured to control the heating element (16) and fluid flow into the enclosure (12) in response to the temperature sensed by the temperature sensor (18).
    Type: Application
    Filed: June 10, 2009
    Publication date: December 16, 2010
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Wei Ping Wong, Chee Keong Chiew, Kok Hua Lee