Abstract: A steady-state microwave conductivity method whereby a light beam is modulated to form an amplitude modulated light having a modulation frequency ?1. The method further includes producing a microwave waveform, exposing a sample to the amplitude modulated light and a first portion of the microwave waveform to produce an amplitude modulation signal on the first portion of the microwave waveform, and mixing a second portion of the microwave waveform and the amplitude modulation signal to produce a first signal and a second signal.

Abstract: A test method is provided to test a semiconductor integrated circuit including an analog-to-digital converter and/or a digital-to-analog converter. An analog test signal having a test pattern is generated using an analog test signal generator or a digital test signal having the test pattern using a digital test signal generator. An analog output signal corresponding to the test pattern is generated by applying, as a digital input signal, the digital test signal having the test pattern to a digital-to-analog converter responsive to generation of the digital test signal. A digital output signal corresponding to the test pattern is generated by applying, as an analog input signal, the analog test signal having the test pattern or the analog output signal corresponding to the test pattern to an analog-to-digital converter. A normality of the semiconductor integrated circuit is determined based on the digital output signal corresponding to the test pattern.

Abstract: Various embodiments are described that relate to failure determination for an integrated circuit. An integrated circuit can be tested to determine if the integrated circuit is functioning properly. The integrated circuit can be subjected to a specific radiation such that the integrated circuit produces a response. This response can be compared against an expected response to determine if the response matches the expected response. If the response does not match the expected response, then the integrated circuit fails the test. If the response matches the expected response, then the integrated circuit passes the test.

Abstract: The present disclosure relates to a steady-state microwave conductivity method that includes modulating a light beam to form an amplitude modulated light having a modulation frequency ?1, producing a microwave waveform, exposing a sample to the amplitude modulated light and a first portion of the microwave waveform to produce an amplitude modulation signal on the first portion of the microwave waveform, and mixing a second portion of the microwave waveform and the amplitude modulation signal to produce a first signal and a second signal.

Abstract: A system detects cracks in solder joints on a printed circuit board (PCB). The system includes a device, a signal generator, a termination resistor, and a detector. The device includes a first contact and a second contact coupled to the first contact. The device is soldered to the PCB by a first solder joint at the first contact and by a second solder joint at the second contact. The signal generator has a test signal output coupled to the first solder joint. The termination resistor has a first terminal coupled to the second solder joint, and a second terminal coupled to a ground plane of the PCB. The detector receives a reflected signal that is a reflection of the test signal from at least one of the first solder joint, the second solder joint, and the termination resistor. The detector provides an indication as to whether or not at least one of the first solder joint and the second solder joint is cracked based upon a magnitude of the reflected signal.

Abstract: An inspection apparatus includes: a plurality of support members that support a display panel at a predetermined height; a bending-pressing member that presses a pressing surface of the display panel; a sound wave sensor that senses a sound wave generated from the display panel during a bending inspection process, wherein during the bending inspection process, the bending-pressing member presses the pressing surface of the display panel; and an inspection controller that detects a crack in the display panel using the sound wave sensed by the sound wave sensor.

Abstract: Provided is a method of measuring the concentration of Fe in a p-type silicon wafer by an SPV method enabling improvement in the measurement accuracy for Fe concentrations of 1×109/cm3 or less. The method of measuring the concentration of Fe in a p-type silicon wafer includes measuring an Fe concentration in the p-type silicon wafer based on measurement using an SPV method. The measurement is performed in an atmosphere in which the total concentration of Na+, NH4+, and K+ is 1.750 ?g/m3 or less, and the total concentration of F?, Cl?, NO2?, PO43?, Br?, NO3?, and SO42? is 0.552 ?g/m3 or less.

Abstract: The present disclosure discloses a method for detecting a wafer backside defect, comprising: Step 1, providing a signal database comprising signal data corresponding to various different defects, the defects comprising convex defects and concave defects, the signal data reflecting 3D information of the corresponding defect; Step 2, performing backside scanning on a tested wafer by using oblique incident light, and collecting corresponding emitted and scattered light data; and Step 3, comparing the collected emitted and scattered light data with the signal data, and fitting a defect 3D distribution map of the backside of the tested wafer. The present disclosure can test the height or depth of a wafer backside defect and form a 3D distribution map of the wafer backside defect, which is beneficial for analyzing the source of the wafer backside defect and processing it in time, reducing the troubleshooting time and improving the product yield.

Abstract: An input/output (I/O) block for a semiconductor integrated circuit (IC), which includes: at least one I/O buffer, configured to define at least one signal path in respect of a connection to a remote I/O block via a communication channel, each signal path causing a respective signal edge slope; and an I/O sensor, coupled to the at least one signal path and configured to generate an output signal indicative of one or both of: (a) a timing difference between the signal edge for a first signal path and the signal edge for a second signal path, and (b) an eye pattern parameter for one or more of the at least one signal path.

Abstract: An input/output (I/O) block for a semiconductor integrated circuit (IC), which includes: at least one I/O buffer, configured to define at least one signal path in respect of a connection to a remote I/O block via a communication channel, each signal path causing a respective signal edge slope; and an I/O sensor, coupled to the at least one signal path and configured to generate an output signal indicative of one or both of: (a) a timing difference between the signal edge for a first signal path and the signal edge for a second signal path, and (b) an eye pattern parameter for one or more of the at least one signal path.

Abstract: Devices, methods, and computer program products for detecting Points Of Failures in an integrated circuit (IC) are provided. The integrated circuit device is described by a structural description (2) comprising a plurality of elements, the elements representing cells and wires interconnecting the cells, the structural description further comprising portions representing a set of sensitive functional blocks (16), each sensitive functional block comprising one or more inputs, at least one sensitive output, and a set of elements interconnected such that the value of the sensitive output is a Boolean function of the input values of the sensitive functional block.

Abstract: Various approaches can be used to interrogate a surface such as a surface of a layered semiconductor structure on a semiconductor wafer. Certain approaches employ Second Harmonic Generation and in some cases may utilize pump and probe radiation. Other approaches involve determining current flow from a sample illuminated with radiation. Decay constants can be measured to provide information regarding the sample. Additionally, electric and/or magnetic field biases can be applied to the sample to provide additional information.

Abstract: An integrated circuit is fabricated on a semiconductor material die and adapted to be at least partly tested wirelessly. Circuitry for setting a selected radio communication frequency to be used for the wireless test of the integrated circuit is integrated on the semiconductor material die.

Abstract: The disclosure discloses a display driving circuit, a driving method thereof and a display apparatus. A signal receiving antenna detects the degree of noise coupling of a pair of differential data transmission lines, and transmits to a signal compensation controller a voltage value of a coupling signal. The signal compensation controller transmits to a timer controller and/or a source IC a correction signal corresponding to the voltage value of the coupling signal, which is used to adjust differential data signals transmitted over the pair of differential data transmission lines.

Abstract: A radiated emission measuring device includes: an electric field measuring device and an arithmetic processing unit. The arithmetic processing unit performs: a first arithmetic process of creating at least one of an electric field distribution and an electric field strength distribution of the plurality of measurement points measured by the electric field measuring device and inputting zero to at least one of an electric field and electric field strengths at a certain point between two neighboring measurement points; a second arithmetic process of applying a digital low pass filter to at least one of the electric field distribution and the electric field strength distribution obtained in the first arithmetic process; and a third arithmetic process of specifying a position at a maximum electric field strength from at least one of an electric field distribution and an electric field strength distribution obtained in the second arithmetic process.

Abstract: Systems and methods are provided for a UV-VIS spectrophotometer, such as a UV-VIS detector unit included in a high-performance liquid chromatography system. In one example, a system for the UV-VIS detector unit may include a first light source, a signal detector, a flow path positioned intermediate the first light source and the signal detector, a second light source, and a reference detector. The first light source, the signal detector, and the flow path may be aligned along a first axis, and the second light source and the reference detector may be aligned along a second axis, different than the first axis.

Abstract: A system for measuring a current from a battery with a Hall Effect sensor, the current powering a primary load and a secondary load. The system to calculate a status of the battery based on the measured current, then compare the status of the battery to a predetermined value. The system to activate a relay when the status of the battery is below a predetermined value, activation of the relay to prevent the current from powering the secondary load.

Abstract: An electric field sensor includes sense and reference cells. The sense cell produces a resistance that varies relative to an intensity of an electric field, and the reference cell produces a resistance that is invariable relative to the intensity of the electric field. An output signal indicative of the intensity of the electric field is determined using the difference between the resistances. A system includes an electric field source that outputs a digital test program as an electric field signal. The system further includes the electric field sensor formed with IC dies on a wafer. The electric field sensor receives the electric field signal. The received electric field signal is converted to the test program, and the test program is stored in memory on the wafer. The electric field source does not physically contact the dies, but can flood an entire surface of the wafer with the electric field signal.

Abstract: The present invention provides a detecting apparatus and a detecting method. The detecting apparatus comprises: a base, a light source module, an image generating unit and a detecting unit. The light source module is configured to generate detecting light and cause the detecting light to irradiate towards the image generating unit after passing through an area of a shorting bar circuit in a panel. The image generating unit is configured to receive the detecting light irradiating thereon, and generate a detecting image of the area of the shorting bar circuit. The detecting unit is configured to detect whether the shorting bar circuit in the panel is cut off based on the detecting image. As the detecting light passing through the panel lasts for a longer time and is of higher brightness, the detecting image generated by the image generating unit is clearer.

Abstract: A method for determining scattering parameters using a calibration substrate having at least one calibration standard with at least two electrical connection points, each for one measurement gate of a vector network analyzer. At least one electrical connection point is formed of at least one calibration standard having a switch, wherein the switch has a first electrical contact electrically connected to an electrical connection point of the calibration standard, a second electrical contact designed for electrically connecting to a measurement gate of the vector network analyzer, and a third electrical contact, wherein the switch is designed such that an electrical contact is established either between the first and third electrical contact or between the first and second electrical contact.

Abstract: Electronic device structures such as structures containing antennas, connectors, welds, electronic device components, conductive housing structures, and other structures can be tested for faults using a non-contact test system. The test system may include a vector network analyzer or other test unit that generates radio-frequency tests signals in a range of frequencies. The radio-frequency test signals may be transmitted to electronic device structures under test using an antenna probe that has one or more test antennas. The antenna probe may receive corresponding radio-frequency signals. The transmitted and received radio-frequency test signals may be analyzed to determine whether the electronic device structures under test contain a fault.

Abstract: An automatic setting method of an observation condition to facilitate analysis of an image and a sample observation method by automatic setting in an observation method of a structure of a sample by the electronic microscope and an electronic microscope having an automatic setting function are provided. The method includes a step of irradiating a fixed position in an observation region with an intermittent pulsed electron beam; a step of detecting a time change of an emission electron from the sample by the intermittent electron beam; and a step of setting the observation condition of the electronic microscope from the time change of the emission electron.

Abstract: The transformer fault detection apparatus includes an integrated sensor unit for sensing signals through a plurality of sensors located on each of upper and lower drain valves in a transformer. A first possible discharge area calculation unit calculates a first possible discharge area estimated to be a location of a partial discharge source of the transformer, based on arrival times of signals sensed by different sensors located on the upper drain valve. A second possible discharge area calculation unit calculates a second possible discharge area estimated to be the location of the partial discharge source, based on arrival times of signals sensed by different sensors located on the lower drain valve. A final possible discharge area calculation unit calculates a final possible discharge area, based on an overlapping area between the first and second possible discharge areas.

Abstract: A test system including an embodiment having a sensor array adapted to test one or more devices under test in learning modes as well as evaluation modes. An exemplary test system can collect a variety of test data as a part of a machine learning system associated with known-good samples. Data collected by the machine learning system can be used to calculate probabilities that devices under test in an evaluation mode meet a condition of interest based on multiple testing and sensor modalities. Learning phases or modes can be switched on before, during, or after evaluation mode sequencing to improve or adjust machine learning system capabilities to determine probabilities associated with different types of conditions of interest. Multiple permutations of probabilities can collectively be used to determine an overall probability of a condition of interest which has a variety of attributes.

Abstract: A controller for use with a nondestructive inspection system communicates with the nondestructive inspection system and with a robot for moving an inspection probe of the nondestructive inspection system relative to an object under inspection. The controller is configured to periodically generate estimated position information of the probe moving relative to the object under inspection and communicate the estimated position information to the nondestructive inspection system as the nondestructive inspection system collects inspection data from the probe. The controller receives actual position information from the robot, the actual position information indicating an actual position of the probe, and corrects the estimated position information based on the actual position information.

Abstract: A test circuit is described of a circuit integrated on wafer of the type comprising at least one antenna of the embedded type comprising at least one test antenna associated with said at least one embedded antenna that realizes its connection of the wireless loopback type creating a wireless channel for said at least one embedded antenna and allows its electric test, transforming an electromagnetic signal of communication between said at least one embedded antenna and said at least one test antenna into an electric signal that can be read by a test apparatus.

Abstract: A probe card for conducting an electrical test on a test subject includes a substrate body including a first surface, which faces toward the test subject, and a second surface, which is opposite to the first surface. A through electrode extends through the substrate body between the first surface and the second surface. A contact bump is formed in correspondence with the electrode pad and electrically connected to the through electrode. An elastic body is filled in an accommodating portion, which is formed in the substrate body extending from the first surface toward the second surface. The contact bump is formed on the elastic body.

Abstract: A system and method are provided for testing an integrated circuit (IC) using thermally induced noise analysis. The method provides an IC die and supplies electrical power to the IC die. The IC die surface is scanned with a laser, and the laser beam irradiated locations on the IC die surface are tracked. The laser scanning heats active electrical elements underlying the scanned IC die surface. A frequency response of an IC die electrical interface is measured and correlated to irradiated locations. IC die defect regions are determined in response to identifying location-correlated frequency measurements exceeding a noise threshold. For example, a frequency measurement may be correlated to a die surface location, and if frequency measurement exceeds the noise threshold, then circuitry underlying that surface area may be identified as defective. Typically, die defect regions are associated with measurements in the frequency range between about 1 Hertz and 10 kilohertz.

Abstract: Electronic device structures such as structures containing antennas, connectors, welds, electronic device components, conductive housing structures, and other structures can be tested for faults using a non-contact test system. The test system may include a vector network analyzer or other test unit that generates radio-frequency tests signals in a range of frequencies. The radio-frequency test signals may be transmitted to electronic device structures under test using an antenna probe that has one or more test antennas. The antenna probe may receive corresponding radio-frequency signals. The transmitted and received radio-frequency test signals may be analyzed to determine whether the electronic device structures under test contain a fault.

Abstract: A contactless measuring system having at least one test probe forming part of a coupling structure for the contactless decoupling of a signal running on a signal waveguide, wherein the signal waveguide is designed as a conductor of the electric circuit on a circuit board and as part of an electric circuit. To this end, at least one contact structure is configured and disposed on the circuit board such that said contact structure is galvanically separated from the signal waveguide, forms part of the coupling structure, is displaced completely within the near field of the signal waveguide, and has at least one contact point, which may be electrically contacted by a contact of the test probe.

Abstract: A device for allowing an electrical worker to use a non-contact voltage detector to check for the presence or absence of voltage inside a closed electrical panel is provided. The device includes an assembly having a front side and an opposite back side, a plurality of posts extending outwardly from the back side of and configured to hold wires in a fixed position within the closed electrical panel, and a plurality of indentations in the front side which form protrusions on the back side and are positioned to allow for positioning the non-contact voltage detector proximate the wires for testing with the non-contact voltage detector.

Abstract: A measuring probe, particularly for a non-contacting vector network analysis system, having a housing and at least one coupling structure disposed on the housing and designed for coupling an HF signal from a signal line, such that at least one additional signal probe is disposed on the housing for coupling an electrical signal into the signal line.

Abstract: A wiring fault detection method according to an embodiment of the present invention is capable of determining that, in a case where a temperature rise value of a faulty portion exceeds a temperature rise threshold within a preset threshold of the number of frames, a corresponding pixel has a fault. A wiring fault detection apparatus according to the present invention includes a temperature measurement imaging unit that measure a temperature of a semiconductor substrate and forms an image thereof.

Abstract: An apparatus for providing modulation mapping is disclosed. The apparatus includes a laser source, a motion mechanism providing relative motion between the laser beam and the DUT, signal collection mechanism, which include a photodetector and appropriate electronics for collecting modulated laser light reflected from the DUT, and a display mechanism for displaying a spatial modulation map which consists of the collected modulated laser light over a selected time period and a selected area of the IC.

Abstract: A power circuit configured to generate and distribute DC electrical power, the power circuit includes a photovoltaic (PV) system that includes an array of PV modules electrically coupled to a combiner box, and an inverter positioned to receive DC electrical power from the array of PV modules and output AC electrical power. The PV system also includes a signal generator coupled to a first portion of the PV system, and a signal detector coupled to a second portion of the PV system, the signal detector configured to detect secondary signals generated at a loose connection of an electrical joint in the PV system, wherein the secondary signals result from a signal generated by the signal generator.

Abstract: A probe card has a thin film substrate having projection electrodes on a first surface facing the semiconductor wafer and at a position facing the pad electrodes, a non-contact electrode, and first electrodes provided a second surface opposite to the first surface; and a wiring substrate having second electrodes disposed at a side opposite to the semiconductor wafer in the thin film substrate and at a position facing the first electrodes. The wiring substrate and the thin film substrate form a first sealed space and the thin film substrate and the semiconductor wafer form a second sealed space. By reducing the pressure in the first and the second sealed space, the first and the second electrodes are brought into close contact with each other and the pad electrodes and the projection electrodes are brought into close contact with each other, and the pressure of each of the first and second sealed space can be independently adjusted.

Abstract: Some embodiments relate to an integrated circuit. The integrated circuit includes an inductive or capacitive wireless communication structure located on a die region of the integrated circuit. This wireless communication structure is configured to wirelessly receive a test stimulus vector to test circuitry on the die region. The integrated circuit also includes a landing region having a size and location suitable to allow a conductive needle or conductive probe to come into direct physical and electrical contact with the landing region. The landing region provides a DC power supply to the circuitry on the die region while the test stimulus vector is wirelessly received.

Abstract: A method and apparatus for interrogating an electronic component, includes a body having an interface for an interrogating device to use as a conduit in reliably performing multiple discrete interrogations of the electronic component without the interrogating device physically touching the electronic component.

Abstract: A uniform field area (UFA) testing apparatus, used for an UFA test, including a testing rack and a plurality of field strength probes. The plurality of field strength probes are mounted on the testing rack. The plurality of field strength probes are positioned on a vertical plane and forms a probe grid array corresponding to the testing points of the UFA test, the grid spacing of the probe grid array corresponds to the distance of the neighboring testing points of the UFA test.

Abstract: An apparatus comprises: a first signal source; a dopant profile measurement module (DPPM) configured to receive a portion of the signal from the signal source; a probe tip connected to the reflective coupler; a load connected in parallel with the probe tip; and a second signal source connected to a load, wherein the signal source is configured to provide an amplitude-modulated (AM) signal to the probe tip. A method is also described.

Abstract: Provided is an active non-contact probe card including a carrier, a support base, a piezoelectric material layer, an active sensor array chip and a control circuit. The support base is disposed on the carrier. The piezoelectric material layer is connected with the support base. The position of the active sensor array chip with respect to the carrier is determined according to the thicknesses of the support base and the thicknesses of the piezoelectric material layer. A control circuit provides a control voltage to the piezoelectric material layer to control the thickness of the piezoelectric material layer, so as to adjust the position of the active sensor array chip with respect to the carrier.

Abstract: An electric field detection probe includes a cable including an internal conductor line, an insulating layer that coats a surface of the internal conductor line and exposes a tip end of the internal conductor line, an external conductor layer that coats a surface of the insulating layer and exposes the tip end, and an electric field diaphragm wherein the electric field diaphragm is electrically coupled to the external conductor layer, covers the tip end surface of the cable except for an opening.

Abstract: A scanning/imaging system wherein an external stimulus is used for exciting a device under test (DUT). A stimulus source is included for providing a stationary stimulus with a controllable spot size to a device under test (DUT), the controllable spot size covering a portion of the DUT for excitation by the stationary stimulus. A sensor is operable for capturing at least one of a functional response signal and an optical image signal emanating from the DUT portion. A linear positioning device is operable to facilitate scanning of remaining portions of the DUT until a predetermined area thereof has been traversed. A controller is operably coupled to the linear positioning device, stimulus source and the sensor for providing the overall control thereof.

Abstract: A wafer is disclosed that includes a plurality of pipeline interconnected integrated circuit dies that form a plurality of pipelines. A plurality of dies in each pipeline is connected to receive scanned output test data from a neighboring die in a pipeline. A wafer level test access mechanism (TAM) transceiver circuitry, located outside the plurality of pipeline interconnected IC dies, is connected in common to each of the pipelines to provide input test data in a parallel fashion to the plurality of pipelines. The wafer level test access mechanism transceiver circuitry also provides output test results from each of the pipelines for evaluation by a computerized test system. In one embodiment, the wafer level test access mechanism transceiver circuitry is wireless so that it wirelessly receives test data to be passed through the multiple pipelines on a wafer and also includes wireless transmit circuitry to transmit test results from each of the pipelines.

Abstract: Apparatus and methods for non-contact testing of electronic components printed on a substrate (3) are provided. Test circuits (11) are printed on the substrate (3) at the same time as the desired electronic component. The test circuits (11) are all optical and include a first portion (13) for providing electrical energy for the test circuit (11) and a second portion (15) for generating a detectable optical signal that is indicative of at least one electrical property of the electronic component. The test circuits are used in real time and minimize the production of unusable scrap in the printing of such products as ePaper.

Abstract: A non-contact voltage contrast (VC) method of determining TSV joint integrity after partial assembly. A TSV die is provided including TSVs that extend from a frontside of the TSV die to TSV tips on a bottomside of the TSV die. At least some TSVs (contacting TSVs) are attached to pads on a top surface of a multilayer (ML) package substrate. The ML package substrate is on a substrate carrier that blocks electrical access to the frontside of the TSV die. Two or more nets including groups of contacting TSVs are tied common within the ML substrate. A charged particle reference beam is directed to a selected TSV within a first net and a charged particle primary beam is then rastered across the TSVs in the first net. VC signals emitted are detected, and joint integrity for the contacting TSVs to pads of the ML package substrate is determined from the VC signals.

Abstract: A testing apparatus includes a tester and a probe card system that includes a probe card connected to the tester, and an active interposer connected to the probe card and wirelessly coupled with a device to be tested. The active interposer includes pads positioned on its free surface facing the device. The pads are positioned with respect to pads of the device so that each pad of the active interposer faces a pad of the device and is separated therefrom by a dielectric. Each pair of facing pads forms an elementary wireless coupling element which allows a wireless transmission between the active interposer and the device. The active interposer also includes an amplifier circuit configured to amplify wireless signals from the device before forwarding them to the tester. The probe card system includes a transmission element able to transmit a power voltage from the tester to the device.

Abstract: An improved system for capacitive testing electrical connections in a low signal environment. The system includes features that increase sensitivity of a capacitive probe. One feature is a spacer positioned to allow the probe to be partially inserted into the component without contacting the pins. The spacer may be a collar on the probe that contacts the housing of the component, contacts the substrate of the circuit assembly, or both. In some other embodiments, the spacer may be a riser extending beyond the surface of the sense plate that contacts the component, a riser portion of the component, or a combination of both. The spacer improves sensitivity by establishing a small gap between a sense plate of the probe and pins under test without risk of damage to the pins. A second feature is a guard plate of the probe with reduced capacitance to a sense plate of the probe. Reducing capacitance also increases the sensitivity of the probe.

Abstract: The apparatus (1) for checking the operational condition of an electronic sensor element (3) which measures a physical quantity comprises testing means for providing a test deflection, corresponding to a specific change in the measured physical quantity, in the measurement signal produced by the sensor element and by a measuring circuit (2) connected thereto. According to the invention, the testing means comprise a testing circuit (4) which is galvanically separated from the measuring circuit and includes a light source (5a, 5b), and a light-sensitive component (6a, 6b) connected to the measuring circuit for receiving a light signal (7a, 7b) emitted by the light source and for further providing in the measurement signal a test deflection proportional to the light signal.

Abstract: A method and system for measuring laser induced phenomena changes of at least one of a resistance, a capacitance and an inductance in a semiconductor device. The method comprises applying a biasing voltage from an emitter-follower circuit to a device under test (DUT); inducing said changes in the DUT; and measuring a voltage change in a collector portion of the emitter-follower circuit as a measure for said changes.