Abstract: Systems and methods for monitoring current anomaly are described. In an example, a device can measure first current flowing along a first liner between an instrument to an equipment. The device can measure second current flowing along a second line between the equipment to the instrument. The device can compare the measurements of the first current and the second current. The device can identify a presence of current anomaly based on the comparison of the measurements of the first and second currents. The device can, in response to the presence of the current anomaly, disconnect the instrument from the equipment.

Abstract: A multiple stage processing device having a plurality of radial stages, each individual radial stage is positioned between adjacent dividing walls and indexable though a plurality of processing stations. A plurality of fixture mount assemblies are positioned on an actuation surface of the rotatable indexing assembly, each individual fixture mount assembly is associated with and mechanically coupled to an individual radial stage. One or more slotted drive hubs communicatively coupled to independently operable drive motors are positioned adjacent to the actuation surface of the rotatable indexing assembly and are engageable with the plurality of fixture mount assemblies.

Abstract: An aging device for a display panel includes: a bearing device, including a bearing surface that is configured to bear the display panel; a fixture, including a plurality of pins which are configured to provide a screen turning-on signal for the display panel; a first electrode and a second electrode, wherein the first electrode and the second electrode are in an opposite arrangement and configured to apply an electric field to the display panel. The aging device achieves aging by providing an electric field for the display panel, avoids the burning of the thin film transistor devices of the display panel caused by the excessive bias and allows the thin film transistors at different positions to be uniformly aged, and is also easy to operate and implement.

Abstract: A storage device including repairable volatile memory and a method of operating the same are provided. The storage device includes a non-volatile memory storing user data, a volatile memory buffering the user data and performing a test for detecting a defective cell on a volatile cell array at an idle time of the storage device, and a controller controlling the volatile memory to perform the test at an idle time and storing test information including a test result or a test history in the non-volatile memory.

Abstract: An inspection device with improved inspection accuracy of electrical characteristics of a component, including a holding table, a pair of measuring elements configured to grip a component held on the holding table 32 and measure electrical characteristics of the component; and a relative movement device configured to relatively move the holding table and the pair of measuring elements. In a state in which component is clamped by the pair of measuring elements, by moving holding table, component and the holding table are separated by at least a set value, and in that state the electrical characteristics are measured. Therefore, even if the holding table is made of a conductive material, effects on the component are reduced, and the electrical characteristics can be measured accurately.

Abstract: A semiconductor device includes a built-in self-test controller suitable for generating a test command and test data, and generating a test result signal in response to test result data, in a built-in self-test mode, an internal circuit suitable for performing a test operation in response to the test command and the test data and generating the test result data as a result of the test operation, and a signal transfer controller suitable for outputting the test command, the test data, and the test result signal through a set probe pad and a set bump pad in the built-in self-test mode.

Abstract: An inspecting method for an object to be inspected is provided to bring probes of a probe card into electrical contact with a predetermined number of devices of target devices of the object at a time to inspect electrical characteristics of the target devices by moving a mounting table for mounting thereon the object under the control of a control unit. Upon completion of the inspection of the target devices, if inspection errors have occurred in specific devices of the target devices in a regular pattern, the target devices are re-examined, and when the re-examination is carried out, a contact position between the probe card and the object is displaced from a contact position in a previous inspection by a distance of at least one device to inspect electrical characteristics of the number of devices of the target devices at a time.

Abstract: An embodiment of a method to characterize a die is disclosed. The embodiment of the method includes measuring a quality metric of the die, and determining, prior to a final test stage, whether the quality metric of the die satisfies a first constraint, where the first constraint is more stringent than a second constraint at the final test stage for the quality metric of the die.

Abstract: Test structures for performing electrical tests of devices under one or more microbumps are provided. Each test structure includes at least one microbump pad and a test pad. The microbump pad is a part of a metal pad connected to an interconnect for a device. A width of the microbump pad is equal to or less than about 50 ?m. The test pad is connected to the at least one microbump pad. The test pad has a size large enough to allow circuit probing of the device. The test pad is another part of the metal pad. A width of the test pad is greater than the at least one microbump pad.

Abstract: The electronic device mounting apparatus 1 comprises: a first camera 123 for imaging a flexible board 74 of a base member 70 of a test carrier 60 to generate a first image information; an image processing apparatus 40 for detecting a position of an alignment mark 79 of the flexible board 74 from the first image information and calculating a print start position 782 of the first interconnect patterns 78 on the flexible board 74 on the basis of the position of the alignment mark 79; a printing head 122 for forming a first interconnect pattern 78 on the flexible board 74 from the print start position 782; and a second conveyor arm 21 for mounting a die 90 on the flexible board 74 on which the first interconnect pattern 78 is formed.

Abstract: The present idea refers to a needle head, its use in a probe arrangement, and a method for electrically contacting multiple electronic components. The needle head comprises a body with a lower surface, needle electrodes emerging from the lower surface, and multiple outlets arranged in the lower surface. A channel is arranged between an inlet in the body and the outlets for conveying a medium from the inlet to the outlets. By this means, electronic components arranged in close distance under the lower surface of the needle head are directly exposed to the medium which provides a test environment during a test of the electronic components.

Abstract: The present disclosure provides a semiconductor test system. The semiconductor test system includes a wafer stage to hold a wafer having a plurality of light emitting devices (LEDs); a probe test card operable to test each test field of the wafer; and a light detector integrated with the probe test card to collect light from a LED of the wafer.

Abstract: A wafer inspection apparatus that performs surface inspection and internal inspection of solar cells using a single apparatus. The wafer inspection apparatus includes a loading unit configured to allow a cassette to be lifted up or lowered by an elevator. A surface inspection unit includes a plurality of stages, thus performing surface inspection of each wafer using a first vision module. A wafer transfer unit has a rotatably installed center portion and has both ends provided with adsorption parts. An internal inspection unit is configured such that a conveyor is installed to allow the wafer to be transferred, thus performing internal inspection of the transferred wafer through a second vision module. An unloading unit enables wafers having completed the internal inspection to be sequentially loaded onto the unloading unit. A control unit controls a series of wafer inspection procedures.

Abstract: A method of testing semiconductor devices, the method includes the steps of making a first set of electrical connections to a first set of devices to allow a first set of tests to be performed on that set of devices and concurrently making a second set of electrical connections to a second set of devices to allow a second set of tests to be performed on the second set of devices, wherein the first and second sets of tests are different, and concurrently performing the first set of tests on the first set of devices and the second set of tests on the second set of devices.

Abstract: A detection circuit and one or more wires or circuit traces are included in a die. The combination is used to detect mechanical failure of the substrate, e.g. silicon after singulation of the dice from the wafer. Failures may be detected at different regions or planes within the die, and the tests may be performed during operation of the packaged die and integrated circuit, even after installation and during operation of a larger electronic device in which it is incorporated. This is especially useful for chip scale packages, but may be utilized in any type of IC package.

Abstract: There is provided a testing apparatus including a plurality of test units, a storage that is shared by the plurality of test units, where the storage stores therein wafers under test to be tested by the plurality of test units, a transport mechanism that transports the wafers under test between the storage and each of the plurality of test units, a mainframe that specifies a test procedure for each of the plurality of test units, a power source that is shared by the plurality of test units, where the power source supplies power to each of the plurality of test units, and a pressure source that is shared by the plurality of test units, where the pressure source supplies a pressure to each of the plurality of test units.

Abstract: A semiconductor wafer includes a plurality of integrated circuit (IC) die areas for accommodating IC die that include at least a first subcircuit having at least one matched component portion that includes at least two matched devices. The first subcircuit is arranged in a layout on the IC die. A plurality of scribe line areas having a scribe line width dimension are interposed between the plurality of IC die areas. At least one subcircuit-based test module (TM) is positioned within the scribe line areas, wherein the subcircuit-based TMs implement a schematic for the first subcircuit with a TM layout that copies the layout on the IC die for at least the two matched devices in the matched component portion and alters the layout on the IC die for a portion of the first subcircuit other than the matched devices in matched component portion to fit the TM layout of the first subcircuit within the scribe line width dimension.

Abstract: An anisotropically conductive connector and an anisotropically conductive connector device. The anisotropically conductive connector includes a supporting member, a plurality of through-holes each extending in a thickness-wise direction of the supporting member, and anisotropically conductive sheets respectively held in the through-holes of the supporting member. Each anisotropically conductive sheet includes a frame plate, a plurality of through-holes each extending in a thickness-wise direction of the frame plate, and a plurality of anisotropically conductive elements arranged in the respective through-holes of the frame plate. Each of the anisotropically conductive elements includes a conductive part, conductive particles contained in an elastic polymeric substance in a state oriented so as to align in a thickness-wise direction of the element, and an insulating part to cover the outer periphery of the conductive part and including an elastic polymeric substance.

Abstract: A wafer processing apparatus used for the testing of electronic devices comprises first and second clampers movably mounted on a shaft, each clamper being configured for holding a wafer carrier on which a wafer is mounted. Clamping fingers on each of the first and second clampers are operative to clamp onto the wafer carrier to hold the wafer carriers, and the clampers are operative to move the wafer carriers reciprocally between a loading position and a wafer processing location for processing the wafers.

Abstract: A semiconductor wafer analysis system is provided. In an embodiment, the semiconductor wafer analysis system includes a tester to test semiconductor wafers manufactured by at least one manufacturing facility, a wafer map generation module to generate wafer maps on the basis of the test results from the tester, and a wafer analysis module. The wafer analysis module may include a data generation module that divides each wafer map into a plurality of defect analysis regions and generates feature vectors representing the semiconductor wafers, and an operation module that statistically analyzes the feature vectors.

Abstract: A testing device to test a plate for electronic circuits, comprising transport members able to transport the plate along an axis of feed (Y), at least from an entrance station to a testing station defining a testing plane (P?), and testing members, disposed in correspondence with the testing station. The testing device also comprises an alignment station defining an alignment plane (P), disposed upstream of the testing station, and alignment members, disposed in correspondence with the alignment station, able to dispose the plate in an aligned position, in which the plate is disposed symmetrical both with respect to the axis of feed (Y) and also with respect to a first axis (X) substantially transverse and co-planar to the axis of feed (Y).

Abstract: A wafer prober is provided with a tray which supports a wafer at a set position, transports it to a processing position of the wafer and is placed at the processing position; one or more alignment units which position the wafer at the set position with respect to the tray; contact units arranged in number larger than that of the alignment units and performing inspection processing in contact with the wafer at the processing position; and a tray transport portion for transporting the tray supporting the wafer between the alignment unit and the contact unit. The tray is provided with three or more pin holes for allowing movement of the chuck pin in the XYZ? directions, an alignment mark for positioning the wafer, and an alignment portion for positioning the tray itself.

Abstract: Embodiments of the invention generally provide methods and an apparatus for processing and qualifying a formed photovoltaic device to assure that the formed photovoltaic device meets desired quality and industry electrical standards. Embodiments of the present invention may also provide a photovoltaic device, or solar cell device, production line that is adapted to form a thin film solar cell device by accepting an unprocessed substrate and performing multiple deposition, material removal, cleaning, bonding, and testing steps to form a complete functional and tested solar cell device. The solar cell device production line, or system, is generally an arrangement of processing modules and automation equipment used to form solar cell devices that are interconnected by automated material handling system.